We have designed a demultiplexer (DMUX) with a simple structure, high-speed operation circuits and large bias margins. By using a binary-tree architecture and clock-driven circuits, multi-channel DMUXs can be constructed easily from the same elemental circuits, i.e., 1-to-2 DMUX, consisting of a T-FF and a 1-to-2 switch. By applying cell-level optimization and Monte Carlo simulation, bias margins and operation frequency of the circuits were enlarged. Logical operations of the 1-to-2 DMUX and a multi-channel DMUX, e.g., a 1-to-4 DMUX were experimentally confirmed. It was also confirmed that the large margins, 33% of the DMUX (1-to-2 switch) was kept up regardless the degree of integration, and that the 1-to-2 DMUX can operate up to 46 GHz by using measure of average voltages across Josephson junctions.

Pulse tube cryocoolers receive considerable attention due to their intrinsically higher durability and lower vibrations than other regenerative coolers such as Gifford-McMahon or Stirling cycle coolers. This paper describes basic function and classification of the pulse tube cryocoolers from the viewpoint of electronic applications.

With the emerging technology of photonic networks, careful design becomes necessary to make most of the already installed fibre capacity. Appropriate numerical tools are readily available. Usually, these are based on the split-step Fourier method (SSFM), employing the fast Fourier transform (FFT). With N discretization points, the complexity of the SSFM is O(N log2N). For real-world wavelength division multiplexing (WDM) systems, the simulation time can be of the order of days, so any speed improvement would be most welcome. We show that the SSFM is a special case of the so-called collocation method with harmonic basis functions. However, for modelling nonlinear optical waveguides, various other basis function systems offer significant advantages. For calculating the propagation of single soliton-like impulses, a problem-adapted Gauss-Hermite basis leads to a strongly reduced computation time compared to the SSFM . Further, using a basis function system constructed from a scaling function, which generates a compactly supported wavelet, we developed a new and flexible split-step wavelet collocation method (SSWCM). This technique is independent of the propagating impulse shapes, and provides a complexity of the order O(N) for a fixed accuracy. For a typical modelling situation with up to 64 WDM channels, the SSWCM leads to significantly shorter computation times than the standard SSFM.

We report our studies on the spectral sensitivity of superconducting NbN thin-film single-photon detectors (SPD's) capable of GHz counting rates of visible and near-infrared photons. In particular, it has been shown that a NbN SPD is sensitive to 1.55-µm wavelength radiation and can be used for quantum communication. Our SPD's exhibit experimentally measured intrinsic quantum efficiencies from 20% at 800 nm up to 1% at 1.55-µm wavelength. The devices demonstrate picosecond response time (<100 ps, limited by our readout system) and negligibly low dark counts. Spectral dependencies of photon counting of continuous-wave, 0.4-µm to 3.5-µm radiation, and 0.63-µm, 1.33-µm, and 1.55-µm laser-pulsed radiations are presented for the single-stripe-type and meander-type devices.

In this paper, we review the progress in BiSrCaCuO-2212 Intrinsic Josephson junctions (IJJs) by summarizing our recent results in fabrication and high frequency experiments. Using a double-side fabrication process, a well defined number of intrinsic Josephson junctions in a well defined geometry can be fabricated. The junctions in the stack are quite homogeneous, and the power distribution of external irradiation among the junctions is even. Shapiro steps are clearly observed up to 2.5 THz, and the general condition for the occurrence of Shapiro steps at frequency frf is that it should be much greater than the plasma frequency fpl. Under certain conditions the Shapiro steps are zero-crossing, making some applications possible, such as quantum voltage standard etc.

Achieving optimal performance with minimal complexity are conflicting problems encountered in constructing receivers. In this paper, to solve the problem, we propose sector beamed space hopping which utilizes a Viterbi equalizing receiver. Reduction of the number of RF circuit sets, system complexity and decreasing the computational burden of the Viterbi equalizer through the use of sector beamed space hopping is presented. This is achieved using a sector beamed antenna which limits the number of paths in the multipath channel environment. This paper describes each key component which comprises the system and discusses the application of FH-SS communication. The channel is assumed to be an industrial indoor propagation channel, such as those found in a factory, where high reliability is required and many complex multipaths exist. We confirm through simulation that Viterbi equalization using less computational complexity can be obtained. It is found that there exists a trade off between system complexity and performance. Through the discussion of power consumption, cost and BER performance, we show that the proposed system achieves acceptable performance while having a low system complexity.

Despite the enormous power of present-day computers, digital systems cannot respond to real-world events in real time. Biological systems, however, while being built with very slow chemical transistors, are very fast in such tasks like seeing, recognizing, and taking immediate actions. This paper discusses the issue of how we can build real-time intelligent systems directly on silicon. An intelligent VLSI system inspired by a psychological brain model is proposed. The system stores the past experience in the on-chip vast memory and recalls the maximum likelihood event to the current input based on the associative processor architecture. Although the system can be implemented in a CMOS digital technology, we are proposing here to implement the system using circuits operating in the analog/digital-merged decision making principle. Low-level processing is done in the analog domain in a fully parallel manner, which is immediately followed by a binary decision to yield answers in digital formats. Such a scheme would be very advantageous in achieving a high throughput computation under limited memory and computational resources usually encountered in mobile applications. Hardware-friendly algorithms have been developed for real-time image recognition using the associative processor architecture and some experimental results are demonstrated.

In this paper, we propose an improved network-flow based multi-way circuit partitioning algorithm whose objective is to minimize the number of sub-circuits. It iteratively extracts a size-maximal feasible sub-circuit one at a time. In our approach, two devices are applied. One is in the use of an exact min-cut graph, and the other is in the idea of keeping the number of I/O pins of the residual circuit as small as possible after one-time extraction. We implemented our algorithm in C for experiments, and tested it with several industrial cases and MCNC benchmarks. Compared to the known approach, we observed more than 10% reduction in average of the sub-circuit number.

In this paper, we study the fundamental combinatorial nonlinear resonances of a system consisting of two identical periodic forced circuits coupled by a linear resistor. The circuit equations are described by a system of coupled Duffing's equations. We discuss two cases of external periodic force, i.e., in-phase and anti-phase, and obtain the bifurcation diagram of each case. Periodic solutions are classified according to the symmetrical property of the circuit. Resonances in the coupled system are explained from the combinatorial standpoint. That is, we introduce the definition of combinatorial resonances and investigate the patterns of combinatorial solutions in this system.

In this paper, we discuss digital watermarking techniques besed on modifying the spectral coefficient of an image, classified into quantization-based and correlation-based watermarking techniques. We first present a model of the watermark embedding and extracting processes and examine the robustness of the watermarking system against common image processing. Based on the result, we clarify the reason why detection errors occur in the watermark extracting process and give a method for evaluating the performance of the watermarking system. And then we study an improvement of the watermark extracting process using the deconvolution technique and present some concluding remarks in the last section.

We describe the logic design of a single-flux-quantum (SFQ) 22 unit switch. It is the main component of the SFQ Banyan packet switch we are developing that enables a switching capacity of over 1 Tbit/s. In this paper, we focus on the design of the controller in the unit switch. The controller does not have a simple "off-the-shelf" conventional circuit, like those used in shift registers or adders. To design such a complicated random logic circuit, we need to adopt a systematic top-down design approach. Using a graphical technique, we first obtained logic functions. Next, to use the deep pipeline architecture, we broke down the functions into one-level logic operations that can be executed within one clock cycle. Finally, we mapped the functions on to the physical circuits using pre-designed SFQ standard cells. The 22 unit switch consists of 59 logic gates and needs about 600 Josephson junctions without gate interconnections. We tested the gate-level circuit by logic simulation and found that it operates correctly at a throughput of 40 GHz.

This paper proposes a maneuvering target tracking algorithm using multiple model filters. This filtering algorithm is discussed in terms of tracking performance, tracking success rate and tracking accuracies for short sampling interval as compared with other conventional methodology. Through several simulations, validity of this algorithm has been confirmed.

We have fabricated a novel type of intrinsic Josephson junctions with superconducting Bi2Sr2CaCu2O8+y (Bi-2212)/YBa2Cu3O7-x(YBCO) bilayer thin films deposited on MgO(100) substrates. We used the 4th harmonics of a Nd:YAG pulsed laser ablation. Furthermore, we studied the transport properties of a 25 µm 25 µm Bi-2212/YBCO mesa-type junction. The zero resistance temperature was around 50 K. The current-voltage characteristics showed flux-flow-like behavior and a supercurrent of about 2 mA at 4.2 K. Shapiro steps were observed when microwave was irradiated to the mesa junction. These Shapiro steps are attributed to the Josephson junction formed at the interface between the Bi-2212 and YBCO layers in the mesa structure and not to the intrinsic Josephson junctions in the Bi-2212 layer or the micro-grains within the films.

A new low-voltage, all-in-one ESD (electrostatic discharging) protection circuit was designed. One such ESD protection unit is enough to protect each I/O pad against ESD stresses of all modes, i.e., from I/O to power supply and ground positively and negatively. This novel ESD circuit features adjustable trigger-voltage, i.e., 5 V to 60 V, with low turn-on threshold down to 5 V, symmetric active discharging channels in all directions, fast response time of 0.1 to 0.3 ns, and high ESD performance/area ratio of greater than 80 V per micrometer width. It was implemented in commercial BiCMOS technologies and achieved 14 kV human body model (HBM) and 15 kV air-gap IEC ESD protection levels. This compact ESD structure can not only provide adequate ESD protection, but also minimize the ESD-induced parasitic effects, which makes it a suitable ESD protection solution for mixed-signal and RF ICs in very deep sub-micron regime.

A stabilized local oscillator is one of the key components for any radar system, especially for a Doppler radar in detecting slowly moving targets. Based on hybrid semiconductor/superconductor circuitry, the HTS local oscillator produces stable, low noise performance superior to that achieved with conventional technology. The device combines a high Q HTS sapphire cavity resonator (f=5.6 GHz) with a C-band low noise GsAs HEMT amplifier. The phase noise of the oscillator, measured by a HP 3048A noise measurement system, is -134 dBc/Hz at 10 kHz offset at 77 K.

This paper describes the outline of the active noise control system and the adaptive signal processing used in the practical systems. Focus is on the adaptive signal processing and algorithms which are widely used in many applications. Some variations in the algorithms for improving the control effect and for reducing the amount of calculation are also shown. Additionally, the limitations and some design guide are shown with the results of the numerical simulations.

This letter proposes a 3-D stereo endoscopic image processing system. Whereas a conventional 3-D stereo endoscopic system has simple monitoring functions, the proposed system gives doctors exact depth feelings by providing them depth value information, visualization, and stereo PACS viewer to aid an education, accurate diagnosis, a surgical operation, and to further apply in a robotic surgery.

In this paper, we propose a universal biquad filter that can realize all types of 2nd-order functions, such as Low-pass Filters (LPF), High-Pass Filters (HPF), Band-Pass Filters (BPF), Band-Elimination Filters (BEF), and All-Pass Filters (APF). Also, the filter types can be programmable digitally with built-in switches. The proposed circuit can be realized by using a CMOS technology that is suitable for a mixed digital-analog LSI. In addition, the circuit can operate in high frequencies with a low power supply voltage because it is based on a current-mode circuit. Finally, the proposed circuit is simulated by PSpice to confirm its characteristics.

Sophisticated and robust resource management is an essential issue in future wireless systems which will provide a variety of application services. In this paper, we employ an adaptive-network-based fuzzy inference system (ANFIS) to control the resource allocation for mobile multimedia networks. ANFIS, possessing the advantages of expert knowledge of fuzzy logic system and learning capability of neural networks, can provide a systematic approach to finding appropriate parameters for the Sugeno fuzzy model. The fuzzy resource allocation controller (FRAC) is designed in a two-layer architecture and selects properly the capacity requirement of new call request, the capacity reservation for future handoffs, and the air interface performance as input linguistic variables. Therefore, the statistical multiplexing gain of mobile multimedia networks can be maximized in the FRAC. Simulation results indicate that the proposed FRAC can keep the handoff call blocking rate low without jeopardizing the new call blocking rate. Also, the FRAC can indeed guarantee quality of service (QoS) contracts and achieve higher system performance according to network dynamics, compared with the guard channel scheme and ExpectedMax strategy.

A highly stable oven-controlled crystal oscillator (OCXO) with low phase-noise characteristics has been developed using a dual-mode SC-cut quartz crystal oscillator. The OCXO uses a conventional oven-control system for coarse compensation and a digital-correction system, which uses B-mode signal in an SC-cut resonator as a temperature sensor, for fine compensation. Combining these two forms of compensation greatly improves the stability of the C-mode frequency without requiring a double-oven system. The experimental results indicated that the frequency stability of the proposed OCXO, including the frequency-temperature hysteresis, is ten times better than that of a conventional, free-running OCXO. The results also indicated that the proposed OCXO has good frequency retraceability and low phase-noise characteristics.