In this paper, under the assumption that all the eigenvalues of a linear nominal discrete time-delay system lie within a specified ring region, a sufficient condition is proposed to preserve the assumed property when the structured parameter perturbations are added into the linear nominal discrete time-delay system. For the case of eigenvalue-clustering in a circular region, and for the case of not including time delays, the presented sufficient condition is mathematically proved to be less conservative than those reported recently in the literature.

Network dimensioning is an important issue to provide stable and QoS-rich communication services. A reliable estimation of bandwidths of links between the end-to-end path is a first step towards the network dimensioning. Pathchar is one of such tools for the bandwidth estimation for every link between two end hosts. However, pathchar still has several problems. If unexpectedly large errors are included or if route alternation is present during the measurement, the obtained estimation is much far from the correct one. We investigate the method to eliminate those errors in estimating the bandwidth. To increase the reliability on the estimation, the confidence interval for the estimated bandwidth is important. For this purpose, two approaches, parametric and nonparametric approaches, are investigated to add the confidence intervals. Another important issue is the method for controlling the measurement period to eliminate the measurement overheads. In this paper, we propose a measurement method to adaptively control the number of measurement data sets. Through experimental results, we show that our statistical approaches can provide the robust estimation regardless of the network conditions.

By the growth of the Internet, the client's access to the Internet have been increasing. In order to meet those demands, asymmetric networks have become a great attraction. However, asymmetric networks composed of satellite and terrestrial links have not been enough investigated. Therefore, this paper proposes a new formula for TCP performance evaluation for the asymmetric networks. Using this evaluation formula, we calculate the throughput of TCP Reno over the asymmetric networks taking Slow Start into account. The calculation results are compared with the following: (1) the value based on an existing theoretical formula, (2) the outputs of simulation by NS (Network Simulator), and (3) the experimental results using VSAT (Very Small Aperture Terminal) satellite communication system for satellite links and the Internet for terrestrial links. As a result, it is shown that the new formula is more precise than the one already proposed.

An important goal in communication theory is to construct good minimum squared Euclidean distance (MSED) codes for transmission over additive white Gaussian noise (AWGN) channels. In this paper, a new construction method for the M-ary phase-shift-keyed (M-PSK) codes over the ring structure ZM, the ring of integers modulo M, with a good minimum Euclidean distance, is proposed. The proposed codes are linear when multiple coset leaders are considered. The characteristics and performance levels of the newly constructed codes are analyzed for code length up to n 8. It is found that the proposed codes compare favorably with Piret's codes and Graeffe's method codes on Gaussian channels in terms of decoding complexity, coding gain, and error performance.

Explicit formulas for the tap-coefficients of Taylor series based type III FIR digital differentiators have already been presented. However, those formulas were not derived mathematically from the Taylor series and were based on observation of different sets of the results. In this paper, we provide a mathematical proof of the formulas by deriving them mathematically from the Taylor series.

Filtering and smoothing using a non-Gaussian state space model are proposed for motion trajectory of feature point in image sequence. A heavy-tailed non-Gaussian distribution is used for measurement noise to reduce the effect of outliers in motion trajectory. Experimental results are presented to show the usefulness of the proposed method.

A low loss magnetic plate positioned near an antenna is proposed to increase radiation efficiency of cellular phones. This magnetic plate is used to control the nearby magnetic field around the cellular phone's antenna, and this field controlling is shown to be effective for the improvement of radiation efficiency and far-field pattern. As for the material design of the plate, a magnetic plate having high µr and low µr" (complex relative permeability: µr = µr - j µr") is found to be effective for achieving high performance. In our sample fabrication, a low loss magnetic sample with µr = 5.7 - j 0.7 at 900 MHz is realized. It is demonstrated that this low loss sample contributes to increased efficiency and improved far-field characteristics.

The model to calculate high frequency C-V characteristics of ferroelectric capacitors that have not been modeled yet is presented. At first, P-V hysteresis model necessary to calculate C-V characteristics is improved by introducing two modification factors and by comparing with experimental results. Then, other parameters to express high frequency C-V characteristic of the metal/ferroelectric/metal structure are derived, in which the response for AC signal input is considered. Finally, it has been shown that these models predict well the C-V hysteresis shapes of the MFIS and the MFMIS structures.

We demonstrate all-optical clock recovery at 160 Gbit/s by injection locking of a 10 GHz mode-locked laser diode. Effective locking in a range of 10 MHz is observed for average input powers around -10 dBm. The timing jitter is analyzed for data rates between 10 Gbit/s and 160 Gbit/s. Beyond 40 Gbit/s, the high frequency timing jitter of the slave laser becomes of prime importance and has to be taken into account since it degrades the performance of a subsequent receiver. Increasing power penalties are found, especially beyond 80 Gbit/s.

Selective attention mechanism, plays an important role in human visual perception, can be investigated by developing an approach to perceiving the multi-meaningful-dotted-pattern in a color blindness plate (CBP). In this Letter, a perception model driven by a simple active vision mechanism is presented for the image segmentation and understanding of a CBP. Experiments show that to understand one meaningful pattern in an image containing multi-meaningful patterns, the active visual search (i.e., pattern attention) is a very useful function.

In this paper, we propose a high-speed multiplier-free realization using ROM's to store the results of coefficient scalings in combination with higher signal rate and pipelined operations, without the need of hardware multipliers. By varying some parameters, the proposed structure provides various combinations of hardware and clock speed (or throughput). Examples are given comparing the proposed realization with the distributed arithmetic (DA) realization and direct-form realization with power-of-two coefficients. Results show that with proper choices of the parameters the proposed structure achieves a faster processing speed with less hardware, as compared to the DA realization, while it is much faster than the direct-form with slightly more hardware.

A new IDDQ testable design method is proposed for static CMOS PLA circuits. A testable PLA circuit of NOR-NOR type is designed using this method. It is shown that all bridging faults in NOR planes of the testable designed PLA circuit can be detected by IDDQ testing with 4 sets of test input vectors. The test input vectors are independent of the logical functions to be realized in the PLA circuit. PLA circuits are designed using this method so that the quiescent supply current generated when they are tested will be zero. Thus, high resolution of IDDQ tests for the PLA circuits can be obtained by using the testable design method. Results of IDDQ tests of PLA circuits designed using this testable design method confirm not that the expected output can be generated from the circuits but that the circuits are fabricated without bridging faults in NOR planes. Since bridging faults often occur in state-of-the-art IC fabrication, the testable design is indispensable for realizing highly reliable logic systems.

Efficient query processing in multi-dimensional indexing structures is an important issue for multimedia data applications. In this paper, we propose incremental k-nearest neighbor query (k-NNQ) and range query algorithms for R-tree based structures. The novel aspect of these algorithms is that they make use of the notion of VP filtering, a concept borrowed from the MVP-tree. The filtering notion allows for delaying of computational overhead until absolutely necessary. By so doing, we attain considerable performance benefits while paying insignificant overhead during the construction of the index structure. We implemented our algorithms and carried out experiments to demonstrate the capability and usefulness of our method. Results show that improvements range from 8% to 23% in response time for the experimental environment that we considered.

This paper reviews device technologies of flash memories, whose market has grown explosively due to the advantages of: (1) their low cost provided by availability of the single-transistor type cell with adoption of block-erase operation; (2) high functionality as electrically erasable and programmable non-volatile memories; and (3) high reliability with the mature floating gate technology. As for fast-random-access flash memories, their scaling issue, including a multi-level-cell technology, is discussed, and technologies for low power consumption, which is highly demanded for mobile electronic equipment, their major application, are described. Furthermore, device technologies of serial-access flash memories, which have achieved low cost with cell-size reduction, are also reviewed. Finally, a future promising technology of the NROM concept, which achieves a multi-storage-cell with low voltage operation and a simple process, is introduced.

In this paper, multiuser detector (MUD) based on radial basis function (RBF) is proposed and simulated for a multicode DS/CDMA system in an AWGN and a multipath fading channels. The performance of RBF-based MUD is compared with that of many suboptimal multiuser detectors in terms of bit error probability. To obtain simulation results, importance sampling technique is employed. From the simulation results, it is confirmed that the RBF-based MUD outperforms decorrelating detector, and achieves near-optimum performance under various environments. The results in this paper can be applied to design of MUD for a multicode DS/CDMA system.

A high-speed context-free marker controlled and minima imposition-free watershed transform is proposed for efficient multi-object detection and segmentation from a complex background. The context-free markers are extracted from a complex backgrounded multi-object image using a noise tolerant attention operator. These make high speed marker-controlled watershed possible without over-segmentation and region merging. The proposed method presents a marker-constrained labeling that can speed up the segmentation of the marker-controlled watershed transform by eliminating the necessity of the minima imposition. Simulation results show that the proposed method can efficiently detect and segment multiple objects from a complex background while reducing the over-segmentation and computation time.

An electroretinogram (ERG) represents the global responses of the retina to a visual stimulus and shows accumulated responses of each layer of the retina relative to the signal processing mechanisms occurring within the retina. Thus, investigating the reaction types of each ERG wave provides information required for diagnosis and for identifying the signal processing mechanisms in the retina. In this study, an ERG signal is generated by simulating the volume conductor field response for each retina layer, which are then summed algebraically. The retina model used for the simulation is Shah's Computer Retina model, which is the most reliable model developed so far. When the generated ERG is compared with a typical clinical ERG it exhibits a close similarity. Based on changing the parameters of the ERG model, a diagnostic investigation is performed with a variation in the ERG waveform.

We propose a two-level hierarchical method for dependability evaluation of distributed systems with replicated programs and data files. Since Markov modeling is limited only to each component in this method, state explosion can be circumvented successfully. Simulation results show that the method can accomplish evaluation even for large systems for which Markov modeling is not feasible.

Various shadows are one of main factors that cause errors in vision based vehicle detection. In this paper, two simple methods, land mark based method and BS & Edge method, are proposed for vehicle detection and shadow rejection. In the experiments, the accuracy of vehicle detection is higher than 98%, during which the shadows arisen from roadside buildings grew considerably. Based on these two methods, vehicle counting, tracking, classification, and speed estimation are achieved so that real-time traffic parameters concerning traffic flow can be extracted to describe the load of each lane.

In this paper, we propose an approach to test pattern generation for Speed-Independent (SI) asynchronous control circuits. Test patterns are generated based on a specified sequence, which is derived from the specification of a target circuit in the form of a Signal Transition Graph (STG). Since the sequence represents the behavior of a circuit only with stable states, the state space of the circuit can be represented as reduced one. A product machine, which consists of a fault-free circuit and a faulty circuit, is constructed and then the specified sequence is applied sequentially to the product machine. A fault is detected when the product machine produces inconsistency, i.e., output values of a fault-free circuit and a faulty circuit are different, and the sequentially applied part of the sequence becomes a test pattern to detect the fault. We also propose a test generation method using an undetectable fault identification as well as the specified sequence. Since the reduced state space is a subset of that of a gate level implementation, test patterns based on a specification cannot detect some faults. The proposed method identifies those faults with a circuit topology in advance. BDD is used to implement the proposed methods efficiently, since the proposed methods have a lot of state sets and set operations. Experimental results show that the test generation using a specification achieves high fault coverage over single stuck-at fault model for several synthesized SI circuits. The proposed test generation using a circuit topology as well as a specification decreases execution time for test generation with negligible cost retaining high fault coverage.