This paper describes 1.0 V operation power performance of a double doped AlGaAs/InGaAs/AlGaAs heterojunction FET for personal digital cellular phones. The developed FET with a multilayer cap consisting of a highly Si-doped GaAs, an undoped GaAs and a highly Si-doped AlGaAs exhibited an on-resistance of 1.3 Ωmm and a maximum drain current of 620 mA/mm. A 28 mm gate-width device, operating with a drain bias voltage of 1.0 V, demonstrated an output power of 1.0 W, a power-added efficiency of 59% and an associated gain of 13.7 dB at an adjacent channel leakage power at 50 kHz off-center frequency of -48 dBc with a 950 MHz π/4-shifted quadrature phase shift keying signal.

In current-mode signal processing, a companding integrator is attractive from the viewpoint of linearity under a low power supply voltage. In this paper, new instantaneous companding integrators using MOSFET's are proposed. The companding integrator utilizes a nature of MOSFET square law. HSPICE simulation results demonstrate several advantages of the proposed circuits.

A novel Multi-Level Partitioning (MLP) technique taking into account real-world constraints for hardware-software partitioning in Distributed Embedded Multiprocessor Systems (DEMS) is proposed. This MLP algorithm uses a gradient metric based on hardware-software cost and performance as the core metric for selection of optimal partitions and consists of three nested levels. The innermost level is a simple binary search that allows quick evaluations of a large number of possible partitions. The middle level iterates over different possible allocations of processors (that execute software) to subsystems. The outermost level iterates over the number of processors and the hardware cost range. Heuristics are applied to each level to avoid the expensive exhaustive search. The application of MLP as a recently purposed Distributed Embedded System Codesign (DESC) methodology shows its feasibility. Comparisons between real-world examples partitioned using MLP and using other existing techniques demonstrate contrasting strengths of MLP. Sharing, clustering, and hierarchical system model are some important features of MLP, which contribute towards producing more optimal partition results.

The variabilities of device characteristics are usually regarded as a normal distribution. If we consider the variabilities over the whole wafer, however, they cannot be expressed as a normal distribution due to the existence of global systematic component. We propose a statistical model, characterizing the global systematic component according to the distance from the center of the wafer, which can express the variabilities over the whole wafer statistically.

A timer-based scheme is proposed to manage information within terminal and service profiles for both incall registration/deregistration of UPT users and incall registration resets of terminal owners. In the timer-based scheme, information related to incall registration for a UPT user in a terminal profile is deleted due to a timer expiration without accessing the terminal profile. The performance of the timer-based scheme is compared with the previously proposed request-based scheme in terms of; 1) total cost and, 2) the number of terminal profile accesses per unit time for a terminal. Even though provision of the timer-based scheme requires the modification of incoming call delivery procedure, the timer-based scheme can reduce both the total cost and the number of terminal profile accesses compared to the previously proposed request-based scheme.

In this paper, a novel cumulant-based adaptive notch filtering technique for the enhancement and tracking of a single sinusoid in additive noise is presented. In this technique, the enhanced signal is obtained as the output of a narrow bandpass filter implemented using a second-order pole-zero constraint IIR adaptive notch filter, which needs only one coefficient to be updated. The filter coefficient, which leads to identifying and tracking the sinusoidal frequency, is updated using a suggested adaptive algorithm employing a recursive estimate of the kurtosis and only one-sample-lag point of a selected one-dimensional fourth-order cumulant slice of the input signal. Therefore, the proposed technique provides automatically resistance to additive Gaussian noise. It is also shown that the presented technique outperforms the correlation-based counterpart in handling additive non-Gaussian noise. Simulation results are provided to show the effectiveness of the proposed algorithm in comparison with the correlation-based lattice algorithm.

This paper proposes two novel Multi-bit Delta-Sigma Modulator (Δ Σ M) architectures based on a Dual-Quantization architecture. By using multi-bit quantization with single-bit feedback, Both eliminate the need for a multi-bit digital-to-analog converter (DAC) in the feedback loop. The first is a Digital quantization-Error Canceling Multi-bit (DECM)-Δ Σ M architecture that is able to achieve high resolution at a low oversampling ratio (OSR) because, by adjusting the coefficients of both analog and digital circuits, it is able to cancel completely the quantization error injected into the single-bit quantizer. Simulation results show that a signal-to-quantization-noise ratio of 90 dB is obtained with 3rd order 5-bit quantization DECM-Δ Σ M at an OSR of 32. The second architecture, an analog-to-digital mixed (ADM)-Δ Σ M architecture, uses digital integrators in place of the analog integrator circuits used in the Δ Σ M. This architecture reduces both die area and power dissipation. We estimate that a (2+2)-th order ADM-Δ Σ M with two analog-integrators and two digital-integrators will reduce the area of a 4-th order Δ Σ M by 15%.

To enhance throughput and reuse bandwidth, clustering techniques can effectively manage nodes in multi-hop wireless networks. However, in such networks, hidden terminal interference degrades the system performance and increases the average packet delay time. Therefore, this work presents novel two-level cluster-based code assignment techniques to resolve the hidden terminal problems. At the low level, five basic and an optimized intra-cluster code assignment schemes are developed to calculate the number of codes used in each cluster. At the high level, two inter-cluster code assignment schemes (coarse-grained and fine-grained controls) are proposed to obtain the minimal number of code sets. The merits of our schemes include low execution time, low probability of code re-assignment, and low overhead. Furthermore, the proposed schemes allow us to regionally update orthogonal codes when the topology varies. Experimental results demonstrate that the proposed schemes outperform conventional techniques. Among the five basic intra-cluster code assignment schemes, the ordering criteria of increasing number of one-hop neighbors is the best in terms of the number of orthogonal codes to avoid hidden terminal interference. The optimized intra-cluster code assignment scheme generally obtains fewer orthogonal codes than other schemes. For inter-cluster code assignment schemes, the coarse-grained control has a lower code allocation time. However, the fine-grained control requires fewer orthogonal codes.

The authors propose and experimentally demonstrate an all-optical exclusive OR (XOR) logic gate based on self-phase modulation (SPM) of a semiconductor optical amplifier (SOA). The scheme is insensitive to the polarization of the input signal and requires no additional synchronized clock. The output of the XOR gate showed the contrast ratio of more than 17 dB for the input signal at 2.5 GHz.

This paper provides a normalized Iterative Feedback Tuning (IFT) method that assures the boundedness of the gradient vector estimate (ρ) and the Hessian matrix estimate without the assumption that the internal signals are bounded. The proposed method uses the unbiased Gauss-Newton direction by the addition of the 4-th experiment. We also present blended control criteria and a PID-like controller as new design choices. In examples, the normalized IFT method results in a good convergence although the internal signal or the measurement noise variance is large.

A direct conversion receiver IC including an on-chip balun, an I/Q mixer, a variable gain amplifier and a 90 phase-shifter is fabricated in a Bi-CMOS technology with 15 GHz transition frequency (fT). This paper demonstrates that cascaded connection of an on-chip balun and a double balanced mixer as the I/Q mixer is effective to achieve a low DC offset and a low second-order distortion, on the basis of both careful examination of the mixer behavior and measurement. Input-referred DC offset voltage of less than 300 µV and spurious free dynamic range (SFDR) of over 67 dB are obtained by measurement. The IC consumes 52 mA from 2.7 V power supply voltage. The die size is 3 mm 3 mm.

We evaluate the BER performance of the OFDM system with the one-tap equalizer bank under the two-ray multipath channel with the frequency offset by the simple Gaussian analysis method and by a proposed modified Gaussian analysis method. The proposed analysis method considers two adjacent inter-channel interferences, separately, and models the other inter-channel interferences as a Gaussian noise. It is shown that the proposed analysis method affords much closer results to the simulations than those by the simple Gaussian analysis method, when the frequency offset exists.

This paper presents a new implementation of fuzzy filters for edge-preserving smoothing of an image corrupted by impulsive and white Gaussian noise. This filter structure is expressed as an adaptive weighted mean filter that uses fuzzy control. The parameters of this filter can be adjusted by learning. Finally, simulation results demonstrate the effectiveness of the proposed technique.

This paper describes the results of a series of laboratory experiments for performance evaluations of our proposed Maximum Likelihood Sequence Estimation (MLSE) based interference canceller, the Interference Canceling Equalizer (ICE), which can cancel both co-channel interference (CCI) and inter-symbol interference (ISI). To verify the feasibility of ICE for the Japanese cellular communications system, a standard of which has been released under the name of Personal Digital Cellular (PDC) system, a prototype system was constructed using 27 TI TMS320C40 Digital Signal Processor (DSP) chips. The ICE prototype works in real-time on the PDC air interface, major specifications of which are π/4 QDPSK 21 k symbols/s 3-channel time-division multiple-access (TDMA). Two-branch diversity reception is used to enhance the signal detection performance of ICE. In the experiments, BER performances were evaluated using the prototype system. Under a single-path Rayleigh fading and a single CCI condition, the ICE receiver attains the BER of less than 310-2 with the negative values of the average CIR: for fD = 5 Hz and 40 Hz, the average CIR more than -20 dB and -10 dB, respectively. Under a double-path Rayleigh fading and a single CCI condition, the ICE receiver attains the BER of less than 1.510-2 with the negative values of the average CIR: for fD = 5 Hz and 40 Hz, the average CIR more than -20 dB and -10 dB, respectively. The laboratory test results suggest that the ICE receiver has potential for system capacity enhancement.

The reverse-link of the DS-CDMA cellular system requires transmit power control (TPC) and diversity reception. This paper develops the expression of the received signal-to-interference ratio (SIR), and evaluates the outage probability using the Monte Carlo simulation to obtain the link capacity. The link capacities with received signal strength (SS)-based TPC and SIR-based TPC are compared. This paper investigates the required maximum and minimum transmit powers and the capacity gain of the SIR-based TPC over SS-based TPC as well as the effect of the diversity reception on the link capacity and transmit power. The reverse-link capacity is compared with the forward-link capacity to check the balance of capacities between both links.

The transmission S-parameter, S21, between dipole elements on a rectangular finite ground plane is calculated by the MoM with planar-segments in the horizontally and vertically polarized configurations. Supposed a 1/10 scaling, the frequency range is selected 0.15-0.8 GHz. The size of the finite ground plane is 40 cm 100 cm. The dipole-element length is 18.8 cm (half-wavelength at 0.8 GHz). The distance between dipole elements is 30 cm. The results are compared to the calculated results with the conventional MoM-GTD hybrid method and also the measured results with a TRL-calibrated network analyzer. It makes clear that the MoM-GTD hybrid method is not applicable to a small ground plane in the vertically polarized configuration. The results calculated by the MoM with planar-segments agree well to the measured results both in the horizontal and vertical polarizations. The results show that the size of the finite ground plane for the vertical polarization should be much larger than for the horizontal polarization.

The paper proposes a transmitter diversity scheme with a desired signal selection for the mobile communication systems in which the severe cochannel interference (CCI) is assumed to occur at the base station. The feature of the proposed scheme is that the criterion of the downlink branch selection is based on the desired signal power estimated by the correlation between the received signal and the unique word at the matched filter. Moreover, the unique word length control method according to the instantaneous SIR is applied to the proposed scheme, taking account of the uplink transmission efficiency. Computer simulation results show that the proposed scheme provides the better performance than the conventional transmitter diversity in the severe CCI environments, and that the unique word length control method applied to the proposed scheme decreases the unique word length without the degradation of the transmission quality, comparing with the fixed unique word length method.

In this paper, a new expression is derived for the bit error rate (BER) performance of Gray-encoded MDPSK for M=2 and 4 in orthogonal frequency division multiplexing (OFDM) systems over time-variant and frequency-selective Rayleigh fading channels. We assume that the guard time is sufficiently larger than the delay spread to solve the intersymbol interference (ISI) problem on the demodulated OFDM signal. In this case, the performance depends on the Doppler spread of fading channel. The closed form expression for the bit error probability of MDPSK/OFDM extended from the result in [5] shows that the BER performance of MDPSK is determined by (N + NG ) fD Ts where N is the number of subchannels, NG the length of the guard interval, fD the maximum Doppler frequency, and Ts the sampling period. The theoretical analysis results are confirmed by computer simulations for DPSK and QDPSK signals.

A merged analog-digital circuit architecture is proposed for implementing intelligence in SoC systems. Pulse modulation signals are introduced for time-domain massively parallel analog signal processing, and also for interfacing analog and digital worlds naturally within the SoC VLSI chip. Principles and applications of pulse-domain linear arithmetic processing are explored, and the results are expanded to the nonlinear signal processing, including an arbitrary chaos generation and continuous-time dynamical systems with nonlinear oscillation. Silicon implementations of the circuits employing the proposed architecture are fully described.

This paper presents a multi-thread evolutionary programming (MEP) technique that is composed of global, local, and minimal search units. An appropriate search routine is called depending on the current situation and the individuals are updated by using the selected routine. In each search routine, the individuals are updated with a normalized relative fitness function to improve the robustness of the algorithm. The proposed method is applied to the problem of backing up a truck-and-trailer system to a loading dock. A fuzzy logic controller is designed for a truck-and-trailer backer-upper system and the MEP algorithm is used to optimize the representative parameters of the fuzzy logic controller. The simulation results show that the proposed controller performs well even under a large variety of initial positions.