A novel multiple-access optical network architecture is presented that not only employs the WDM technique but also divides networks. The subnetworks are connected to each other via a wavelength-dependent interconnection network, and pairs of subnetworks are optically linked with different combinations for each wavelength. Through an analysis of the throughput and delay for the slotted ALOHA protocol, the architecture is confirmed to be improved from the conventional one that employs only the WDM technique. For example, the improvement ratio of the throughput for a four-wavelength network is 2.4, and that for an eight-wavelength network is 4.4.

Current computing systems are too slow for information processing because of the huge number of procedural steps required. A decrease in the number of calculation steps is essential for real-time information processing. We have developed two kinds of novel architectures for automatic elimination of redundant calculation steps. The first architecture employs the new digit-serial algorithm which eliminates redundant lower digit calculations according to the most-significant-digit-first (MSD-first) digit-serial calculation scheme. Basic components based on this architecture, which employ the redundant number system to limit carry propagation, have been developed. The MSD-first sequential vector quantization processor (VQP) is 3.7 times faster than ordinary digital systems as the result of eliminating redundant lower-bit calculation. The second architecture realizes a decrease in the number of complex calculation steps by excluding useless data before executing the complex calculations according to the characterized value of the data. About 90% of Manhattan-distance (MD) calculations in VQP are excluded by estimating the MD from the average distance.

A new hardware algorithm for the block matching video motion estimation is presented. The algorithm works in the full-search fashion but unlike the Full-Search Block Matching Algorithm (FSBMA) it adjusts the number of computations dynamically to variable picture contents. Due to incorporated mechanism of data-driven thresholding, the proposed algorithm performs as four times as less operations comparing to the FSBMA while maintaining the same quality of results. Its hardware implementation is simple and compact. A supportive hardware design as well as simulation results on benchmarks are outlined.

Over roughly the past decade, the lightwave-research community has converged upon a broad architectural vision of the emerging national-scale core network. The vision has been that of a transparent, reconfigurable, wavelength-routed network, in which signals propagate from source to destination through a sequence of intervening nodes without optoelectronic conversion. Broad benefits have been envisioned. Despite the spare elegance of this vision, it is steadily becoming clear that due to the performance, cost, management, and multivendor-interoperability obstacles attending transparency, the needs of civilian communications will not drive the core network to transparency on anything like a national scale. Instead, they will drive it to 'opaque' form, with critical reliance on optoelectronic conversion via transponders. Transponder-based network architectures in fact not only offer broad transmission and manageability benefits. They also make networking at the optical layer possible by offering to the nodes managed and performance-engineered standard-interface signals that can then be reconfigured for provisioning and restoration purposes by optical-layer elements. Because of this, the more pressing challenges in lightwave networking are steadily shifting towards the mechanisms that will be used for provisioning and restoration. Among these are mechanisms based on free-space micromachined optical crossconnects. We describe recent progress on these new devices and the architectures into which they fit, and summarize the reasons why they appear to be particularly well-matched to the task of provisioning and restoring opaque multiwavelength core long-haul networks.

Over roughly the past decade, the lightwave-research community has converged upon a broad architectural vision of the emerging national-scale core network. The vision has been that of a transparent, reconfigurable, wavelength-routed network, in which signals propagate from source to destination through a sequence of intervening nodes without optoelectronic conversion. Broad benefits have been envisioned. Despite the spare elegance of this vision, it is steadily becoming clear that due to the performance, cost, management, and multivendor-interoperability obstacles attending transparency, the needs of civilian communications will not drive the core network to transparency on anything like a national scale. Instead, they will drive it to 'opaque' form, with critical reliance on optoelectronic conversion via transponders. Transponder-based network architectures in fact not only offer broad transmission and manageability benefits. They also make networking at the optical layer possible by offering to the nodes managed and performance-engineered standard-interface signals that can then be reconfigured for provisioning and restoration purposes by optical-layer elements. Because of this, the more pressing challenges in lightwave networking are steadily shifting towards the mechanisms that will be used for provisioning and restoration. Among these are mechanisms based on free-space micromachined optical crossconnects. We describe recent progress on these new devices and the architectures into which they fit, and summarize the reasons why they appear to be particularly well-matched to the task of provisioning and restoring opaque multiwavelength core long-haul networks.

Minimizing the guard time, Tguard, in the TCM-TDMA PDS scheme is essential in maximizing TCM transmission efficiency. As a replacement for the commonly adopted worst-case approach to TCM-TDMA PDS system estimation, this paper proposes a statistical approach. The level distributions of losses and n-th order Fresnel reflections are determined from published measurements. The proposed approach estimates the reflection of the optical access network.

In this paper we propose an algorithm for generating maximum weight independent sets in a circle graph, that is, for putting out all maximum weight independent sets one by one without duplication. The time complexity is O(n3 + β ), where n is the number of vertices, β output size, i. e. , the sum of the cardinalities of the output sets. It is shown that the same approach can be applied for spider graphs and for circular-arc overlap graphs.

In this paper, we propose an adaptive encoding method of fixed codebook in CELP coders and implement an adaptive fixed code-excited linear prediction (AF-CELP) speech coder as a low-bit-rate extension to the 8 kbit/s CS-ACELP. The AF-CELP can be implemented at low bit rates as well as low complexity by exploiting the fact that the fixed codebook contribution to the speech signal is periodic, as is the adaptive codebook (or pitch filter) contribution. Listening tests show that the 6.4 kbit/s AF-CELP has a comparable quality to the 8 kbit/s CS-ACELP under real environmental test conditions.

Hierarchical macrocell/microcell architectures have been proposed for future cellular mobile communication. The performance analysis for the hierarchical cellular system becomes an important issue. In this paper, extending the analytical methods from[1][2][8], assuming that the imperfect power control follows log-normal statistics, and employing different attenuation models for macrocells and microcells, the capacity plane and outage probability of the system are examined and quantified with and without perfect sectorization. From the numerical results of parameters of IS-95 protocol, the high user capacity and lower outage probability may be expected in the case of relatively tight power control and narrower overlap between sectors. These results are compared with the previously published CDMA nonhierarchical cellular system estimation. When we employ the hierarchical cellular system, we can increase the user capacity 2.3 times with the same bandwidth 1.25 MHz than the one of the nonhierarchical cellular system.

In this paper, we present a simple codeword length generation algorithm and its hardware implementation. The proposed technique is based on the dividing the Huffman table as two parts; with leading 0'bits and following bits. The method is shown to be efficient in the memory requirement and searching speed since only logic gates are needed in the implementation and searching can be process parallel without looking up the memory table. The total equivalent gates for the implementation are about only 100 gates and critical path delay is 10 ns. The results of experiments show that the proposed algorithm has a very high speed and a good performance. The designed blocks are synthesized by Compass synthesis with 0.5 µm CMOS, 3.3V, technology.

This paper outlines the modeling requirements of integrated circuit (IC) fabrication processes that have lead to and sustained the development of computer-aided design of technology (i. e. TCAD). Over a period spanning more than two decades the importance of TCAD modeling and the complexity of required models has grown steadily. The paper also illustrates typical applications where TCAD has been powerful and strategic to IC scaling of processes. Finally, the future issues of atomic-scale modeling and the need for an hierarchical approach to capture and use such detailed information at higher levels of simulation are discussed.

A software system has dynamic adaptability if it can adapt itself to dynamically changing runtime environments. As open-ended distributed systems and mobile computing systems have spread widely, the need for software systems with dynamic adaptability increases. We propose a software model with dynamic adaptability called DAS and its description language LEAD++. The basic mechanism for dynamic adaptability is called adaptable procedure. An adaptable procedure is a special kind of generic procedures (functions) whose methods are selected based upon the state of its runtime environment. Furthermore, control mechanisms of adaptable procedures -- including method selection strategies -- are realized using generic procedures. This sort of reflective architecture enables us to write a dynamically adaptable software system in highly flexible, extensible, readable and maintainable way. LEAD++ is an object-oriented reflective language that provides adaptable procedures and their control mechanisms as its basic language functionalities. We are currently implementing a prototype of LEAD++ as a pre-processor of Java. Using LEAD++, we can systematically describe dynamically adaptable applets, mobile objects, etc.

In this paper, we present two fast motion estimation techniques with adaptive variable search range using spatial and temporal correlation of moving pictures respectively. The first technique uses a frame difference between two adjacent frames which is used as a criterion for deciding search window size. The second one uses deviation between the past and the predicted current frame motion vectors which is also used as a criterion for deciding search window size. Simulation results show that these methods reduce the number of checking points while keeping almost the same image quality as that of full search method.

This paper discusses the implementation and cost- and performance- evaluations of a distributed processing network, called DONA-α, which is one of the possible physical networks mainly implementing connection-oriented public switched network functions corresponding to OSI layers 1 to 3. The first feature of the DONA-α network is that it separates a switching subsystem and a control subsystem of a conventional switching system and independently allocates them over distributed nodes as a switching node and a control node. Each DONA-α switching node is given a much smaller switching capacity than the switching subsystem of the conventional switching system and is located near subscribers. In contrast, each DONA-α control node has much higher performance than the control subsystem of the conventional switching system. This allows a large number of switching nodes to share the same control node, which controls their connection setups. This separation provides the network with greater flexibility and allows more effective utilization of network resources, such as control processors, switching fabrics, and transmission links, than ever before. The second feature of DONA-α is that it provides a network with network-wide distribution transparency. This allows network resources including software such as databases and application programs to be shared and therefore to be utilized in the network more easily and more efficiently. The results of a network performance simulation and cost calculation confirm the viability of the DONA-α network.

Existing multimedia processors having millions of transistors are not suitable for portable multimedia services and existing fixed-point DSP chips having fixed data formats are not appropriate for multimedia applications. This paper proposes a multimedia fixed-point DSP (MDSP) chip for portable multimedia services and its chip implementation. MDSP employs parallel processing techniques, such as SIMD, vector processing, and DSP techniques. MDSP can handle 8-, 16-, 32- or 40-bit data and can perform two MAC operations in parallel. In addition, MDSP can complete two vector operations with two data movements in a cycle. With these features, MDSP can handle both 2-D video signal processing and 1-D signal processing. The prototype MDSP chip has 68,831 gates, has been fabricated, and is running at 30 MHz.

This paper introduces an alternating rebound Turing machine and investigates some fundamental properties of it. Let DRTM (NRTM,ARTM) denote a deterministic (nondeterministic and alternating) rebound Turing machine, and URTM denote an ARTM with only universal states. We first investigate a relationship between the accepting powers of rebound machines and ordinary machines, and show, for example, that (1) there exists a language accepted by a deterministic rebound automaton, but not accepted by any o(log n) space-bounded alternating Turing machine, (2) alternating rebound automata are equivalent to two-way alternating counter automata, and (3) deterministic rebound counter automata are more powerful than two-way deterministic counter automata. We next investigate a relationship among the accepting powers of DRTM's, NRTM's, URTM's and ARTM's, and show that there exists a language accepted by alternating rebound automata, but not accepted by any o(logn) space-bounded NRTM (URTM). Then we show that there exists an infinite space hierarchy for DRTM's (NRTM's, URTM's) with spaces below log n. Furthermore, we investigate a relationship between the strong and weak modes of space complexity, and finally show that the classes of languages accepted by o(logn) space-bounded DRTM's (NRTM's, URTM's) are not closed under concatenation and Kleene .

All-terminal reliability is one of the measurements to evaluate the reliability for network systems. Since it may need exponential time of the network size to compute the exact value of all-terminal reliability, it is important to calculate its tight approximate value, especially its lower bound, at a moderate calculation time. Ramanathan and Colbourn have proposed approaches for lower bounds of all-terminal reliability by using arc-packings but their approaches are not detailed enough to construct concrete algorithms and they have just evaluated their approaches for a particular network. In this paper, we construct concrete algorithms based on their approaches and suggest new algorithms. We also execute computational experiments for general networks in order to evaluate the lower bounds by the algorithms and show the effectiveness of our new algorithms.

This letter presents a cryptographic key assignment scheme for dynamic access control in a hierarchy. A scheme for extending a previous cryptographic key assignment scheme to reduce the computation required for key generation and derivation algorithms is also proposed.

This paper presents a new approach to the precise interrupt handling problem in modern processors with multiple out-of-order issues. It is difficult to implement a precise interrupt scheme in the processors because later instructions may change the process states before their preceding instructions have completed. We propose a fast precise interrupt handling scheme which can recover the precise state in one cycle if an interrupt occurs. In addition, the scheme removes all the associative searching operations which are inevitable in the previous approaches. To deal with the renaming of destination registers, we present a new bank-based register file which is indexed by bank index tables containing the bank identifiers of renamed register entries. Simulation results based on the superscalar MIPS architecture show that the register file with 3 banks is a good trade-off between high performance and low complexity.

Wavelength division multiplex (WDM) photonic networks are expected as the key for the global communication infrastructure. Recent increase of communication demands require large-scale highly-dense WDM systems, which results in severe requirements for optical cross-connect systems, such as cross-talk specification. In this paper, we propose a new optical path cross-connect system (OPXC) using matrix-WDM scheme, which makes it possible to reduce cross-talk requirements of WDM filters and to construct OPXC in modular structures. The matrix-WDM scheme is a concept of two-layered optical paths, which provides wavelength group managements in the fiber dispersion equalization and EDFA gain equalization.