This paper describes the design, implementation and testing of wideband code division multiple access (CDMA) base station demodulator for the international mobile telecommunication-2000 (IMT-2000) system test plant based on cdma2000 radio transmission technology (RTT). The performance of the implemented base station demodulator is measured and compared with the theoretical performance bound. The system test plant equipped with this demodulator provides wireless services, such as high quality speech (9.6 kbps), real-time video (384 kbps) and internet protocol (IP) based data services (144 kbps) in a mobile radio environment.

To reduce an amount of computation of full search algorithm for fast motion estimation, we propose a new and fast matching algorithm without any degradation of predicted images. The computational reduction without any degradation comes from adaptive matching scan algorithm according to the image complexity of the reference block in current frame. Experimentally, we significantly reduce the computational load compared with conventional full search algorithm.

The ring-like systolic array architecture described in this paper, based on a conventional one-dimensional systolic array architecture, was created through operator rescheduling based on the symmetry of data flow. This eliminated high-latency delay due to the stuffing of the array pipeline in the conventional architecture. The new architecture requires a memory bandwidth no greater than the conventional architecture does, but increases throughput and processor utilization while reducing power consumption.

This paper presents a method of statistical system optimization. The method uses a constraint generation, which is a design methodology based on a hierarchical top-down design, to give specifications to sub-circuits of the system. The specifications are generated not only to reduce the costs of sub-circuits but also to take adequate margin to achieve enough yield of the system. In order to create an appropriate amount of margin, a term which expresses a statistical figure based on Mahalanobis' distance is added to the constraint generation problem. The method is applied to a PLL, and it is confirmed that the yield of the lock-up time reaches 100% after the optimization.

This paper describes an improved multiresolution telescopic search algorithm (MRTlcSA) for block-matching motion estimation. The algorithm uses images with full and reduced bit resolution, and uses motion-track and adaptive-search-window strategies. Simulation results show that the proposed algorithm has low computational complexity and achieves good image quality. We have developed a systolic-architecture-based search engine that has split data paths. In the case of low bit-resolution, the throughput is increased by enhancing the operating parallelism. The new motion estimator works at a low clock frequency and a low supply voltage, and therefore has low power consumption.

Recently, Vatan, Roychowdhury and Anantram have presented two types of revised versions of the Calderbank-Shor-Steane code construction, and have also provided an exhaustive procedure for determining bases of quantum error-correcting codes. In this paper, we investigate the revised versions given by Vatan et al., and point out that there is no essential difference between them. In addition, we propose an efficient algorithm for searching for bases of quantum error-correcting codes. The proposed algorithm is based on some fundamental properties of classical linear codes, and has much lower complexity than Vatan et al.'s procedure.

This paper describes a unique motion estimation and compensation (ME/MC) hardware architecture for a scene-adaptive algorithm. By statistically analyzing the characteristics of the scene being encoded and controlling the encoding parameters according to the scene, the quality of the decoded image can be enhanced. The most significant feature of the architecture is that the two modules for ME/MC can work independently. Since a time interval can be inserted between the operations of the two modules, a scene-adaptive algorithm can be implemented in the architecture. The ME/MC architecture is loaded on a single-chip MPEG-2 video encoder.

This paper proposes two novel Multi-bit Delta-Sigma Modulator (Δ Σ M) architectures based on a Dual-Quantization architecture. By using multi-bit quantization with single-bit feedback, Both eliminate the need for a multi-bit digital-to-analog converter (DAC) in the feedback loop. The first is a Digital quantization-Error Canceling Multi-bit (DECM)-Δ Σ M architecture that is able to achieve high resolution at a low oversampling ratio (OSR) because, by adjusting the coefficients of both analog and digital circuits, it is able to cancel completely the quantization error injected into the single-bit quantizer. Simulation results show that a signal-to-quantization-noise ratio of 90 dB is obtained with 3rd order 5-bit quantization DECM-Δ Σ M at an OSR of 32. The second architecture, an analog-to-digital mixed (ADM)-Δ Σ M architecture, uses digital integrators in place of the analog integrator circuits used in the Δ Σ M. This architecture reduces both die area and power dissipation. We estimate that a (2+2)-th order ADM-Δ Σ M with two analog-integrators and two digital-integrators will reduce the area of a 4-th order Δ Σ M by 15%.

This paper briefly surveys architectural technologies of recent or future high-performance, low-power processors for improving the performance and power/energy consumption simultaneously. Achieving both high performance and low power at the same time imposes a lot of challenges on processor design, and therefore gives us a lot of opportunities for devising new technologies. The paper also tries to provide some insights into the technology direction in future.

This paper shows that nondeterministic sensing semi-one-way simple k-head finite automata are more powerful than nondeterministic sensing one-way simple k-head finite automata for any k2, and sensing semi-one-way simple 2-head finite automata are more powerful than semi-one-way simple 2-head finite automata, which gives an affirmative answer and a partial solution to two open problems on sensing semi-one-way simple multi-head finite automata in Ref.[3].

This paper evaluates the security of the block cipher E2 against truncated differential cryptanalysis. We show an algorithm to search for effective truncated differentials. The result of the search confirmed that there exist no truncated differentials that lead to possible attacks for E2 with more than 8 rounds. The best attack breaks an 8-round variant of E2 with either IT-Function (the initial transformation) or FT-Function (the final transformation) using 294 chosen plaintexts. We also found the attack which distinguishes a 7-round variant of E2 with IT- and FT-Functions from a random permutation using 291 chosen plaintexts.

This paper introduces a flexible, stream-oriented dataflow processing model based on the "Communicating Logic (CL)" framework. As the target architecture, we adopt the dual layered "Plastic Cell Architecture (PCA). " Datapath processing functionality is encapsulated in asynchronous hardware objects with variable graining and implemented using look-up tables. Communication (i.e. connectivity and control) between the distributed processing objects is achieved by means of inter-object message passing. The key point of the CL approach is that it offers the merits of scalable performance, low power hardware implementation with the user friendly compilation and linking capabilities unique to software.

In this paper, a new approach to adaptive direction-of-arrival (DOA) estimation based upon a database retrieval technique is proposed. In this method, angles and signal powers are quantized, and a set of true correlation vectors of the array antenna input vectors for various combinations of the quantized angles and signal powers is stored in a database. The k-d tree is then selected as the data structure to facilitate range searching. Estimated a correlation vector, range searching is performed to retrieve several correlation vectors close to it from the k-d tree. The DOA and the signal power are estimated by taking the weighted average of angles and powers associated with the retrieved correlation vectors. Unlike the other high-resolution methods, this method requires no eigenvalue computation, thus allowing a fast computation. It is shown through simulation results that the processing speed of the proposed method is much faster than that of the root-MUSIC that requires the eigenvalue decomposition.

In this paper, we propose fast bitmap search algorithms to reduce the computational complexity of transform-based vector quantization (VQ) techniques, which achieve better quality in reconstructed images than the ordinary VQ. By removing the unlikely codewords in each step, the bitmap search method, which starts from the most significant bitmap then the successive significant ones, can save more than 90% computation of the ordinary transformed VQ. By applying to the singular value decomposition (SVD) VQ as an example, theoretical analyses and simulation results show that the proposed bitmap search methods dramatically reduce the computation and achieve invisible distortion in the reconstructed images.

An Off-line mammography screening system is used in pre-screening mammograms to separate high-risk mammograms from most normal cases. Off-line system can run before radiologist's review and is particularly useful in the national breast cancer screening program which usually consists of high percentage of normal cases. Until now, the shortcomings of on-line detection of clustered microcalcifications from a mammogram remain in the necessity of manual selection of regions of interest. The developed technique focuses on detection of microcalcifications within a region of interest indicated by the radiologist. Therefore, this kind of system is not efficient enough to process hundreds of mammograms in a short time without a large number of radiologists. In this paper, based on a "hierarchically-coarse-to-fine" approach, an off-line mammography screening system for the detection and segmentation of clustered microcalcifications is presented. A serial off-line procedures without any human intervention should consider the complexity of organization of mammograms. In practice, it is impossible to use one technique to obtain clustered microcalcifications without consideration of background text and noises from image acquisition, the position of breast area and regions of interest. "Hierarchically-coarse-to-fine" approach is a serial procedures without any manual operations to reduce the potential areas of clustered microcalcifications from a mammogram until clustered microcalcifications are found. The reduction of potential areas starts with a mammogram, through identification of the breast area, identification of the suspicious areas of clustered microcalcifications, and finally segmentation of clustered microcalcifications. It is achieved hierarchically from coarse level to fine level. In detail, the proposed system includes breast area separation, enhancement, detection and localization of suspicious areas, segmentation of microcalcifications, and target selection of microcalcifications. The system separates its functions into hierarchical steps and follows the rule of thumb "coarse detection followed by fine segmentation" in performing each step of processing. The decomposed hierarchical steps are as follows: The system first extracts the breast region from which suspicious areas are detected. Then precise clustered microcalcification regions are segmented from the suspicious areas. For each step of operation, techniques for rough detection are first applied followed by a fine segmentation to accurately detect the boundaries of the target regions. With this "hierarchically-coarse-to-fine" approach, a complicated work such as the detection of clustered microcalcifications can be divided and conquered. The effectiveness of the system is evaluated by three experienced radiologists using two mammogram databases from the Nijmegen University Hospital and the Taichung Veterans General Hospital. Results indicate that the system can precisely extract the clustered microcalcifications without human intervention, and its performance is competitive with that of experienced radiologists, showing the system as a promising asset to radiologists.

This paper presents a system-level bus architecture validation technique and shows its application to a consumer product design. This technique enables the entire system to be validated with bus cycle accuracy using bus architecture level models derived from their corresponding behavioral level models. Experimental results from a digital still camera (DSC) system design show that our approach offers much faster simulation speed than register transfer level (RTL) simulators. Using this fast and accurate validation technique, bus architecture designs, validations and optimizations can be effectively carried out at system-level and total turn around time of system designs can be reduced dramatically.

In this paper we present a case study of a hierarchical statistical analysis. The method which we use here bridges the statistical information between process-level and system-level, and enables us to know the effect of the process variation on the system performance. We use two modeling techniques--intermediate model and response surface model--in order to link the statistical information between adjacent design levels. We show an experiment of the hierarchical statistical analysis applied to a Phase Locked Loop (PLL) circuit, and indicate that the hierarchical statistical analysis is practical with respect to both accuracy and simulation cost. Following three applications are also presented in order to show advantage of this linking method; these are Monte Carlo analysis, worst-case analysis, and sensitive analysis. The results of the Monte Carlo and the worst-case analysis indicate that this method is realistic statistical one. The result of the sensitive analysis enables us to evaluate the effect of process variation at the system level. Also, we can derive constraints on the process variation from a performance requirement.

Recently, Plastic Cell Architecture (PCA) has been proposed as a hard-wired general-purpose autonomously reconfigurable processor. PCA consists of two layers, the plastic part on which sequential logic circuits are implemented, and the built-in part which induces the plastic part to dynamically reconfigure the circuits and transports messages among the circuits. The plastic part consists of an array of LUT-based reconfigurable logic primitives, each of which is connected only to adjacent ones. Combining logic and layout synthesis, we propose a new array-based algorithm to map logic functions into the PCA plastic part. This algorithm produces a folded array of sum-of-multi-input-complex-terms, especially for the PCA plastic part.

A uniquely parsable grammar (UPG) introduced by Morita et al. is a kind of generative grammar, in which parsing can be performed without backtracking. It is known that UPGs and their three subclasses form the "deterministic Chomsky hierarchy. " In this paper, we introduce three kinds of normal forms for UPGs, i.e., Type-0, Type-1 and Type-2 UPGs by restricting the forms of rules to very simple ones. We show that the upper three classes in the deterministic Chomsky hierarchy can be exactly characterized by the three types of UPGs.

This paper presents the fast cell search time performance based on laboratory and field experiments of a 2-step cell search algorithm that uses scrambling code masking for inter-cell asynchronous wideband DS-CDMA (W-CDMA) mobile radio. The scrambling code is masked at different time positions during each scrambling period on the forward-link common control channel (CCH) to detect the scrambling code timing at the mobile receiver. Experiments were conducted using the CCH-to-dedicated traffic channel (DTCH) power ratio, R of 3 dB, 10 DTCHs, and 16 scrambling codes in a single-cell and two-cell models. The field experimental results show that the cell search time of about 600 msec was achieved in vehicular environments at the detection probability of 90% and the average received Eb/N0 (N0 is the background noise without interference) of 13-15 dB for DTCH, even in the worst case scenario when the received signal power ratios of the CCH from two cell sites were 0 dB. The cell search time that was achieved with the 3-step cell search algorithm previously proposed by the authors is estimated from the experimental results; the cell search can be accomplished within about 720 msec at a probability of 96% for 512 scrambling codes and 16 scrambling code groups.