The maximum likelihood sequence estimator (MLSE) is usually implemented by the Viterbi algorithm (VA). The computational complexity of the VA grows exponentially with the length of the channel response. With some performance reduction, a decision-feedback equalizer (DFE) can be used to shorten the channel response. This greatly reduces the computational requirement for the VA. However, for many real-world applications, the complexity of the DFE/MLSE approach may be still too high. In this paper, we propose a constrained DFE that offers much lower VA computational complexity. The basic idea is to pose some constraints on the DFE such that the postcursors of the shortened channel response have only discrete values. As a result, the multiplication operations can be replaced by shift operations making the VA almost multiplication free. This will greatly facilitate the real world applications of the MLSE algorithm. Simulation results show that while the proposed algorithm basically offers the same performance as the original MLSE performance, the VA is much more efficient than the conventional approach.

This paper describes glyph representation, that is, shape representation of inheritance relationships between a superclass and subclasses in an object-oriented programming language. The inheritance relationships in object-oriented programming languages are usually represented in a visual programming environment by a diagram of a tree graph or a nested structure. That diagram is not integrated with a code view showing control and data flows. Using the proposed representation, one can understand the inheritance relationships of classes and the assignment compatibility or type conformance just by seeing the glyphs. One thus does not need to look at a hierarchy diagram in order to recognize them. The inheritance relationships are represented by inclusion relationships of glyphs. Methods for generating suitable glyphs from a class hierarchy are also described, as is a prototype system for glyph generation. Experiments using the Java 2 Standard Edition (J2SE), which has more than 1,500 classes, show that one can recognize inheritance relationships in the proposed representation faster than in the usual textual representation. Consequently the proposed representation can facilitate the understanding of inheritance in visual object-oriented programming environments.

This paper presents a method for detection of calcification, which is an important early sign of breast cancer in mammograms. Since information of calcifications is located in inhomogeneous background and noises, it is hard to be detected. This method uses wavelet packet transform (WPT) for elimination of the background image related to low frequency components. However, very high frequency signals of noises exist with the calcifications and make it hard to suppress them. Since calcification location can be represented as vertical, horizontal, and diagonal edges in time-frequency domain, the edges in spatial domain can be utilized as a filter for noise suppression. Then the image from inverse transform will contain only required information. A free-response operating characteristic (FROC) curve is used to evaluate a performance of proposed method by applying it to thirty images of calcifications. The results show 82.19 percent true positive detection rate at the cost of 6.73 false positive per image.

This paper presents a new approach to shape and motion estimation based on geometric primitives and relations in a model-based framework. A description of a scene in terms of structured geometric elements sharing relationships allows to derive a parametric model with Euclidian constraints, and a camera model is also proposed to reduce the problem dimensionality. It leads to a sequential MAP estimation, that gives accurate and comprehensible results on real images.

This paper describes how the symmetry of a three-phase circuit prevents the symmetric modes of several subharmonic oscillations. First, we make mathematically it clear that the generation of symmetrical 1/3l-subharmonic oscillations (l=1,2,) are impossible in the three-phase circuit. As far as 1/(3l+1)-subharmonic oscillations (l=1,2,) and 1/(3l+2)-subharmonic oscillations (l=0,1,) are concerned, the former in negative-phase sequence and the latter in positive-phase sequence are shown to be impossible. Further, in order to confirm the above results, we apply the method of interval analysis to the circuit equations and obtain all steady state solutions with unsymmetric modes.

Power-line communication (PLC) systems have been assumed as the systems of low speed and low reliability. The low qualities of the systems, however, are not inherent of PLC but the result of inadequate design strategy of the systems. The systems with proper considerations of the characteristics of power-line as a communication medium achieve reliable high-speed data transmission in power-lines. In fact, the activities on the standardization of high-speed PLC systems have recently started in many countries, and variety of high-speed PLC systems are being to be purchased off-the-shelf. Following this trend of PLC, this manuscript first describes the features of power-line for communications and then explains technical issues on the design of PLC systems of the next generations as the infrastructure of information-communication technology age.

In this paper, a discrete-time convergence theorem for continuous-state Hopfield networks with self-interaction neurons is proposed. This theorem differs from the previous work by Wang in that the original updating rule is maintained while the network is still guaranteed to monotonically decrease to a stable state. The relationship between the parameters in a typical class of energy functions is also investigated, and consequently a "guided trial-and-error" technique is proposed to determine the parameter values. The third problem discussed in this paper is the post-processing of outputs, which turns out to be rather important even though it never attracts enough attention. The effectiveness of all the theorems and post-processing methods proposed in this paper is demonstrated by a large number of computer simulations on the assignment problem and the N-queen problem of different sizes.

Recently, code division multiple access scheme with time division duplex (CDMA/TDD) has drawn considerable attention as means to realize efficient wireless multimedia communications system. In this paper, we propose two time slot allocation algorithms for CDMA/TDD systems to efficiently accommodate multimedia traffic. Assuming a practical multiple cell environment and a multimedia service model which consists of several kinds of circuit-switched and packet-switched services with different quality of services (QoSs), we evaluate the average delay (average time from call generation to channel assignment) of the CDMA/TDD system with the proposed algorithms, and compare the performance with that of CDMA with frequency division duplex (CDMA/FDD) and time division multiple access with TDD (TDMA/TDD) systems. Our computer simulation results show that the CDMA/TDD system with one of the proposed algorithms, which can effectively avoid interference among users with different QoSs, can improve the average delay performance as compared with the other systems.

CATV networks are considered as promising transmission channels in that they permit wide bandwidth and high quality data communications. In apartment houses, however, the ingress noise in the up-links due to the tree and branch structure of a network deeply degrades the transmission performance of data communication channels. This is a serious problem especially in apartment houses which are often equipped with old coaxial cables. It permits the noise generated from electrical appliances to disturb up-link data communications. In this paper, we propose a wireless CATV system. In the proposed system, the noise generated in the room of a subscriber does not intrude into a trunk line. We analyze the upstream channels of this system. Based on the results of numerical analyses, we found that the proposed system is suitable and practical for up-link operation in CATV networks for apartment houses.

Available statistical skew models are too conservative in estimating the expected clock skew of a well-balanced H-tree. New closed form expressions are presented for accurately estimating the expected values and the variances of both the clock skew and the largest clock delay of a well-balanced H-tree. Based on the new model, clock period optimizations of wafer scale H-tree clock network are investigated under both conventional clocking mode and pipelined clocking mode. It is found that when the conventional clocking mode is used, clock period optimization of wafer scale H-tree is reduced to the minimization of expected largest clock delay under both area restriction and power restriction. On the other hand, when the pipelined clocking mode is considered, the optimization is reduced to the minimization of expected clock skew under power restriction. The results obtained in this paper are very useful in the optimization design of wafer scale H-tree clock distribution networks.

In this paper, a LSI design for video encoder and decoder for H.263+ video compression is presented. LSI operates under clock frequency of 27 MHz to compress QCIF (176144 pixels) at the frame rate of 30 frame per second. The core size is 4.6 4.6 mm2 in a 0.35 µm process. The architecture is based on bus connected heterogeneous dedicated modules, named as System-MSPA architecture. It employs the fast and small-chip-area dedicated modules in lower level and controls them by employing the slow and flexible programmable device and an external DRAM. Design results in success to achieve real time encoder in quite compact size without losing flexibility and expand ability. Real time emulation and easy test capability with external PC is also implemented.

This paper presents a variable rate transmission scheme suitable for bandlimited meteor burst channel. Meteor Burst Communication (MBC) is a unique type of radio communication, which is primarily used for non-realtime remote data collection. In the paper, along with conventional BPSK and QPSK modulations, QAM and M-ary Bi-orthogonal modulations are analyzed for software modem implementation in an MBC system. Performance of the modulation methods is presented for both static AWGN channel and meteor burst channel. The proposed scheme for variable rate transmission dynamically estimates the MBC channel and varies the modulation type of a software modem, to control the transmission rate between bursts. The scheme dynamically selects a modulation type and packet length that will maximize the average throughput of the system. Performance of the scheme is analyzed and compared with conventional fixed rate modems. A practical implementation for software modem is suggested that uses a common core modulator/demodulator structure.

Recently, an efficient algorithm has been proposed for finding all solutions of systems of nonlinear equations using inverses of approximate Jacobian matrices. In this letter, an effective technique is proposed for improving the computational efficiency of the algorithm with a little bit of computational effort.

Layout design for analog circuits has historically been a time consuming, error-prone, manual task. Its complexity results not so much from the number of devices, as from the complex interactions among devices or with the operating environment, and also from continuous-valued performance specifications. This paper addresses the problem of device-level placement for analog layout in a non-traditional way. Different from the classic approaches--exploring a huge search space with a combinatorial optimization technique, where the cells are represented by means of absolute coordinates, being allowed to illegally overlap during their moves in the chip plane--this paper advocates the use of non-slicing topological representations, like (symmetric-feasible) sequence-pairs, ordered- and binary- trees. Extensive tests, processing industrial analog designs, have shown that using skillfully the symmetry constraints (very typical to analog circuits) to remodel the solution space of the encoding systems, the topological representation techniques can achieve a better computation speed than the traditional approaches, while obtaining a similar high quality of the designs.

In this paper, we propose a new clock tree synthesis method for semi-synchronous circuits. A clock tree obtained by the proposed method is a multi-level multi-way clock tree such that a clock-input timing of each register is a multiple of a predefined unit delay and the wire length from a clock buffer to an element driven by it is bounded. The clock trees are constructed for several practical circuits. The size of constructed clock tree is comparable to a zero skew clock tree. In order to assure the practical quality of the clock trees, they are examined under the five delay conditions, which cover various environmental and manufacturing conditions. As a result, they are proved stable under each condition and improve the clock speed up to 17.3% against the zero skew clock trees.

In this paper, we present a design for an optical video transmission system employing a super wide-band FM modulation scheme. We focus on the design of optical transmitters and receivers, especially a wide-band electrical-to-optical converter and optical-to-electrical converter. With this system, it is important to develop optical and microwave devices which have a wide frequency response combined with flat group delay characteristics in order to improve the quality of the video signals after transmission. We also analyze theoretically the hybrid transmission capacity of AM analog video signals and 64QAM signals for digital video and data, and show the FM modulation parameters needed to realize high quality transmission. An experimental evaluation shows that our designed optical transmitter and receiver achieve high quality for the various channel plans for AM/64QAM hybrid transmission. The system has high received optical sensitivity and a wide optical dynamic range, allowing it to distribute analog video, digital video, and Internet data to many users over a wide area.

This paper presents an intelligent routing algorithm, called Q-Agents, which bases its actions only on the agent-environment interaction. This algorithm combines properties of three learning strategies (Q-learning, dual reinforcement learning and learning based on ant colony behavior), adding to them two further mechanisms to improve its adaptability. Hence, the proposed algorithm is composed of a set of agents, moving through the network independently and concurrently, searching for the best routes. The agents share knowledge about the quality of the paths traversed through indirect communication. Information about the network and traffic status is updated by using Q-learning and dual reinforcement updating rules. Q-Agents were applied to a model of an AT&T circuit-switched network. Experiments were carried out on the performance of the algorithm under variations of traffic patterns, load level and topology, and with addition of noise in the information used to route calls. Q-Agents suffered a lower number of lost calls than two algorithms based entirely on ant colony behavior.

As LSIs are two-dimensional structures, the number of external pins increases at a lower rate than the corresponding increase in the number of gates on the LSI. Therefore, the number of flip-flops on a scan path increases as the density of gates on LSIs rises, resulting in longer test application times. In this paper, three novel DFT strategies aimed at reducing test application time are proposed. DFT strategy 1 is a full scan design method with test point insertion, DFT strategy 2 is a partial scan design method, and DFT strategy 3 is a partial scan design method with test point insertion. Experimental results show that these DFT strategies reduced the test application times by 45% to 82% compared with conventional full scan design methods.

This paper introduces a new digital ATC (Automatic Train Control device) system. In the current ATC, the central ATC logic device calculates permissive speed of each blocking section and controls speed of all trains. On the other hand, in the new digital ATC, the central logic controller calculates each position to which a train can move safely, and sends the information on positions to all trains. On each train, the on-board equipment calculates an appropriate braking pattern with the information, and controls velocity of the train. That is, in the new system, the device on each train autonomously calculates permissive speed of that train. These special features realize ideal speed control of each train making full use of its performance for acceleration and deceleration, which in turns allows high-density train operations.

In this paper we consider a tensor-based approach to the analytical computation of higher-order expectations of quantized trajectories generated by Piecewise Affine Markov (PWAM) maps. We formally derive closed-form expressions for expectations of trajectories generated by three families of maps, referred to as (n,t)-tailed shifts, (n,t)-broken identities and (n,t,π)-mixing permutations. These families produce expectations with asymptotic exponential decay whose detailed profile is controlled by map design. In the (n,t)-tailed shift case expectations are alternating in sign, in the (n,t)-broken identity case they are constant in sign, and the (n,t,π)-mixing permutation case they follow a dumped periodic trend.