Recently, neural networks (NNs) have been extensively applied to many signal processing problem due to their robust abilities to form complex decision regions. In particular, neural networks add flexibility to the design of equalizers for digital communication systems. Recurrent neural network (RNN) is a kind of neural network with one or more feedback loops, whereas self-organizing map (SOM) is characterized by the formation of a topographic map of the input patterns in which the spatial locations (i.e., coordinates) of the neurons in the lattice are indicative of intrinsic statistical features contained in the input patterns. In this paper, we propose a novel receiver structure by combining adaptive RNN equalizer with a SOM detector under serious ISI and nonlinear distortion in QAM system. According to the theoretical analysis and computer simulation results, the performance of the proposed scheme is shown to be quite effective in channel equalization under nonlinear distortion.

It have been one open and significant topic for real-time applications to enhance the processing-speed of Boltzmann machines for long time. One effective way of solution of this problem is the augmentation of probability of neurons' state move. In this paper, a novel method, called a rejectionless method, was proposed and introduced into the Boltzmann machines for this augmentation. This method has a feature of independence on the ratio of neurons' state move. The efficiency of this method for speed-up was confirmed with the experiments of TSP and graph problem.

Despite the enormous power of present-day computers, digital systems cannot respond to real-world events in real time. Biological systems, however, while being built with very slow chemical transistors, are very fast in such tasks like seeing, recognizing, and taking immediate actions. This paper discusses the issue of how we can build real-time intelligent systems directly on silicon. An intelligent VLSI system inspired by a psychological brain model is proposed. The system stores the past experience in the on-chip vast memory and recalls the maximum likelihood event to the current input based on the associative processor architecture. Although the system can be implemented in a CMOS digital technology, we are proposing here to implement the system using circuits operating in the analog/digital-merged decision making principle. Low-level processing is done in the analog domain in a fully parallel manner, which is immediately followed by a binary decision to yield answers in digital formats. Such a scheme would be very advantageous in achieving a high throughput computation under limited memory and computational resources usually encountered in mobile applications. Hardware-friendly algorithms have been developed for real-time image recognition using the associative processor architecture and some experimental results are demonstrated.

A number of studies have recently been published concerning chaotic neuron models and asynchronous neural networks having chaotic neuron models. In the case of large-scale neural networks having chaotic neuron models, the neural network should be constructed using analog hardware, rather than by computer simulation via software, due to the high speed and high integration of analog circuits. In the present study, we discuss the circuit structure of a chaotic neuron model, which is constructed on the basis of the mathematical model of an asynchronous chaotic neuron. We show that the pulse-type hardware chaotic neuron model can be constructed on the basis of the mathematical model of an asynchronous chaotic neuron. The proposed model is an effective model for the cell body section of the pulse-type hardware chaotic neuron model for ICs. In addition, we show the bifurcation structure of our composed model, and discuss the bifurcation routes and return maps thereof.

Functional magnetic resonance imaging (fMRI) allows to display functional activities of certain brain areas. In combination with a three dimensional anatomical dataset, acquired with a standard magnetic resonance (MR) scanner, it can be used to identify eloquent brain areas, resulting in so-called functional neuronavigation, supporting the neurosurgeon while planning and performing the operation. But during the operation brain shift leads to an increasing inaccuracy of the navigation system. Intraoperative MR imaging is used to update the neuronavigation system with a new anatomical dataset. To preserve the advantages of functional neuronavigation, it is necessary to save the functional information. Since fMRI cannot be repeated intraoperatively with the unconscious patient easily we tried to solve this problem by means of image processing and pattern recognition algorithms. In this paper we present an automatic approach for transfering preoperative markers into an intraoperative 3-D dataset. In the first step the brains are segmented in both image sets which are then registered and aligned. Next, corresponding points are determined. These points are then used to determine the position of the markers by estimating the local influence of brain shift.

In this paper, a discrete-time convergence theorem for continuous-state Hopfield networks with self-interaction neurons is proposed. This theorem differs from the previous work by Wang in that the original updating rule is maintained while the network is still guaranteed to monotonically decrease to a stable state. The relationship between the parameters in a typical class of energy functions is also investigated, and consequently a "guided trial-and-error" technique is proposed to determine the parameter values. The third problem discussed in this paper is the post-processing of outputs, which turns out to be rather important even though it never attracts enough attention. The effectiveness of all the theorems and post-processing methods proposed in this paper is demonstrated by a large number of computer simulations on the assignment problem and the N-queen problem of different sizes.

In this paper we show that the neuron filter is effective for relaxing the coefficient sensitiveness of the Hopfield neural network for combinatorial optimization problems. Since the parameters in motion equation have a significant influence on the performance of the neural network, many studies have been carried out to support determining the value of the parameters. However, not a few researchers have determined the value of the parameters experimentally yet. We show that the use of the neuron filter is effective for the parameter tuning, particularly for determining their values experimentally through simulations.

Detection of nonlinearly distorted signals is an essential problem in telecommunications. Recently, neural network combined conventional equalizer has been used to improve the performance especially in compensating for nonlinear distortions. In this paper, the self-organizing map (SOM) combined with the conventional symbol-by-symbol detector is used as an adaptive detector after the output of the decision feedback equalizer (DFE), which updates the decision levels to follow up the nonlinear distortions. In the proposed scheme, we use the box distance to define the neighborhood of the winning neuron of the SOM algorithm. The error performance has been investigated in both 16 QAM and 64 QAM systems with nonlinear distortions. Simulation results have shown that the system performance is remarkably improved by using SOM detector compared with the conventional DFE scheme.

Multilayer feedforward neural network (MFNN) trained by the backpropagation (BP) algorithm is one of the most significant models in artificial neural networks. MFNNs have been used in many areas of signal and image processing due to high applicability. Although they have been implemented as analog, mixed analog-digital and fully digital VLSI circuits, it is still difficult to realize their hardware implementation with the BP learning function efficiently. This paper describes a special BP algorithm for the logic oriented neural network (LOGO-NN) which we have proposed as a sort of MFNN with quantized weights and multilevel threshold neurons. Both weights and neuron outputs are quantized to integer values in LOGO-NNs. Furthermore, the proposed BP algorithm can reduce high precise calculations. Therefore, it is expected that LOGO-NNs with BP learning can be more effectively implemented as digital type circuits than the common MFNNs with the classical BP. Finally, it is shown by simulations that the proposed BP algorithm for LOGO-NNs has good performance in terms of the convergence rate, convergence speed and generalization capability.

This paper presents an application of Complex-Valued Associative Memory Model(CAMM) for image processing. An image association system applying CAMM, combined with a 2-dimensional discrete Fourier transform (2-D DFT) process is proposed. Discussed are how a gray level image can be expressed using CAMM, and the image association that can be performed by CAMM. In the proposed system, input images are transformed to phase matrices and the image association can be performed by making use of the phase information. Practical examples are also presented.

A constraint resolution scheme in the Hopfield-type neural network named "Neuron Filter" is presented for efficiently solving combinatorial optimization problems. The neuron filter produces an output that satisfies the constraints of the problem as best as possible according to both neuron inputs and outputs. This paper defines the neuron filter and shows its introduction into existing neural networks for N-queens problems and FPGA board-level routing problems. The performance is evaluated through simulations where the results show that our neuron filter improves the searching capability of the neural network with the shorter computation time.

In this paper we shall put forward a novel circularly connected synergetic neural network extending the previously studied auto-correlation or cross-correlation dynamics so as to realise a group memory retrieval. The present model is substantially based on a top-down approach of the dynamic rule of an analog neural network in the similar manner to the conventional synergetic dynamics early proposed by Haken. It will be proved that a complete association can be assured up to the same number of the embedded patterns as the minimal number of neurons of the linked synergetic neural networks. In addition, one finds that a searching process of a couple of embedded patterns can be also realised by means of controlling attraction parameters as was previously reported in the autoassociative synergetic models.

This article theoretically provides the ensemble average and the ensemble variance of membrane potential of an integrate-and-fire neuron, when the neuron receives random spikes from the other neurons. The model assumes that EPSPs rise and fall continuously. Our theoretical result shows good agreement with a numerical simulation.

A new phasor model of neural networks is proposed in which the state of each neuron possibly takes the value at the origin as well as on the unit circle. A stability property of equilibria is studied in association with the energy landscape. It is shown that a simple condition guarantees an equilibrium to be asymptotically stable.

A neuron MOS transistor has a floating gate and multiple input gates which are capacitively coupling with the floating gate. Dramatic reduction in the number of transistors and interconnections was achieved by employing the neuron MOS in circuit designs. Since the neuron MOS gate electrode is electrically floating, it is not necessarily easy to calculate the floating gate potential using circuit simulator SPICE. In order to simulate floating gate neuron MOS circuits, a macromodel which calculates the floating gate potential combining resistances and dependent voltage and current sources has been proposed. Eight kinds of neuron MOS circuits were designed and fabricated by a double polysilicon two level metal 1.2 µ m CMOS process. Utilizing SPICE, all the neuron MOS circuits were confirmed to operate correctly. The apparent threshold voltage as seen from the input gate in the 2-input n-channel neuron MOS transistor is arbitrarily changed by a control gate signal. Multi-input neuron MOS inverters and neuron MOS full adder circuits have been successfully simulated. Moreover, the effectiveness of the proposed macromodel has been experimentally verified by fabricated circuit measurements. Measured results confirmed that 3-input neuron MOS inverter outputs the low level when the number of input gates to which a high level is applied is more than half of all input gates.

An analog vector quantization processor has been designed based on the neuron-MOS (νMOS) technology. In order to achieve a high integrating density, template information is merged into the matching cell (the absolute value circuitry) using the νMOS ROM technology. A new-architecture νMOS winner-take-all (WTA) circuit is employed for fully-parallel search for the minimum-distance vector. The WTA performs multi-resolution winner search with an automatic feedback gain control. A test chip having 256 16-element fixed template vectors has been built in a 1.5-µm double-polysilicon CMOS technology with the chip size of 7.2 mm 7.2 mm, and the basic operation of the circuits has been demonstrated.

We investigate bifurcations of burst oscillations with rectangular waveform observed in a modified Bonhöffer-van der Pol equation, which is considered as a circuit model for neurons of a feeding rhythm generator. In particular, we clarify a mechanism of properties in a one-parameter graph on the period of oscillations, showing a staircase with hysteresis jumps, by studying a successive bifurcation process including a chain of homoclinic bifurcations. The occurrence of homoclinic bifurcations is confirmed by using the linking number of limit cycles related with the stable manifold through an equilibrium.

A neuron-MOS transistor (νMOS) is applied to current-mode multi-valued logic (MVL) circuits. First, a novel low-voltage and low-power νMOS current mirror is presented. Then, a threshold detector and a quaternary T-gate using the proposed νMOS current mirrors are proposed. The minimum output voltage of the νMOS current mirror is decreased by VT (threshold voltage), compared with the conventional double cascode current mirror. The νMOS threshold detector is built on a νMOS current comparator originally composed of νMOS current mirrors. It has a high output swing and sharp transfer characteristics. The gradient of the proposed comparator output in the transfer region can be increased 6.3-fold compared with that in the conventional comparator. Along with improved operation of the novel current comparator, the discriminative ability of the proposed νMOS threshold detector is also increased. The performances of the proposed circuits are validated by HSPICE with Motorola 1.5 µm CMOS device parameters. Furthermore, the operation of a νMOS current mirror is also confirmed through experiments on test chips fabricated by VDEC*. The active area of the proposed νMOS current mirror is 63 µm 51 µm.

In this paper, a four-quadrant analog multiplier consisting of four neuron-MOS transistors and two load resistors is proposed. The proposed multiplier can be operated at only 1 V. Furthermore, the input range of the multiplier is equal to 100% of the supply voltage. The theoretical harmonic distortion caused by mobility degradation and device mismatchs is derived in detail. The performance of the proposed multiplier is characterized through HSPICE simulations with a standard 2.0 µm CMOS process with a double-poly layer. Simulations of the proposed multiplier demonstrate that the linearity error of 0.77% and a total harmonic distortion of 0.62% are obtained with full-scale input conditions. The maximum power consumption and 3 dB bandwidth are 9.56 µW and 107 MHz, respectively. The active area of the proposed multiplier is 210 µm 140 µm.

We show by numerical calculations that a chaotic neuron model driven by a weak sinusoid has resonance. This resonance phenomenon has a peak at a drive frequency similar to that of noise-induced stochastic resonance (SR). This neuron model was proposed from biological studies and shows a chaotic response when a parameter is varied. SR is a noise induced effect in driven nonlinear dynamical systems. The basic SR mechanism can be understood through synchronization and resonance in a bistable system driven by a subthreshold sinusoid plus noise. Therefore, background noise can boost a weak signal using SR. This effect is found in biological sensory neurons and obviously has some useful sensory function. The signal-to-noise ratio (SNR) of the driven chaotic neuron model is improved depending on the drive frequency; especially at low frequencies, the SNR is remarkably promoted. The resonance mechanism in the model is different from the noise-induced SR mechanism. This paper considers the mechanism and proposes possible explanations. Also, the meaning of chaos in biological systems based on the resonance phenomenon is considered.