Finding corresponding edges is considered being the most difficult part of edge-based stereo matching algorithms. Usually, correspondence for a feature point in the first image is obtained by searching in a predefined region of the second image, based on epipolar line and maximum disparity. Reduction of search region can increase performances of the matching process, in the context of execution time and accuracy. Traditionally, hierarchical multiresolution techniques, as the fastest methods are used to decrease the search space and therefore increase the processing speed. Considering maximum of directional derivative of disparity in real scenes, we formulated some relations between maximum search space in the second images with respect to relative displacement of connected edges (as the feature points), in successive scan lines of the first images. Then we proposed a new matching strategy to reduce the search space for edge-based stereo matching algorithms. Afterward, we developed some fast stereo matching algorithms based on the proposed matching strategy and the hierarchical multiresolution techniques. The proposed algorithms have two stages: feature extraction and feature matching. We applied these new algorithms on some stereo images and compared their results with those of some hierarchical multiresolution ones. The execution times of our proposed methods are decreased between 30% to 55%, in the feature matching stage. Moreover, the execution time of the overall algorithms (including the feature extraction and the feature matching) is decreased between 15% to 40% in real scenes. Meanwhile in some cases, the accuracy is increased too. Theoretical investigation and experimental results show that our algorithms have a very good performance with real complex scenes, therefore these new algorithms are very suitable for fast edge-based stereo applications in real scenes like robotic applications.

In recent years, the domino logic has received much attention as a design technique of high-speed circuits. However, in the case of standard domino logic, only non-inverting functions are allowed. Then, the clock-delayed (CD) domino logic that provides any logic function is proposed in order to overcome such domino's drawback. In addition, domino circuits are more sensitive to circuit noise compared with static CMOS circuits. In particular, crosstalk causes critical problems. Therefore, we focus our attention on crosstalk faults in CD domino circuits. However, in CD domino circuits, there are faults that don't propagate faulty values to any primary output even though crosstalk pulses are generated. Then, we remove such faults from the target fault list by considering structures of CD domino circuits, and perform a fault simulation for the reduced target fault list using two kinds of fault simulation method together. We realize CD domino circuits in VHDL and perform the proposed fault simulation for the combinational part of some benchmark circuits of ISCAS'89 on a VHDL simulator. Fault coverage for random vectors was obtained for s27 to s1494 under the limitation of simulation time.

This paper presents a test vector modification method for reducing average power dissipation during test application for a full-scan circuit. The method first identifies a set of don't care (X) inputs of given test vectors, to which either logic value 0 or 1 can be assigned without losing fault coverage. Then, the method reassigns logic values to the X inputs so as to decrease switching activity of the circuit during scan shifting. Experimental results for benchmark circuits show the proposed method could decrease switching activity of a given test set to 45% of the original test sets in average.

The increase of test time of embedded DRAMs (e-DRAM) is one of the key issues of System-on-chip (SOC) device test. This paper proposes to put the repair analysis function on chip as Built In Self Repair (BISR). BISR is performed at 166 MHz as at-speed of e-DRAM with using low cost automatic test equipment (ATE). The area of the BISR is 1.7 mm2. Using error storage table form contributes to realize small area penalty of repair analysis function. e-DRAM function test time by BISR was about 20% less than the conventional method at wafer level testing. Moreover, representative samples are produced to confirm repair analysis ability. The results show that all of the samples are actually repaired by repair information generated by BISR.

To classify the significant wavelet coefficients into edge area and noise area, a morphological clustering filter applied to wavelet shrinkage is introduced. New methods for wavelet shrinkage using morphological clustering filter are used in noise removal, and the performance is evaluated under various noise conditions.

This letter investigates sidelobe levels of a two-bit digital phased array composed of a small number of elements. Among several phase shifter designs applicable to phased arrays, a two-bit design needs the least number of circuit elements so that the development and manufacturing need the lowest cost. Now the following questions arise. Is a two-bit phased array practical? How low can its sidelobe level be reduced? To answer the questions, three methods are tried to reduce the sidelobe level of a uniformly-excited linear array of isotropic elements. The methods are the quadratic-phase feed method, the partially randomizing method of periodic phase errors, and the genetic algorithm (GA) approach. Among the methods, the quadratic-phase feed method provides the lowest sidelobe level around -12.5 dB - -13.2 dB in the steering angles from 0 to 48 degrees for a 21-element, half-wavelength spacing array, and -11.2 dB - -13.0 dB in the steering angles from 0 to 30 degrees for an 11-element, 0.6-wavelength spacing array. Although it depends on the system requirement, these values would be acceptable in some applications, hence a two-bit phased array designed properly may be practical in an actual system.

A technique that uses a linear prediction error filter (LPEF) and an adaptive digital filter (ADF) to achieve noise reduction in a speech degraded by additive background noise is proposed. It is known that the coefficients of the LPEF converge such that the prediction error signal becomes white. Since a voiced speech can be represented as the stationary periodic signal over a short interval of time, most of voiced speech cannot be included in the prediction error signal of the LPEF. On the other hand, when the input signal of the LPEF is a background noise, the prediction error signal becomes white. Assuming that the background noise is represented as generate by exciting a linear system with a white noise, then we can reconstruct the background noise from the prediction error signal by estimating the transfer function of noise generation system. This estimation is performed by the ADF which is used as system identification. Noise reduction is achieved by subtracting the noise reconstructed by the ADF from the speech degraded by additive background noise.

The electronically steerable passive array radiator (ESPAR) antenna is one kind of the parasitic elements based single-port output antennas with several variable reactances. It performs analog aerial beamforming and none of the signals on its passive elements can be observed. This fact and one that is more important--the nonlinear dependence of the output of the antenna from adjustable reactances--makes the problem substantially new and not resolvable by means of conventional adaptive array beamforming techniques. A novel approach based on stochastic approximation theory is proposed for the adaptive beamforming of the ESPAR antenna as a nonlinear spatial filter by variable parameters, thus forming both beam and nulls. Two learning rate schedule were examined about output SINR, stability, convergence, misadjustment, noise effect, bias term, etc., and the optimal one was proposed. Further development was traced. Our theoretic study, simulation results and performance analysis show that the ESPAR antenna can be controlled effectively, has strong potential for use in mobile terminals and seems to be very perspective.

An approach to the enhancement of speech signals corrupted by additive colored noise is proposed and the system architecture to implement the proposed idea in real-time communication is introduced in this paper. A combination of a bandpass FIR filtering technique with wiener filtering is used to improve the SNR for speech signals. The average SNR improvement (between input and output SNR) is 22.48 dB. The additive noises are the sound from a turbo prop aircraft. The system, which shows excellent performance, is designed based on a 16 bits fixed point DSP (ADSP-2181) from Analog Devices. Experiment results demonstrate that the FIR filter leads to a significant gain in SNR, thus visibly improvement for the quality and the intelligibility of the speech.

The electronically steerable passive array radiator (ESPAR) antenna performs analog aerial beamforming that has only a single-port output and none of the signals on its passive elements can be observed. This fact and one that is more important--the highly nonlinear dependence of the output of the antenna from adjustable reactances--makes the problem substantially new and not resolvable by means of conventional adaptive array beamforming techniques. A novel approach based on stochastic approximation theory is proposed for the adaptive beamforming of the ESPAR antenna as a nonlinear spatial filter by variable parameters, thus forming both beam and nulls. Our theoretic study, simulation results and performance analysis show that the ESPAR antenna can be controlled effectively, has strong potential for use in mobile terminals and seems to be very perspective.

This paper develops a simple algorithm for calculating a polynomial curve or surface in a parallel way. The number of arithmetic operations and the necessary time for the calculation are evaluated in terms of polynomial degree and resolution of a curve and the number of processors used. We made some comparisons between our method and a conventional method for generating polynomial curves and surfaces, especially in computation time and approximation error due to the reduction of the polynomial degree. It is shown that our method can perform fast calculation within tolerable error.

Grouping multiple voice frames into a single IP packet ("frame grouping") is a commonly mentioned approach to saving bandwidth in IP telephony. But little is known as to when, how, and how much frame grouping should be done in Internet environment. This paper explores the feasibility and the methods of frame grouping based on Internet delay measurement. Specifically, we propose an adaptive frame grouping method that minimizes the delay violation while reducing the bandwidth usage by as much as a factor of two under real Internet delay fluctuations. The performance of the method is evaluated as it is used against a single voice stream and then against multiple voice streams.

We propose a frequency stabilization system for laser diodes (LD's), in which the major parameters in the stabilization process can be controlled in respond to the monitored frequency noise characteristics in real-time basis. The performance of this system was also tested through stabilizing a 35 mW visible LD. The center frequency of the LD has been stabilized by negative electrical feedback based on Pound-Drever-Hall technique. The linewidth of the LD has been reduced by adapting optical feedback from resonant confocal Fabry-Perot (CFP) cavity. The controlling parameters, especially gain levels and frequency responses of the negative electrical feedback loop can be manipulated to remove the instantaneous frequency noise by monitoring power spectral density (PSD) of the frequency error signals in the real-time basis. The achieved PSD of frequency noise of a sample LD stabilized by the present system was less than 1105 Hz2/Hz for the Fourier frequency < 10 MHz. The reduced linewidth was estimated to be narrower than 400 kHz. The achieved minimum square root of the Allan variance was 3.910-11 at τ = 0.1 msec.

This report describes a new methodology for the optimal placement of decoupling capacitors on the printed circuit board (PCB). This method searches the optimal position of decoupling capacitor so that the impedance characteristics at the power supply is minimized in the specified frequency range. In this method, the PCB is modeled by the PEEC method to handle the 3-dimensional structures and Krylov-subspace technique is applied to obtain efficiently the impedance characteristics in the frequency domain.

Conventional adaptive array antenna processing must access signals on all of the array antenna elements. However, because the low-cost electronically steerable passive array radiator (ESPAR) antenna only has a single-port output, all of the signals on the antenna elements cannot be observed. In this paper, a technique for adaptively controlling the loaded reactances on the passive radiators, thus forming both beam and nulls, is presented for the ESPAR antenna. The adaptive algorithm is based on the steepest gradient theory, where the reactances are sequentially perturbed to determine the gradient vector. Simulations show that the ESPAR antenna can be adaptive. The statistical performance of the output SIR of the ESPAR antenna is also given.

This paper describes simple and efficient (linear-preserving) reductions between the Decision Diffie-Hellman problem and related problems.

Elliptic curve cryptosystems are based on the elliptic curve discrete logarithm problem (ECDLP). If elliptic curve cryptosystems avoid FR-reduction and anomalous elliptic curve over Fq, then with current knowledge we can construct elliptic curve cryptosystems over a smaller definition field. ECDLP has an interesting property that the security deeply depends on elliptic curve traces rather than definition fields, which does not occur in the case of the discrete logarithm problem (DLP). Therefore it is important to characterize elliptic curve traces explicitly from the security point of view. As for FR-reduction, supersingular elliptic curves or elliptic curve E/Fq with trace 2 have been reported to be vulnerable. However unfortunately these have been only results that characterize elliptic curve traces explicitly for FR- and MOV-reductions. More importantly, the secure trace against FR-reduction has not been reported at all. Elliptic curves with the secure trace means that the reduced extension degree is always higher than a certain level. In this paper, we aim at characterizing elliptic curve traces by FR-reduction and investigate explicit conditions of traces vulnerable or secure against FR-reduction. We show new explicit conditions of elliptic curve traces for FR-reduction. We also present algorithms to construct such elliptic curves, which have relation to famous number theory problems.

To develop a smoothing method for speckle reduction is a significant problem, because of the complex ultrasonic characteristics and the obscurity of the tissue image. This paper presents a new method for speckle reduction from medical ultrasonic image by using fuzzy morphological speckle reduction algorithm (FMSR) that preserves resolvable details while removing speckle in order to cope with the ambiguous and obscure ultrasonic images. FMSR creates a cleaned image by recombining the processed residual images with a smoothed version of an original image. Performance of the proposed method has been tested on the phantom and tissue images. The results show that the method effectively reduces the speckle while preserving the resolvable details.

This paper is concerned with fuzzy modeling in some reduction methods of inference rules with gradient descent. Reduction methods are presented, which have a reduction mechanism of the rule unit that is applicable in three parameters--the central value and the width of the membership function in the antecedent part, and the real number in the consequent part--which constitute the standard fuzzy system. In the present techniques, the necessary number of rules is set beforehand and the rules are sequentially deleted to the prespecified number. These methods indicate that techniques other than the reduction approach introduced previously exist. Experimental results are presented in order to show that the effectiveness differs between the proposed techniques according to the average inference error and the number of learning iterations.

This paper proposes an efficient reduction method for a substrate network model, which is extracted from layout data, to analize a substrate coupling noise. The proposed method adopts in a reduction operation a hierarchic structure of a substrate RC network model, a computational procedure using matrix elements, and an expression of admittance as polynominal in complex frequency s=jω. These techniques improve computational efficiency and are suitable for an implementation. In the example of a triple well CMOS circuit, a reduced model, from 7500 nodes to 5 nodes, has less than 25% errors up to 1 GHz.