Blind nonlinear compensation for RF receivers is an important research topic in 5G mobile communication, in which higher level modulation schemes are employed more often to achieve high capacity and ultra-broadband services. Since nonlinear compensation circuits must handle intermodulation bandwidths that are more than three times the signal bandwidth, reducing the sampling frequency is essential for saving power consumption. This paper proposes a novel blind nonlinear compensation technique that employs sub-Nyquist sampling analog-to-digital conversion. Although outband distortion spectrum is folded in the proposed sub-Nyquist sampling technique, determination of compensator coefficients is still possible by using the distortion power. Proposed technique achieves almost same compensation performance in EVM as the conventional compensation scheme, while reducing sampling speed of analog to digital convertor (ADC) to less than half the normal sampling frequency. The proposed technique can be applied in concurrent dual-band communication systems and adapt to flat Rayleigh fading environments.

We propose a novel bit error rate (BER) analysis model of weighted-type fractional Fourier transform (WFRFT)-based systems with WFRFT order offset Δα. By using the traditional BPSK BER analysis method, we deduce the equivalent signal noise ratio (SNR), model the interference in the channel as a Gaussian noise with non-zero mean, and provide a theoretical BER expression of the proposed system. Simulation results show that its theoretical BER performance well matches the empirical performance, which demonstrates that the theoretical BER analysis proposed in this paper is reliable.

Radar-absorbent materials (RAM) with various characteristics, such as broadband, oblique-incidence, and polarization characteristics, have been developed according to applications in recent years. This paper presents the optimized design method of two flat layers RAM with both broadband and oblique-incidence characteristics for the required RAM performance. The oblique-incidence characteristics mean that the RAM is possible to absorb radio waves continuously up to the maximum incidence angle. The index of the wave-absorption amount is 20dB, corresponding to an absorption rate of 99%. Because determination of the electrical material constant of each layer is the most important task with respect to the received frequency and the incidence angle, we optimized the values by using Non-dominated sorting genetic algorithm-II (NSGA-II). Two types of flat-layer RAM composed of dielectric and magnetic materials were designed and their characteristics were evaluated. Consequently, it was confirmed that oblique-incidence characteristics were better for the RAM composed of dielectric materials. The dielectric RAM achieved an incidence angle of up to 60° with broadband characteristics and a relative bandwidth of 77.01% at the transverse-magnetic (TM) wave incidence. In addition, the magnetic RAM could lower the minimum frequency of the system more than the dielectric RAM. The minimum frequency of the magnetic RAM was 1.38GHz with a relative bandwidth of 174.18% at TM-wave incidence and an incidence angle of 45°. We confirmed that it is possible to design RAM with broadband characteristics and continuous oblique-incidence characteristics by using the proposed method.

Bilinear-type conversion is to translate a cryptographic scheme designed over symmetric bilinear groups into one that works over asymmetric bilinear groups with small overhead regarding the size of objects concerned in the target scheme. In this paper, we address scalability for converting complex cryptographic schemes. Our contribution is threefold. Investigating complexity of bilinear-type conversion. We show that there exists no polynomial-time algorithm for worst-case inputs under standard complexity assumption. It means that bilinear-type conversion in general is an inherently difficult problem. Presenting a new scalable conversion method. Nevertheless, we show that large-scale conversion is indeed possible in practice when the target schemes are built from smaller building blocks with some structure. We present a novel conversion method, called IPConv, that uses 0-1 Integer Programming instantiated with a widely available IP solver. It instantly converts schemes containing more than a thousand of variables and hundreds of pairings. Application to computer-aided design. Our conversion method is also useful in modular design of middle to large scale cryptographic applications; first construct over simpler symmetric bilinear groups and run over efficient asymmetric groups. Thus one can avoid complication of manually allocating variables over asymmetric bilinear groups. We demonstrate its usefulness by somewhat counter-intuitive examples where converted DLIN-based Groth-Sahai proofs are more compact than manually built SXDH-based proofs. Though the early purpose of bilinear-type conversion is to save existing schemes from attacks against symmetric bilinear groups, our new scalable conversion method will find more applications beyond the original goal. Indeed, the above computer-aided design can be seen as a step toward automated modular design of cryptographic schemes.

Fail-Stop Signature (FSS) scheme is a signature scheme which satisfies unforgeability even against a forger with super-polynomial computational power (i.e. even against a forger who can compute acceptable signatures) and non-repudiability against a malicious signer with probabilistic polynomial time computational power (i.e. a PPT malicious signer). In this paper, under some settings, the equivalence relation has been derived between a set of security properties when single FSS scheme is used singly and a security property called Universally Composable (UC) security when plural FSS schemes are concurrently used. Here, UC security is a security property guaranteeing that even when plural schemes are concurrently used, security properties of each scheme (for single scheme usage) are preserved. The above main settings are as follows. Firstly, H-EUC (Externalized UC) security is introduced instead of “conventional” UC security, where a new helper functionality H is constructed appropriately. It is because that we can derive “conventional” UC security cannot hold for FSS schemes when malicious parties (e.g. a forger and a malicious signer) have super-polynomial computational power. In the environment where the above helper functionality H is used, all parties are PPT, but only a forger may compute acceptable signatures by obtaining some additional information from H. Secondly, the definition of unforgeability (in a set of security properties for single FSS scheme usage) is revised to match the above environment. The above equivalence relation derived under the above settings guarantees that even when plural FSS schemes are concurrently used, those security properties for single scheme usage are preserved, provided that some conditions hold. In particular, the equivalence relation in this paper has originality in terms of guaranteeing that unforgeability is preserved even against a forger who is PPT but may compute acceptable signatures. Furthermore, it has been firstly proved in this paper that H-EUC security holds for an existing instantiation of an FSS scheme by Mashatan et al. From this, it can be said that the equivalence relation shown in this paper is practical.

Modern digital integrated circuits (ICs) are often designed and fabricated by third parties and tools, which can make IC design/fabrication vulnerable to malicious modifications. The malicious circuits are generally referred to as hardware Trojans (HTs) and they are considered to be a serious security concern. In this paper, we propose a logic-testing based HT detection and classification method utilizing steady state learning. We first observe that HTs are hidden while applying random test patterns in a short time but most of them can be activated in a very long-term random circuit operation. Hence it is very natural that we learn steady signal-transition states of every suspicious Trojan net in a netlist by performing short-term random simulation. After that, we simulate or emulate the netlist in a very long time by giving random test patterns and obtain a set of signal-transition states. By discovering correlation between them, our method detects HTs and finds out its behavior. HTs sometimes do not affect primary outputs but just leak information over side channels. Our method can be successfully applied to those types of HTs. Experimental results demonstrate that our method can successfully identify all the real Trojan nets to be Trojan nets and all the normal nets to be normal nets, while other existing logic-testing HT detection methods cannot detect some of them. Moreover, our method can successfully detect HTs even if they are not really activated during long-term random simulation. Our method also correctly guesses the HT behavior utilizing signal transition learning.

A phase locking value (PLV) in electrocorticography is an essential indicator for analysis of cognitive activities and detection of severe diseases such as seizure of epilepsy. The PLV computation requires a simultaneous pursuit of high-throughput and low-cost implementation in hardware acceleration. The PLV computation consists of bandpass filtering, Hilbert transform, and mean phase coherence (MPC) calculation. The MPC calculation includes trigonometric functions and divisions, and these calculations require a lot of computational amounts. This paper proposes an MPC calculation method that removes high-cost operations from the original MPC with mathematically identical derivations while the conventional methods sacrifice either computational accuracy or throughput. This paper also proposes a hardware implementation of MPC calculator whose latency is 21 cycles and pipeline interval is five cycles. Compared with the conventional implementation with the same standard cell library, the proposed implementation marks 2.8 times better hardware implementation efficiency that is defined as throughput per gate counts.

In this paper, we propose a design of reversible adder/subtractor blocks and arithmetic logic units (ALUs). The main concept of our approach is different from that of the existing related studies; we emphasize the function design. Our approach of investigating the reversible functions includes (a) the embedding of irreversible functions into incompletely-specified reversible functions, (b) the operation assignment, and (c) the permutation of function outputs. We give some extensions of these techniques for further improvements in the design of reversible functions. The resulting reversible circuits are smaller than that of the existing design in terms of the number of multiple-control Toffoli gates. To evaluate the quantum cost of the obtained circuits, we convert the circuits to reduced quantum circuits for experiments. The results also show the superiority of our realization of adder/subtractor blocks and ALUs in quantum cost.

This paper describes a design methodology for process variation aware D-Flip-Flop (DFF) using regression analysis. We propose to use a regression analysis to model the worst-case delay characteristics of a DFF under process variation. We utilize the regression equation for transistor width tuning of the DFF to improve its worst-case delay performance. Regression analysis can not only identify the performance-critical transistors inside the DFF, but also shows these impacts on DFF delay performance in quantitative form. Proposed design methodology is verified using Monte-Carlo simulation. The result shows the proposed method achieves to design a DFF which has similar or better delay characteristics in comparison with the DFF designed by an experienced cell designer.

This paper proposes a novel dynamic channel assignment scheme named interference-aware dynamic channel assignment (IA-DCA) for the downlink of enterprise small-cell networks (ESNs) that employ orthogonal frequency division multiple access (OFDMA) and frequency division duplexing (FDD). In ESNs, a lot of small-cell access points (SAPs) are densely deployed in a building and thus small-cell user equipments (SUEs) have more serious co-tier interference from neighbor SAPs than the conventional small-cell network. Therefore, in the proposed IA-DCA scheme, a local gateway (LGW) dynamically assigns different numbers of subchannel groups to SUEs through their serving SAPs according to the given traffic load and interference information. Through simulation results, we show that the proposed IA-DCA scheme outperforms other dynamic channel assignment schemes based on graph coloring algorithm in terms of the mean SUE capacity, fairness, and mean SAP channel utilization.

Compressed Sensing (CS) is known to provide better channel estimation performance than the Least Square (LS) method for channel estimation. However, multipath delays may not be resolved if they span between the grids. This grid problem of CS is an obstacle to super resolution channel estimation. An Atomic Norm (AN) minimization is one of the methods for estimating continuous parameters. The AN minimization can successfully recover a spectrally sparse signal from a few time-domain samples even though the dictionary is continuous. There are studies showing that the AN minimization method has better resolution than conventional CS methods. In this paper, we propose a channel estimation method based on the AN minimization for Spread Spectrum (SS) systems. The accuracy of the proposed channel estimation is compared with the conventional LS method and Dantzig Selector (DS) of the CS. In addition to the application of channel estimation in wireless communication, we also show that the AN minimization can be applied to Global Positioning System (GPS) using Gold sequence.

Network coding signature (NCS) scheme is a cryptographic tool for network coding against pollution attacks. In [5], Chang et al. first introduced the related-key attack (RKA) to the NCS schemes and tried to give an instantiation of it. However, their instantiation is based on the random oracle (RO) model. In this letter, we present a standard-model instantiation. In particular, we prove that standard-model-based NCS scheme introduced by Boneh et al. in [4] (BFKW scheme, for short) can achieve Φ-RKA security if the underlying signature scheme is also Φ-RKA secure, where Φ is any family of functions defined on signing keys of NCS schemes.

To improve detection performance for a reconnaissance receiver, which is designed to detect the non-cooperative MIMO-LFM radar signal under low SNR condition, this letter proposed a novel signal detection method. This method is based on Fractional Fourier Transform with entropy weight (FRFTE) and autocorrelation algorithm. In addition, the flow chart and feasibility of the proposed algorithm are analyzed. Finally, applying our method to Wigner Hough Transform (WHT), we demonstrate the superiority of this method by simulation results.

Nyquist folding receiver (NYFR) is a novel reconnaissance receiving architecture and it can realize wideband receiving with small amount of equipment. As a tradeoff of non-cooperative wideband receiving, the NYFR output will add an unknown key parameter that is called Nyquist zone (NZ) index. In this letter, we concentrate on the NZ index estimation of the NYFR output. Focusing on the basic pulse radar signals, the constant frequency signal, the binary phase coded signal and the linear frequency modulation signal are considered. The matching component function is proposed to estimate the NZ indexes of the NYFR outputs without the prior information of the signal modulation type. In addition, the relations between the matching component function and the parameters of the NYFR are discussed. Simulation results demonstrate the efficacy of the proposed method.

This paper proposes gain relaxation in signal enhancement designed for speech recognition. Gain relaxation selectively applies softer enhancement of a target signal to eliminate potential degradation in speech recognition caused by small undesirable distortion in the target signal components. The softer enhancement is a solution to overlooked performance degradation in signal enhancement combined with speech recognition which is encountered in commercial products with an unaware small local noise source. Evaluation of directional interference suppression with signals recorded by a commercial PC (personal computer) demonstrates that signal enhancement over the input is achieved without sacrificing the performance for clean speech.

This letter proposes a novel dynamic channel assignment (DCA) scheme with consideration of interference and fairness for the downlink of dense small-cell networks based on orthogonal frequency division multiple access-frequency division duplex. In the proposed scheme, a small-cell gateway fairly assigns subchannels to the small-cell user equipment (SUE) according to the co-tier interference from neighboring small-cell access points. From the simulation results, it is shown that the proposed DCA scheme outperforms other DCA schemes in terms of the fairness of each SUE capacity.

Adaptive noise cancellation using adaptive filters is a known method for removing noise that interferes with signal measurements. The adaptive noise canceller performs filtering based on the current situation through a windowing process. The shape of the window function determines the tracking performance of the adaptive noise canceller with respect to the fluctuation of the property of the unknown system that noise (reference signal) passes. However, the shape of the window function in the field of adaptive filtering has not yet been considered in detail. This study mathematically treats the effect of the window function on the adaptive noise canceller and proposes an optimization method for the window function in situations where offline processing can be performed, such as biomedical signal measurements. We also demonstrate the validity of the optimized window function through numerical experiments.

It is essential to improve intra prediction performance to raise the efficiency of video coding. In video coding standards such as H.265/HEVC, intra prediction is seen as an extension of directional prediction schemes, examples include refinement of directions, planar extension, filtering reference sampling, and so on. From the view point of reducing prediction error, some improvements on intra prediction for standardized schemes have been suggested. However, on the assumption that the correlation between neighboring pixels are static, these conventional methods use pre-defined predictors regardless of the image being encoded. Therefore, these conventional methods cannot reduce prediction error if the images break the assumption made in prediction design. On the other hand, adaptive predictors that change the image being encoded may offer poor coding efficiency due to the overhead of the additional information needed for adaptivity. This paper proposes an adaptive intra prediction scheme that resolves the trade-off between prediction error and adaptivity overhead. The proposed scheme is formulated as a constrained optimization problem that minimizes prediction error under sparsity constraints on the prediction coefficients. In order to solve this problem, a novel solver is introduced as an extension of LARS for multi-class support. Experiments show that the proposed scheme can reduce the amount of encoded bits by 1.21% to 3.24% on average compared to HM16.7.

As one functionality of the wireless distributed network (WDN) enabling flexible wireless networks, it is supposed that a dynamic spectrum access is applied to OFDM systems for superior radio resource management. As a basic technology for such WDN, our study deals with the OFDM signal detection based on its cyclostationary feature. Previous relevant studies mainly relied on software simulations based on the Monte Carlo method. This paper analytically clarifies the relationship between the design parameters of the detector and its detection performance. The detection performance is formulated by using multiple design parameters including the transfer function of the receive filter. A hardware experiment with radio frequency (RF) signals is also carried out by using the detector consisting of an RF unit and FPGA. Thereby, it is verified that the detection characteristics represented by the false-alarm and non-detection probabilities calculated by the analytical formula agree well with those obtained by the hardware experiment. Our analysis and experiment results are useful for the parameter design of the signal detector to satisfy required performance criteria.

Multisignatures are digital signatures for a group consisting of multiple signers where each signer signs common documents via interaction with its co-signers and the data size of the resultant signatures for the group is independent of the number of signers. In this work, we propose a multisignature scheme, whose security can be tightly reduced to the CDH problem in bilinear groups, in the strongest security model where nothing more is required than that each signer has a public key, i.e., the plain public key model. Loosely speaking, our main idea for a tight reduction is to utilize a three-round interaction in a full-domain hash construction. Namely, we surmise that a full-domain hash construction with three-round interaction will become tightly secure under the CDH problem. In addition, we show that the existing scheme by Zhou et al. (ISC 2011) can be improved to a construction with a tight security reduction as an application of our proof framework.