The present paper discusses a new construction of UWB pulses within the framework of soft-spectrum adaptation. The employed basis functions are B-splines having the following properties: (i) The B-splines are time-limited piecewise polynomials. (ii) The first-order B-splines are rectangular pulses and they converge band-limited functions at the limit that their order tends to infinity. (iii) There are an analog circuit and a fast digital filter for the generation of B-splines. Simple application of Gram-Schmidt orthonormalization process to the shifted B-splines results in a few basic pulses, which are well time-limited and have a broad band width, but do not comply with the FCC spectral mask. A constrained approximation technique is proposed for adaptively designing pulses so that they approximate target frequency characteristics. At the cost of using eleven shifted B-splines, an example set of four pulses comforting the FCC spectral mask is obtained.

This paper proposes two power-constrained test synthesis schemes and scheduling algorithms, under non-scan BIST, for RTL data paths. The first scheme uses boundary non-scan BIST, and can achieve low hardware overheads. The second scheme uses generic non-scan BIST, and can offer some tradeoffs between hardware overhead, test application time and power dissipation. A designer can easily select an appropriate design parameter based on the desired tradeoff. Experimental results confirm the good performance and practicality of our new approaches.

This paper presents a systematic methodology for the system-level assessment of signal integrity and electromagnetic compatibility effects in high-speed communication and information systems. The proposed modeling strategy is illustrated via a case study consisting of a critical coupled net of a complex system. Three main methodologies are employed for the construction of accurate and efficient macromodels for each of the sub-structures typically found along the signal propagation paths, i.e. drivers/receivers, transmission-line interconnects, and interconnects with a complex 3D geometry such as vias and connectors. The resulting macromodels are cast in a common form, enabling the use of either SPICE-like circuit solvers or VHDL-AMS equation-based solvers for system-level EMC predictions.

Using the Vibration signatures obtained during the operations as the original data, a mechanical condition monitoring method for vacuum circuit breaker is developed in this paper. The method combined the time-frequency analysis and the condition recognition based on artificial neural network. During preprocessing, the vibration signature was decomposed into individual frequency bands using the arithmetic of wavelet packets. The signal energy in the main frequency bands was used to form the condition feature vector, which was input to the artificial neural network for condition recognition. By introducing the parameter of approximation degree, a new recognition arithmetic based on Radial Basis Function was constructed. This approach could not only distinguish these conditions that belong to different known condition modes but also distinguish new condition modes.

TCP performance in the IEEE 802.11-based multihop ad hoc networks is extremely poor, because the congestion control mechanism of TCP cannot effectively deal with the problem of packet drops caused by mobility and shared channel contention among wireless nodes. In this paper, we present a cross-layer method, which adaptively adjusts the TCP maximum window size according to the number of RTS (Request To Send) retry counts of the MAC layer at the TCP sender, to control the number of TCP packets in the network and thus decrease the channel contention. Our simulation results show that this method can remarkably improve TCP throughput and its stability.

A new generation method of rotating electromagnetic fields (rotating-EM fields) for radio frequency (RF) radiated immunity/susceptibility test and its basic characteristics are described. Two different double-side-band suppressed-carrier (DSB-SC) signals are required for generating the slowly rotating-EM field for the immunity/susceptibility test. These DSB-SC signals are generated by a DSB-SC-signal generator based on the new concept which consists of voltage-variable attenuators, bi-phase switches, a direct-digital synthesizer and a micro processor. Using the DSB-SC-signal generator, the DSB-SC signal of arbitrary RF frequency can be generated more easily than the conventional system. In this paper, the principle of the DSB-SC signal generator and the basic characteristics of the DSB-SC signals generated by the generator are clarified. The measured basic characteristics of the rotating-EM field generated using the new concept are shown and it is confirmed that the field can be applied for the RF immunity/susceptibility test. In addition, the susceptibility test of an equipment under test is made as an example, the validity of our proposed system is established.

Modern telecom and signal relays have been optimized to carry and switch low signals and to withstand high dielectric strength. Recent designs have extremely small physical dimensions and are comparatively cheap. Small size and low cost also make this type of relay very attractive for industrial and automotive applications. For industrial and automotive applications performance characteristics other than low and stable contact resistance values are of importance. While, for industrial applications, safety aspects and inductive load switching characteristics are of major importance, in automotive applications, high switching currents, inductive and lamp loads and high ambient temperatures are essential. Tests were carried out in order to determine the limitations of small size relays. The results obtained clearly show the unexpectedly high load range which signal relays are able to cover. Despite their small size, these relays can handle switching loads up to several hundred volts and currents up to 5 A. On top of the high switching current there is high excess current capability, and relays can work at extreme ambient temperatures between -55 and more than +105 degrees C.

This paper describes a design of Ogg Vorbis decoder for embedded platform. Since Ogg Vorbis decoding process incurs high computational complexity, a trivial software-based implementation requires high operation frequency. Thus in our design specific hardware modules are devised for functional blocks, which have higher computational complexity than other blocks in Ogg Vorbis decoding process. Based on computational cost analysis of whole decoding process, IMDCT (Inverse Modified Discrete Cosine Transform) and residue decoding process are detected as the computation-intensive functional blocks. As a result of hardware implementation, 73% improvement in CPU load is achieved by specific hardware modules for IMDCT and residue decoding process.

It is interesting to resolve coherent signals impinging upon a linear sensor array with low computational complexity in array signal processing. In this paper, a computationally efficient method of signal subspace fitting (SSF) for direction-of-arrival (DOA) estimation is developed, based on the multi-stage wiener filter (MSWF). To find the new signal subspace, the proposed method only needs to compute the matched filters in the forward recursion of the MSWF, does not involve the estimate of an array covariance matrix or any eigendecomposition, thus implying that the proposed method is computationally efficient. Numerical results show that the proposed method provides the comparable estimation accuracy with the classical weighted subspace fitting (WSF) method for uncorrelated signals at reasonably high SNR and reasonably large samples, and surpasses the latter for coherent signals in the case of low SNR and small samples. When SNR is low and the samples are small, the proposed method is less accurate than the classical WSF method for uncorrelated signals. This drawback is balanced by the computational advantage of the proposed method.

This paper proposes hardware-efficient VLSI architectures for 2-channel signal word decomposed filters (2-ch SWDFs) and their design method in consideration of the implemented circuit size. By consideration of the circuit size in design method, 2-ch SWDFs with a minimum output error among SWDFs whose size is equal to or smaller than a specification can be designed. Canonical Signed Digit expressions are used to effectively represent the filter coefficients of the SWDFs in order to make its circuit size small. Through precise analysis of the internal structures, circuit size can be accurately estimated. Some design examples show that the proposed method can design filters whose output error is about -12 dB lower than that of the linear FIR filters. Compared to an exhaustive search method, our method is much faster and can design filters whose output errors are only about 2 dB more.

This paper considers the problem of finding two-dimensional (2-D) direction of arrivals (DOAs) for coherent cyclostationary signals using a 2-D array with random position errors. To alleviate the performance degradation due to the coherence between the signals of interest (SOIs) and the random perturbation in 2-D array positions, a matrix reconstruction scheme in conjunction with an iterative algorithm is presented to reconstruct the correlation matrices related to the received array data so that the resulting correlation matrices possess the eigenstructures required for finding 2-D DOAs. Then, using the reconstructed matrices, we create a subspace orthogonal to the subspace spanned by the direction vectors of the SOIs. Therefore, the 2-D DOAs of the SOIs can be estimated based on a subspace-fitting concept and the created subspace. Finally, several simulation examples are presented for illustration and comparison.

In order to provide an efficient test method for PLL which is a mixed-signal circuit widely used in most of SoCs, a novel BIST method is developed. The new BIST uses the change of phase differences generated by selectively alternating the feedback frequency. It provides an efficient structural test, reduces an area overhead and improves the test accessibility.

This paper proposes near-field sound-source localization based on crosscorrelation of a signed binary code. The signed binary code eliminates multibit signal processing for simpler implementation. Explicit formulae with near-field assumption are derived for a two microphone scenario and extended to a three microphone case with front-rear discrimination. Adaptive threshold for enabling and disabling source localization is developed for robustness in noisy environment. The proposed sound-source localization algorithm is implemented on a fixed-point DSP. Evaluation results in a robot scenario demonstrate that near-field assumption and front-rear discrimination provides almost 40% improvement in DOA estimation. A correct detection rate of 85% is obtained by a robot in a home environment.

This paper describes a method for separating a target sound from other noise arriving in a single direction when the target cannot, therefore, be separated by directivity control. Microphones are arranged in a line toward the sources to form null sensitivity points at given distances from the microphones. The null points exclude non-target sound sources on the basis of weighting coefficients for microphone outputs determined by blind source separation. The separation problem is thereby simplified to instantaneous separation by adjustment of the time-delays for microphone outputs. The system uses a direct (i.e. non-iterative) algorithm for blind separation based on second-order statistics, assuming that all sources are non-stationary signals. Simulations show that the 2-microphone system can separate a target sound with separability of more than 40 dB for the 2-source problem, and 25 dB for the 3-source problem when the other sources are adjacent.

In this paper, we address issues in improving hands-free speech recognition performance in different car environments using multiple spatially distributed microphones. In the previous work, we proposed the multiple linear regression of the log spectra (MRLS) for estimating the log spectra of speech at a close-talking microphone. In this paper, the concept is extended to nonlinear regressions. Regressions in the cepstrum domain are also investigated. An effective algorithm is developed to adapt the regression weights automatically to different noise environments. Compared to the nearest distant microphone and adaptive beamformer (Generalized Sidelobe Canceller), the proposed adaptive nonlinear regression approach shows an advantage in the average relative word error rate (WER) reductions of 58.5% and 10.3%, respectively, for isolated word recognition under 15 real car environments.

A complete system for the implementation of digital logic in a Field-Programmable Gate Array (FPGA) platform is introduced. The novel power-efficient FPGA architecture was designed and simulated in STM 0.18 µm CMOS technology. The detailed design and circuit characteristics of the Configurable Logic Block, the interconnection network, the switch box and the connection box were determined and evaluated in terms of energy, delay and area. A number of circuit-level low-power techniques were employed because power consumption was the primary concern. Additionally, a complete tool framework for the implementation of digital logic circuits in FPGA platforms is introduced. Having as input VHDL description of an application, the framework derives the reconfiguration bitstream of FPGA. The framework consists of: i) non-modified academic tools, ii) modified academic tools and iii) new tools. Furthermore, the framework can support a variety of FPGA architectures. Qualitative and quantitative comparisons with existing academic and commercial architectures and tools are provided, yielding promising results.

In this Letter, estimation of the phase of a real sinusoid with known frequency in white Gaussian noise is addressed. Based on the Newton-Raphson iterative procedure, two simple realizations of exact maximum likelihood phase estimators for known and unknown amplitude are devised. Computer simulations are included to contrast the performance of the proposed algorithms with the approximate maximum likelihood estimate as well as Cramér-Rao lower bound for different phase values and signal-to-noise ratios.

With reference to video motion estimation in the framework of the new H.264/AVC video coding standard, this paper presents algorithmic and architectural solutions for the implementation of context-aware coprocessors in real-time, low-power embedded systems. A low-complexity context-aware controller is added to a conventional Full Search (FS) motion estimation engine. While the FS coprocessor is working, the context-aware controller extracts from the intermediate processing results information related to the input signal statistics in order to automatically configure the coprocessor itself in terms of search area size and number of reference frames; thus unnecessary computations and memory accesses can be avoided. The achieved complexity saving factor ranges from 2.2 to 25 depending on the input signal while keeping unaltered performance in terms of motion estimation accuracy. The increased efficiency is exploited both for (i) processing time reduction in case of software implementation on a programmable platform; (ii) power consumption reduction in case of dedicated hardware implementation in CMOS technology.

An efficient algorithm to reduce the noise from the Nuclear Magnetic Resonance Free Induction Decay (NMR FID) signals is presented, in this paper, via the oversampled real-valued discrete Gabor transform using the Gaussian synthesis window. An NMR FID signal in the Gabor transform domain (i.e., a joint time-frequency domain) is concentrated in a few number of Gabor transform coefficients while the noise is fairly distributed among all the coefficients. Therefore, the NMR FID signal can be significantly enhanced by performing a thresholding technique on the coefficients in the transform domain. Theoretical and simulation experimental analyses in this paper show that the oversampled Gabor transform using the Gaussian synthesis window is more suitable for the NMR FID signal enhancement than the critically-sampled one using the exponential synthesis window, because both the Gaussian synthesis window and its corresponding analysis window in the oversampling case can have better localization in the frequency domain than the exponential synthesis window and its corresponding analysis window in the critically-sampling case. Moreover, to speed up the transform, instead of the commonly-used complex-valued discrete Gabor transform, the real-valued discrete Gabor transform presented in our previous work is adopted in the proposed algorithm.

This paper presents a novel low-power register file based on adiabatic logic. The register file consists of a storage-cell array, address decoders, read/write control circuits, sense amplifiers, and read/write drivers. The storage-cell array is based on the conventional memory cell. All the circuits except the storage-cell array employ CPAL (complementary pass-transistor adiabatic logic) to recover the charge of large node capacitance on address decoders, bit-lines and word-lines in fully adiabatic manner. The minimization of energy consumption was investigated by choosing the optimal size of CPAL circuits for large load capacitance. The power consumption of the proposed adiabatic register file is significantly reduced because the energy transferred to the large capacitance buses is mostly recovered. The energy and functional simulations are performed using the net-list extracted from the layout. HSPICE simulation results indicate that the proposed register file attains energy savings of 65% to 85% as compared to the conventional CMOS implementation for clock rates ranging from 25 to 200 MHz.