Designing a software architecture that satisfies multiple quality requirements is a difficult undertaking. This is mainly due to the fact that architects must be able to explore a broad range of architectural choices and analyze tradeoffs among them in light of multiple quality requirements. As the size and complexity of the system increase, architectural design space to be explored and analyzed becomes more complex. In order to systematically manage the complexity, this paper proposes a method that guides architects to explore and analyze architectural decisions in a top-down manner. In the method, architectural decisions that have global impacts on given quality requirements are first explored and analyzed and those that have local impacts are then taken into account in the context of the decisions made in the previous step. This approach can cope with the complexity of large-scale architectural design systematically, as architectural decisions are analyzed and made following the abstraction hierarchy of quality requirements. To illustrate the concepts and applicability of the proposed method, we have applied this method to the architectural design of the computer used for the continuous casting process by an iron and steel manufacturer.
Vasily G. MOSHNYAGA Tomoyuki YAMANAKA
Design of portable battery operated multimedia devices requires energy-efficient multiplication circuits. This paper proposes a novel architectural technique to reduce power consumption of digital multipliers. Unlike related approaches which focus on multiplier transition activity reduction, we concentrate on dynamic reduction of supply voltage. Two implementation schemes capable of dynamically adjusting a double voltage supply to input data variation are presented. Simulations show that using these schemes we can reduce energy consumption of 1616-bit multiplier by 34% and 29% on peak and by 10% and 7% on average with area overhead of 15% and 4%, respectively, while maintaining the performance of traditional multiplier.
In this Letter, linear least squares (LLS) techniques for phase estimation of real sinusoidal signals with known or unknown amplitudes are studied. It is proved that the asymptotic performance of the LLS approach attains Cramér-Rao lower bound. For the case of a single tone, a novel LLS algorithm with unit-norm constraint is derived. Simulation results are also included for algorithm evaluation.
Yuichi NAKAMURA Ko YOSHIKAWA Takeshi YOSHIMURA
This paper describes a novel engineering change order (ECO) design method for large-scale, high performance LSIs, based on a patchwork-like partitioning technique. In conventional design methods, even when only small changes are made to the design after the placement and routing process, a whole re-layout must be done, and this is very time consuming. Using the proposed method, we can partition the design into several parts after logic synthesis. When design changes occur in HDL, only the parts related to the changes need to be redesigned. The netlist for the changed design remains almost the same as the original, except for the small changed parts. For partitioning, we used multiple-fan-out-points as partition borders. An experimental evaluation of our method showed that when a small change was made in the RTL description, the revised circuit part had only about 87 gates on average. This greatly reduces the re-layout time required for implementing an ECO. In actual commercial designs in which several design changes are required, it takes only one day to redesign.
Hidenari NAKASHIMA Junpei INOUE Kenichi OKADA Kazuya MASU
Interconnect Length Distribution (ILD) represents the correlation between the number of interconnects and their length. The ILD can predict power consumption, clock frequency, chip size, etc. High core utilization and small circuit area have been reported to improve chip performance. We propose an ILD model to predict the correlation between core utilization and chip performance. The proposed model predicts the influences of interconnect length and interconnect density on circuit performances. As core utilization increases, small and simple circuits improve the performances. In large complex circuits, decreasing the wire coupling capacitance is more important than decreasing the total interconnect length for improvement of chip performance. The proposed ILD model expresses the actual ILD more accurately than conventional models.
Takashi SATO Masanori HASHIMOTO Hidetoshi ONODERA
An efficient pad assignment methodology to minimize voltage drop on a power distribution network is proposed. A combination of successive pad assignment (SPA) with incremental matrix inversion (IMI) determines both location and number of power supply pads to satisfy drop voltage constraint. The SPA creates an equivalent resistance matrix which preserves both pad candidates and power consumption points as external ports so that topological modification due to connection or disconnection between voltage sources and candidate pads is consistently represented. By reusing sub-matrices of the equivalent matrix, the SPA greedily searches the next pad location that minimizes the worst drop voltage. Each time a candidate pad is added, the IMI reduces computational complexity significantly. Experimental results including a 400 pad problem show that the proposed procedures efficiently enumerate pad order in a practical time.
In the letter, the fast one-dimensional (1-D) and two-dimensional (2-D) algorithms for realizing low-complexity 44 discrete cosine transform (DCT) for H.264 applications are developed. Through applying matrix utilizations with Kronecker product and direct sum, the efficient fast 2-D 44 DCT algorithm can be developed from the proposed fast 1-D 44 DCT algorithm by matrix decompositions. The fast 1-D and 2-D low-complexity 44 DCT algorithms requires fewer multiplications and additions than other fast DCT algorithms. Owing to regular modularity, the proposed fast algorithms can achieve real-time H.264 video signal processing with VLSI implementation.
Akihisa YOKOYAMA Hitoshi INOUE Hiroshi HARADA
In this paper we propose a new reconfigurable signal processing platform for SDR, having capability to change its processing parameters dynamically. On our proposed platform, while the wiring and processing scheme remain fixed, processing parameters and connections between processing modules together with the associated dataflow can be changed. We also demonstrate that our proposed signal processing platform has the new ability of easily composing new signal processing models dynamically, simultaneously with other tasks, and attaining high efficiency of logic usage.
An energy-efficient power-aware design is highly desirable for DSP functions that encounter a wide diversity of operating scenarios in battery-powered wireless sensor network systems. Addressing this issue, this letter presents a low-power power-aware scalable pipelined Booth multiplier that makes use of dynamic-range detection unit, sharing common functional units, ensemble of optimized Wallace-trees and a 4-bit array-based adder-tree for DSP applications.
Helmut PRENDINGER Mitsuru ISHIZUKA
This paper highlights some of our recent research efforts in designing and evaluating life-like characters that are capable of entertaining affective and social communication with human users. The key novelty of our approach is the use of human physiological information: first, as a method to evaluate the effect of life-like character behavior on a moment-to-moment basis, and second, as an input modality for a new generation of interface agents that we call 'physiologically perceptive' life-like characters. By exploiting the stream of primarily involuntary human responses, such as autonomic nervous system activity or eye movements, those characters are expected to respond to users' affective and social needs in a truly sensitive, and hence effective, friendly, and beneficial way.
Yung-Yi WANG Jiunn-Tsair CHEN Ying LU
This paper proposes two space-time joint channel parameter estimation and signal detection algorithms for downlink DS-CDMA systems with multiple-input-multiple-output (MIMO) wireless multipath fading channels. The proposed algorithms initially use the space-time MUSIC to estimate the DOA-delays of the multipath channel. Based on these estimated DOA-delays, a space-time channel decoupler is developed to decompose the multipath downlink channel into a set of independent parallel subchannels. The fading amplitudes of the multipath can then be estimated from the eigen space of the output of the space-time channel decoupler. With these estimated channel parameters, signal detection is carried out by a maximal ratio combiner on a pathwise basis. Computer simulations show that the proposed algorithms outperform the conventional space-time RAKE receiver while having the similar performance compared with the space-time minimum mean square error receiver.
This letter develops convergence analysis of normalized sign-sign algorithm (NSSA) for FIR-type adaptive filters, based on an assumption that filter tap weights are Gaussian distributed. We derive a set of difference equations for theoretically calculating transient behavior of filter convergence, when the filter input is a White & Gaussian process. For a colored Gaussian input and a large number of tap weights, approximate difference equations are also proposed. Experiment with simulations and theoretical calculations of filter convergence demonstrates good agreement between simulations and theory, proving the validity of the analysis.
A novel digital redesign methodology based on evolutionary programming (EP) is introduced to find the 'best' digital controller for optimal tracking design of hybrid uncertain multi-input/ multi-output (MIMO) input-delay systems with constraints on states and controls. To deal with these multivariable concurrent specifications and system restrictions, instead of conventional interval methods, the proposed global optimization scheme is able to practically implement optimal digital controller for constrained uncertain hybrid systems with input time delay. Further, an illustrative example is included to demonstrate the efficiency of the proposed method.
We present a new method to detect weak linear frequency modulated (LFM) signals in strong noise using the chaos oscillator. Chaotic systems are sensitive to specific signals yet immune to noise. With our new method we firstly use the Radon-Wigner transform to dechirp the LFM signal. Secondly, we set up a chaotic oscillator sensitive to weak signals based on the Duffing equation, and poising the system at its critical state. Finally, we input the dechirped sequence into the system as a perturbation of the driving force. A weak signal with the same frequency will lead to a qualitative transition in the system state. The weak signal in the presence of strong noise can then be detected from the phase transition of the phase plane trajectory of the chaotic system. Computer simulation results show that LFM signals with an SNR lower than -27 dB can be detected by this method.
It is known that in a bit-interleaved coded-modulation with iterative decoding (BICM-ID), signal constellation and mapping strongly influence the system's error performance. This letter presents good mappings of various 8-ary constellations for BICM-ID systems operating over a frequency non-selective block Rayleigh fading channel. Simulation results for the error performance of different constellations/mappings are also provided and discussed.
The most obvious architectural solution for high-speed fuzzy inference is to exploit temporal parallelism and spatial parallelism inherited in a fuzzy inference execution. However, in fact, the active rules in each fuzzy inference execution are often only a small part of the total rules. In this paper, we present a new architecture that uses less hardware resources by discarding non-active rules in the earlier pipeline stage. Compared with previous work, implementation data show that the proposed architecture achieves very good results in terms of the inference speed and the chip area.
Anycast refers to the transmission of data from a source node to (any) one member in the group of designed recipients in a network. When the physical network and the set of anycast requests are given, the Anycast Routing and Wavelength Assignment (ARWA) problem is to find a set of light-paths, one for each source, for anycasting messages to any one of the member in the anycast destination group such that not any path using the same wavelength passes through the same link. The goal of the ARWA problem is to minimize the number of used wavelengths. In this paper, the ARWA problem is formulated and studied; since ARWA problem is NP-hard, a three-phase genetic algorithm is proposed to solve it. This algorithm is used to find the close-to-optimal solution. Simulated results show that the proposed algorithm is able to achieve good performance.
Vinh Trong LE Xiaohong JIANG Son Hong NGO Susumu HORIGUCHI
Genetic Algorithms (GA) provide an attractive approach to solving the challenging problem of dynamic routing and wavelength assignment (RWA) in optical Wavelength Division Multiplexing (WDM) networks, because they usually achieve a significantly low blocking probability. Available GA-based dynamic RWA algorithms were designed mainly for WDM networks with a wavelength continuity constraint, and they cannot be applied directly to WDM networks with wavelength conversion capability. Furthermore, the available GA-based dynamic RWA algorithms suffer from the problem of requiring a very time consuming process to generate the first population of routes for a request, which may results in a significantly large delay in path setup. In this paper, we study the dynamic RWA problem in WDM networks with sparse wavelength conversion and propose a novel hybrid algorithm for it based on the combination of mobile agents technique and GA. By keeping a suitable number of mobile agents in the network to cooperatively explore the network states and continuously update the routing tables, the new hybrid algorithm can promptly determine the first population of routes for a new request based on the routing table of its source node, without requiring the time consuming process associated with current GA-based dynamic RWA algorithms. To achieve a good load balance in WDM networks with sparse wavelength conversion, we adopt in our hybrid algorithm a new reproduction scheme and a new fitness function that simultaneously takes into account the path length, number of free wavelengths, and wavelength conversion capability in route selection. Our new hybrid algorithm achieves a better load balance and results in a significantly lower blocking probability than does the Fixed-Alternate routing algorithm, both for optical networks with sparse and full-range wavelength converters and for optical networks with sparse and limited-range wavelength converters. This was verified by an extensive simulation study on the ns-2 network simulator and two typical network topologies. The ability to guarantee both a low blocking probability and a small setup delay makes the new hybrid dynamic RWA algorithm very attractive for current optical circuit switching networks and also for the next generation optical burst switching networks.
Yinhe HAN Yu HU Xiaowei LI Huawei LI Anshuman CHANDRA Xiaoqing WEN
Connection of internal scan chains in core wrapper design (CWD) is necessary to handle the width match of TAM and internal scan chains. However, conventional serial connection of internal scan chains incurs power and time penalty. Study shows that the distribution and high density of don't care bits (X-bits) in test patterns make scan slices overlapping and partial overlapping possible. A novel parallel CWD (pCWD) approach is presented in this paper for lowering test power by shortening wrapper scan chains and adjusting test patterns. In order to achieve shift time reduction from overlapping in pCWD, a two-phase process on test pattern: partition and fill, is presented. Experimental results on d695 of ITC2002 benchmark demonstrated the shift time and test power have been decreased by 1.5 and 15 times, respectively. In addition, the proposed pCWD can be used as a stand-alone time reduction technique, which has better performance than previous techniques.
Mitsuhiro MATSUO Masaru KAMADA Hiromasa HABUCHI
The present paper discusses a new construction of UWB pulses within the framework of soft-spectrum adaptation. The employed basis functions are B-splines having the following properties: (i) The B-splines are time-limited piecewise polynomials. (ii) The first-order B-splines are rectangular pulses and they converge band-limited functions at the limit that their order tends to infinity. (iii) There are an analog circuit and a fast digital filter for the generation of B-splines. Simple application of Gram-Schmidt orthonormalization process to the shifted B-splines results in a few basic pulses, which are well time-limited and have a broad band width, but do not comply with the FCC spectral mask. A constrained approximation technique is proposed for adaptively designing pulses so that they approximate target frequency characteristics. At the cost of using eleven shifted B-splines, an example set of four pulses comforting the FCC spectral mask is obtained.