The efficiency-fractional bandwidth product (EB), which is expressed as a ratio of the radiation resistance to the absolute value of the input reactance of an antenna, is used as a performance criterion for small dielectric loaded monopole antennas (DLMAs). The dependence of the EB on the permittivity of the dielectric loading (i.e., the electrical volume) is experimentally and numerically investigated for the first time in antenna research. As a result, it is found that the EBs of the some DLMAs are enhanced over a bare monopole antenna and an EB characteristic curve has a maximum point. This result suggests the presence of the optimum electrical volume for the dielectric loading in order to obtain the best EB performance. A general reason for the existence of the peak value is also explained using a mathematical deduction. Finally the system EB, which is an efficiency-fractional bandwidth product of the DLMA with a practical matching circuit, is defined and its dependence on the relative permittivity is illustrated. Consequently, the existence of the peak value is also confirmed for the system EBs. In addition, it is demonstrated that the enhancement of the system EB is mainly due to the enhancement in the efficiency of the antenna system.

We analyze electron transport of silicon single-electron transistors (Si SETs) with an ultra-small quantum dot using a master-equation model taking into account the discreteness of quantum levels and the finiteness of scattering rates. In the simulated SET characteristics, aperiodic Coulomb blockade oscillations, fine structures and negative differential conductances due to the quantum mechanical effects are superimposed on the usual Coulomb blockade diagram. These features are consistent with the previously measured results. Large peak-to-valley current ratio of negative differential conductances at room temperature is predicted for Si SETs with an ultra-small dot whose size is smaller than 3 nm.

Precise simulation of non-quasi-static (NQS) characteristics is crucial for the analog application of MOS transistors. This paper presents the small signal admittance model of four-terminal NQS MOS transistors by solving the differential equation derived from the primary principle. The model contains the bulk-charge effect, the mobility reduction, and the velocity saturation. The results are compared with those for the conventional quasi-static model, the BSIM3v3 NQS model, and the 2-D device simulation.

An approach for analysis of the small signal response of the carriers in semiconductors is presented. The integro-differential equation, describing the phenomenon in the time domain is transformed into a Fredholm integral equation of the second kind. The response of the carrier system to a small signal of a general time dependence can be calculated by the knowledge of the response to an impulse signal, defined by a delta function in time. For an impulse signal, the obtained integral equation resembles the basic structure of the integral form of the time dependent (evolution) Boltzmann equation. Due to this similarity a physical model of the impulse response process is developed. The model explains the response to an impulse signal in terms of a relaxation process of two carrier ensembles, governed by a Boltzmann equation. A Monte-Carlo method is developed which consists of algorithms for modeling the initial distribution of the two ensembles. The numerical Monte-Carlo theory for evaluation of integrals is applied. The subsequent relaxation process can be simulated by the standard algorithms for solving the Boltzmann equation. The presented simulation results for Si and GaAs electrons serve as a test of the Monte-Carlo method and demonstrate that the physical model can be used for explanation of the small signal response process.

An NMOS 4-phase dynamic logic scheme is described, which is intended to achieve low-power consumption in the deep submicron design. In this scheme, the short-circuit current is eliminated, and moreover, the voltage swing of transition signals is reduced, resulting in enhancing power reduction effectively. First, distinctive features of this 4-phase dynamic logic are specified, as compared with the static CMOS logic and dynamic domino CMOS logic. Then, power simulations are attempted for the 4-phase dynamic logic, static CMOS logic, dynamic CMOS logic, and pass-transistor logic, by using a number of logic modules, which demonstrate that the NMOS 4-phase dynamic logic is the most power-efficient. Moreover, through the gate delay simulation, the capability of how many transistors can be packed in a logic block is also discussed.

In this paper, we propose a new adaptive control system design using internal model principle (IMP) for a bounded polynomial parameters. In this method, we regard time varying parameters as variable disturbance and design an estimating law used the internal model of the disturbance so that the law is able to rejected the effectness of the disturbance. Our method has the features that the tracking error can converge to zero. Furthermore, we give a sufficient condition for the stability based on a small-gain theorem. The condition shows that our proposed method relax the stability condition more than the conventional methods based on a passivity theorem. Finally, we contain a numerical simulation to show an effect of our system.

With the progress of LSI technology, the electronic device size is presently scaling down to the nano-meter region. In such an ultrasmall device, it is indispensable to take quantum mechanical effects into account in device modeling. In this paper, we first review the approaches to the quantum mechanical modeling of carrier transport in ultrasmall semiconductor devices. Then, we propose a novel quantum device model based upon a direct solution of the Boltzmann equation for multi-dimensional practical use. In this model, the quantum effects are represented in terms of quantum mechanically corrected potential in the classical Boltzmann equation.

Extremely small aperture radial line slot antennas (RLSAs) are analyzed by method of moments. At first, the analysis model of cylindrical waveguide in terms of rectangular cavity modes is confirmed for a RLSA with a spiral slot arrangement. The overall VSWR as well as rotational symmetry of the actual structure of RLSAs is predicted for the first time and is confirmed experimentally. Secondly, the minimum diameter of the concentric array RLSA is estimated for which the conventional analysis model of a rectangular waveguide is valid for the design of matching slot pairs at the shorted periphery of the radial waveguide. It is found that the curvature and cylindrical short wall at aperture periphery must be considered in the design and analysis of small RLSAs with the gain lower than about 25 dBi.

Fitt's law is commonly used to model target selection. But Fitts' law deals with only one kind of selection strategy. Our question is, do changes in target size, distance and direction to a target affect the differences in performance between target selection strategies? We performed the first empirical tests on a pen-based system to evaluate differences in performance between six selection strategies for selecting a target. Three target sizes, eight pen-movement-directions and three pen-movement-distances were applied to all six strategies. The results show that differences between selection strategies are affected by variations in target size but not by the other parameters (distance and direction).

This paper proposes a dual port color palette SRAM using a single bit line cell. Since the single bit line cell consists of fewer bit lines and transistors than standard dual port cells, it is able to reduce the area. However, the cell has had a problem in writing a high level. The port swap architecture solves the problem without any special mechanism such as a boot strap. In the architecture, each of two bit lines is assigned to the read/write MPU port and the read only pixel port, respectively. When writing a low level, the MPU port uses pre-assigned bit line. On the other hand, when writing a high level, the MPU port uses the bit line assigned to the pixel port by a swap operation. During the swapping, the pixel port continues the read operation by using the bit line assigned to the MPU port. A color palette using this architecture is fabricated with a 0. 5 µm CMOS process technology. The memory cell size reduces by up to 43% compared with standard dual port cells. The color palette is able to supply the pixel data at 300 MHz at the supply voltage of 3.3 V. This speed is enough to support the practical highest resolution monitors in the world.

An experiment is reported comparing six pen input strategies for selecting a small target using five diffenent sized targets (1, 3, 5, 7 and 9 dot diameter circles respectively, 0. 36 mm per dot). The results showed that the best strategy, in terms of error rate, selection time and subjective preferences, was the "land-on2" strategy where the target is selected when the pen-tip touches the target for the first time after landing on the screen surface. Moreover, "the smallest maximum size" was determined to be 5 dots (1. 8 mm). This was the largest size among the targets which had a significant main effect on error rate in the six strategies. These results are important for both researchers and designers of pen-based systems.

This paper presents a new generation method of the periodic orthogonal numerical sequences with small maximum amplitude. In the generation method, complex exponential sequences are used as the generating sequences and such periodic orthogonal numerical sequences are constructed from the discrete Fourier transform of the generating sequences. Until now, there has not been found a generation algorithm to derive such sequences with any period. It is shown that the proposed generation method can derive periodic orthogonal real sequences with the maximum amplitude less than 1.5 for the period 1N200 and periodic orthogonal coplex sequences with all the sbsolute amplitude value of 1 for any period.

A small-sized three-stage GaAs power module has been developed for portable digital radios using M-16QAM modulation. This module has exhibited typical P1dB of 10 W with PAE of 48% and a power gain of 35 dB at a low supply voltage of 6.5 V in 1.453-1.477 GHz band. The volume of the module is only 1.5 cc, which is one of the smallest value in 10 W class modules ever reported. In order to realize the reduced size and the high power performances simultaneously, the module has employed new power divider/combiner circuits with significant features of the reduced occupation area, the improved isolation properties and the function of second-harmonic control.

For finite Volterra series systems, this paper investigates the stability of the exact model matching (EMM) control we have already presented. First, in order to analyze the stability of the EMM system, we present modified small gain theorems depending on the magnitude of the external input (s) in the cases of one input and two inputs. Next, with the help of the theorem for feedback systems with two inputs, we clarify the condition under which the control system is stable for the reference input magnitude within a certain range, and is also robust for small disturbances. The modified small gain theorems are effective for the stability analysis of the nonlinear feedback control systems which do not have affine finite gain.

This paper proposes a small 1/4Vcc bit-line swing scheme and a related sense amplifier scheme for low power 1 V operating DRAM. Using the proposed small bit-line swing scheme, the stress bias of memory cell transistor and capacitor is reduced to half that of the conventional DRAM, resulting in improvement of device reliability. The proposed sense amplifier scheme achieves high speed and stable sensing/restoring operation at 250mV bit-line swing, which is much smaller than threshold voltage. The proposed scheme reduces the total power dissipation of bit-line sensing/restoring operation to 40% of the conventional one. This paper also proposes a small 4F2 size memory cell and a new twisted bit-line scheme. The array noise is reduced to 8.6% of the conventional DRAM.

The inclusion of the non-quasi-static effect is crucial in the simulation of the microwave circuits for MOS transistors. This report proposes a simple model which includes this effect in small-signal simulation. The simulated results are consistent with the measured data up to a frequency that is 30 times higher frequency than the cut-off frequency.

The charge neutralized at a small gap discharge has been evaluated from measured electromagnetic fields by two methods. The small gap discharges simulate ESD events. The evaluated charge decreases rapidly as a step shape immediately in a moment of the discharge. The accumulated static charge and the risetime of the neutralization step increase with the gap length. When the gap length is 0.1mm, risetime and the initial static charge are about 0.3ns and 5.6nC, respectively.

This paper describes ALINX (Advanced Low-voltage Interface Circuit System), a low-power and high-speed interface circuit of submicron CMOS LSI for digital information and telecommunications systems. Differential and single-ended ALINXs are low-voltage swing I/O interface circuits with less than 1.0 V swing from a 1.2 V supply. Specifically, the differential ALINX features a pair of complementary NMOS push-pull drivers operating from a 1.2 V supply, reducing power consumption compared to conventional high-speed interface circuits operating from a 5 V or 3.3 V supply. The DC power consumption is approximately 11% of ECL. We observed 622 Mbps differential transmission with 8 mW power consumption and single-ended transmission at 311 Mbps with 14 mW with a PN23 pseudo-random pattern. We also describe a noise characteristic and ALINX applications to high-speed data buses and LSI for telecommunications systems. A time/space switch LSI with 0.9 W total power consumption was fabricated by 0.5 µm CMOS process technology. This chip can use a plastic QFP.

On a simple model, the quality of the security tag is simulated theoretically and experimentally. A simple correction makes both results correspond exactly and a simulation formula is provided. By using novel insulating film, a small-sized tag of high quality is developed.

Object-oriented programming requires different skills from those of traditional structured programming. Thus, a good interactive environment for beginners of object-oriented programming should be provided. We have designed and implemented a visual environment of object-oriented programming for beginners. If a programmer draws a diagram of the tree of the hierarchy of classes visually by using our tool, the relationship between superclasses and subclasses are automatically established. Moreover, in order to prevent careless mistakes to override methods, the prototype environment in the Smalltalk language checks written methods. We conducted an experiment with our tool and evaluated its usefulness.