The heterogeneous network (HetNet), which deploys small cells such as picocells, femotcells, and relay nodes within macrocell, is regarded as a cost-efficient and energy-efficient approach to resolve increasing demand for data bandwidth and thus has received a lot of attention from research and industry. Since small cells share the same licensed spectrum with macrocells, concurrent transmission induces severe interference, which causes performance degradation, particularly when coordination among small cell base stations (BSs) is infeasible. Given the dense, massive, and unplanned deployment of small cells, mitigating interference in a distributed manner is a challenge and has been explored in recent papers. An efficient and innovative approach is to apply cognitive radio (CR) into HetNet, which enables small cells to sense and to adapt to their surrounding environments. Consequently, stations in each small cell are able to acquire additional information from surrounding environments and opportunistically operate in the spectrum hole, constrained by minimal inducing interference. This paper summarizes and highlights the CR-based interference mitigation approaches in orthogonal frequency division multiple access (OFDMA)-based HetNet networks. With special discussing the role of sensed information at small cells for the interference mitigation, this paper presents the potential cross-layer facilitation of the CR-enable HetNet.

Given a binary image I and a threshold t, the size-thresholded binary image I(t) defined by I and t is the binary image after removing all connected components consisting of at most t pixels. This paper presents space-efficient algorithms for computing a size-thresholded binary image for a binary image of n pixels, assuming that the image is stored in a read-only array with random-access. With regard to the problem, there are two cases depending on how large the threshold t is, namely, Relatively large threshold where t = Ω(), and Relatively small threshold where t = O(). In this paper, a new algorithmic framework for the problem is presented. From an algorithmic point of view, the problem can be solved in O() time and O() work space. We propose new algorithms for both the above cases which compute the size-threshold binary image for any binary image of n pixels in O(nlog n) time using only O() work space.

This paper evaluates the downlink performance of an LTE-Advanced (LTE-A) heterogeneous network that uses carrier aggregation (CA) between macro and small cells. The concept of utilizing the CA functionalities in LTE-A is effective in increasing the network capacity in a congested area through raising of the base station density using small cells overlaid onto an existing macro cell network. This concept is also effective in maintaining the mobility performance of user equipment (UE) because handover operation is not applied when entering/leaving a small cell, but component carrier addition/removal is only performed through CA while maintaining the connection to a macro cell. In order to present comprehensive performance evaluations in an LTE-A heterogeneous network with CA, this paper evaluates various performance criteria, e.g., downlink cell throughput and downlink user throughput. According to the obtained simulation results, the total downlink cell throughput achieved in an LTE-A heterogeneous network deployment with CA (four small cells overlaid onto a macro cell sector) exhibits a 3.9-fold improvement compared to a conventional-macro-cell-only network deployment using two frequency bands.

Many deterministic small-world network models have been proposed so far, and they have been proven useful in describing some real-life networks which have fixed interconnections. Search efficiency is an important property to characterize small-world networks. This paper tries to clarify how the search procedure behaves when random walks are performed on small-world networks, including the classic WS small-world network and three deterministic small-world network models: the deterministic small-world network created by edge iterations, the tree-structured deterministic small-world network, and the small-world network derived from the deterministic uniform recursive tree. Detailed experiments are carried out to test the search efficiency of various small-world networks with regard to three different types of random walks. From the results, we conclude that the stochastic model outperforms the deterministic ones in terms of average search steps.

As technology scales to 45 nm and below, the reliability of VLSI declines due to small delay defects, which are hard to detect by functional clock frequency. To detect small delay defects, a method which measures the delay time of path in circuit under test (CUT) was proposed. However, because a large number of FFs exist in recent VLSI, the probability that the resistive defect occurs in the FFs is increased. A test method measuring path delay time including the transmission time of FFs is necessary. However, the path measured by the conventional on-chip path delay time measurement method does not include a part of a master latch. Thus, testing using the conventional measurement method cannot detect defects occurring on the part. This paper proposes an improved on-chip path delay time measurement method. Test coverage is improved by measuring the path delay time including transmission time of a master latch. The proposed method uses a duty-cycle-modified clock signal. Evaluation results show that, the proposed method improves test coverage 5.2511.28% with the same area overhead as the conventional method.

Crohn's disease commonly affects the small and large intestines. Its symptoms include ulcers and intestinal stenosis, and its diagnosis is currently performed using an endoscope. However, because the endoscope cannot pass through the stenosed parts of the intestines, diagnosis of the entire intestines is difficult. A CT image-based method is expected to become an alternative way for the diagnosis of Crohn's disease because it enables observation of the entire intestine even if stenosis exists. To achieve efficient CT image-based diagnosis, diagnostic-aid by computers is required. This paper presents an automated detection method of the surface of ulcers in the small and large intestines from fecal tagging CT images. Ulcers cause rough surfaces on the intestinal wall and consist of small convex and concave (CC) regions. We detect them by blob and inverse-blob structure enhancement filters. A roughness value is utilized to reduce the false positives of the detection results. Many CC regions are concentrated in ulcers. The roughness value evaluates the concentration ratio of the detected regions. Detected regions with low roughness values are removed by a thresholding process. The thickness of the intestinal lumen and the CT values of the surrounding tissue of the intestinal lumen are also used to reduce false positives. Experimental results using ten cases of CT images showed that our proposed method detects 70.6% of ulcers with 12.7 FPs/case. The proposed method detected most of the ulcers.

This paper presents a second-order ΔΣ analog-to-digital converter (ADC) operating in a time domain. In the proposed ADC architecture, a voltage-controlled delay unit (VCDU) converts an input analog voltage to a delay time. Then, the clocks outputs from a gated ring oscillator (GRO) are counted during the delay time. No switched capacitor or opamp is used. Therefore, the proposed ADC can be implemented in a small area and with low power. For that reason, it has process scalability: it can keep pace with Moore's law. A time error is propagated to the second GRO by a multi-stage noise-shaping (MASH) topology, which provides second-order noise-shaping. In a standard 40-nm CMOS process, a SNDR of 45 dB is achievable at input bandwidth of 16 kHz and a sampling rate of 8 MHz, where the power is 408.5 µW. Its area is 608 µm2.

Nano-scale VLSI design is facing the problems of increased test data volume. Small delay defects are becoming possible sources of test escapes, and high delay test quality and therefore a greater volume of test data are required. The increased test data volume requires more tester memory and test application time, and both result in test cost inflation. Test pattern ordering gives a practical solution to reduce test cost, where test patterns are ordered so that more defects can be detected as early as possible. In this paper, we propose a test pattern ordering method based on SDQL (Statistical Delay Quality Level), which is a measure of delay test quality considering small delay defects. Our proposed method orders test patterns so that SDQL shrinks fast, which means more delay defects can be detected as early as possible. The proposed method efficiently orders test patterns with minimal usage of time-consuming timing-aware fault simulation. Experimental results demonstrate that our method can obtain test pattern ordering within a reasonable time, and also suggest how to prepare test sets suitable as inputs of test pattern ordering.

A new clock gating circuit suitable for shift register is presented. The proposed clock gating circuit that consists of basic NOR gates is low power and small area. The power consumption of a 16-bit shift register implemented with the proposed clock gating circuit is about 66% lower than that found when using the conventional design.

Small-world is a common property existing in many real-life social, technological and biological networks. Small-world networks distinguish themselves from others by their high clustering coefficient and short average path length. In the past dozen years, many probabilistic small-world networks and some deterministic small-world networks have been proposed utilizing various mechanisms. In this Letter, we propose a new deterministic small-world network model by first constructing a binary-tree structure and then adding links between each pair of brother nodes and links between each grandfather node and its four grandson nodes. Furthermore, we give the analytic solutions to several topological characteristics, which shows that the proposed model is a small-world network.

We study the properties of information dissemination over location-aware gossiping networks leveraging location-based real-time communication applications. Gossiping is a promising method for quickly disseminating messages in a large-scale system, but in its application to information dissemination for location-aware applications, it is important to consider the network topology and patterns of spatial dissemination over the network in order to achieve effective delivery of messages to potentially interested users. To this end, we propose a continuous-space network model extended from Kleinberg's small-world model applicable to actual location-based applications. Analytical and simulation-based study shows that the proposed network achieves high dissemination efficiency resulting from geographically neutral dissemination patterns as well as selective dissemination to proximate users. We have designed a highly scalable location management method capable of promptly updating the network topology in response to node movement and have implemented a distributed simulator to perform dynamic target pursuit experiments as one example of applications that are the most sensitive to message forwarding delay. The experimental results show that the proposed network surpasses other types of networks in pursuit efficiency and achieves the desirable dissemination patterns.

Using a self-developed ASTM test system of contact material electrical properties under low voltage (LV), small-capacity, the current-frequency variable and a photoelectric analytical balance, the electric performance comparison experiments and material weighing of silver-based electrical contact materials, such as silver/tungsten and silver/cadmium oxide contact materials, are completed under LV, pure resistive load and small current at 400 Hz/50 Hz. The surface profiles and constituents of silver/tungsten contact material were observed and analyzed by SEM and EDAX. Researches indicate that the form of the contact material arc burnout at 400 Hz is stasis, not an eddy flow style at 50 Hz; meanwhile, the area of the contact burnout at 400 Hz is less than that of 50 Hz, and the local ablation on the surface layer at 400 Hz is more serious. Comparing the capacities of the silver-based contact materials with different second element such as CAgW50, CAgNi10, CAgC4 and CAgCdO15 at 400 Hz, no matter what the performances of arc erosion resistance or welding resistance, it can be found that the capacities of the silver/tungsten material is the best.

A planar circularly-polarized (CP) small antenna is proposed. To obtain a low profile configuration, a co-planar waveguide (CPW) structure is employed. Circular polarization is achieved using a curved stub that generates current distribution in a direction orthogonal to the current distribution from the patch. Using meander lines and a series gap capacitance, a 70% size reduction is achieved compared to a half-wavelength resonant antenna. To the best of the authors' knowledge, the proposed antenna is the smallest CP antenna using CPW technology. The measured 3 dB axial ratio bandwidth is 8.3% from 3.83 GHz to 4.16 GHz, and a 1.6 dBic gain and 89% efficiency are achieved.

We introduce a “generalized small inverse problem (GSIP)” and present an algorithm for solving this problem. GSIP is formulated as finding small solutions of f(x0, x1, ..., xn)=x0 h(x1, ..., xn)+C=0 (mod ; M) for an n-variate polynomial h, non-zero integers C and M. Our algorithm is based on lattice-based Coppersmith technique. We provide a strategy for construction of a lattice basis for solving f=0, which is systematically transformed from a lattice basis for solving h=0. Then, we derive an upper bound such that the target problem can be solved in polynomial time in log M in an explicit form. Since GSIPs include some RSA-related problems, our algorithm is applicable to them. For example, the small key attacks by Boneh and Durfee are re-found automatically.

This paper reports the DC and RF characteristics of AlN/GaN MOS-HEMTs passivated with thin Al2O3 formed by thermal oxidation of evaporated aluminium. Extraction of the small-signal equivalent circuit is also described. Device fabrication involved wet etching of evaporated Al from the Ohmic contact regions prior to metal deposition. This approach yielded an average contact resistance of ∼0.76 Ω.mm extracted from transmission line method (TLM) characterisation. Fabricated two-finger AlN/GaN MOS-HEMTs with 0.2 µm gate length and 100 µm gate width showed good gate control of drain currents up to a gate bias of 3 V and achieved a maximum drain current, IDSmax of ∼1460 mA/mm. The peak extrinsic transconductance, Gmax, of the device was ∼303 mS/mm at VDS = 4 V. Current-gain cut-off frequency, fT, and maximum oscillation frequency, fMAX, of 50 GHz and 40 GHz, respectively, were extracted from S-parameter measurements. For longer gate length, LG = 0.5 µm, fT and fMAX were 20 GHz and 30 GHz, respectively. These results demonstrate the potential of AlN/GaN MOS-HEMTs for high power and high frequency applications.

In this study, we propose a method to reduce the mutual coupling between two J-shaped folded monopole antennas (JFMAs), which cover the IEEE 802.11 b/g (2400-2484 MHz) band. First, the change in mutual coupling with the spacing between the two antenna elements is investigated by considering two feeding models, and the effects of changes in the coupling on the antenna efficiency are studied. Subsequently, we try the method to reduce mutual coupling, the method involves the use of a bridge line that links the two antennas. The mutual coupling can be significantly reduced and the total antenna efficiency can be improved by linking two shorting strips with the bridge line. In a past study, we had found that in the case of L-shaped folded monopole antennas (LFMAs), the mutual coupling and antenna efficiency vary with the linking location on the bridge line. Moreover, we compare the characteristics of the LFMA and JFMA and show that the JFMA is effective when miniaturized.

Precise estimation of data distribution with a small number of sample patterns is an important and challenging problem in the field of statistical pattern recognition. In this paper, we propose a novel method for estimating multimodal data distribution based on the Gaussian mixture model. In the proposed method, multiple random vectors are generated after classifying the elements of the feature vector into subsets so that there is no correlation between any pair of subsets. The Gaussian mixture model for each subset is then constructed independently. As a result, the constructed model is represented as the product of the Gaussian mixture models of marginal distributions. To make the classification of the elements effective, a graph cut technique is used for rearranging the elements of the feature vectors to gather elements with a high correlation into the same subset. The proposed method is applied to a character recognition problem that requires high-dimensional feature vectors. Experiments with a public handwritten digit database show that the proposed method improves the accuracy of classification. In addition, the effect of classifying the elements of the feature vectors is shown by visualizing the distribution.

This paper presents a novel time-domain design procedure for fast-settling three-stage nested-Miller compensated (NMC) amplifiers. In the proposed design methodology, the amplifier is designed to settle within a definite time period with a given settling accuracy by optimizing both the power consumption and silicon die area. Detailed design equations are presented and the circuit level simulation results are provided to verify the usefulness of the proposed design procedure with respect to the previously reported design schemes.

A unipolar n-n heterostrucuture diode is developed in the InP material system. The electronic barrier is formed by a saw tooth type of conduction band bending which consists of a quaternary In0.52(AlyGa1-y)0.48As layer with 0 < y < ymax. This barrier is lattice matched for all y to InP and is embedded between two n+-InGaAs layers. By varying the maximum Al-content from ymax,1 = 0.7 to ymax,2 = 1 a variable barrier height is formed which enables a diode-type I-V characteristic by epitaxial design with an adjustable current density within 3 orders of magnitude. The high current density of the diode with the lower barrier height (ymax,1 = 0.7) makes it suitable for high frequency applications at low signal levels. RF measurements reveal a speed index of 52 ps/V at VD = 0.15 V. The device is investigated for RF-to-DC power conversion in UHF RFID transponders with low-amplitude RF signals.

The large signal performance and model for GaN FET devices was evaluated with DC, S-parameters, and large signal measurements. The large signal model was extended with bias and temperature dependence of access resistances, modified capacitance and charge equations, as well as breakdown models. The model was implemented in a commercial CAD tool and exhibits good overall accuracy.