This paper proposes an asymmetric traffic accommodation scheme using a multihop transmission technique for CDMA/FDD cellular communication systems. The proposed scheme exploits the multihop transmission to downlink packet transmissions, which require the large transmission power at their single-hop transmissions, in order to increase the downlink capacity. In these multihop transmissions, vacant uplink band is used for the transmissions from relay stations to destination mobile stations, and this leads more capacity enhancement in the downlink communications. The relay route selection method and power control method for the multihop transmissions are also investigated in the proposed scheme. The proposed scheme is evaluated by computer simulation and the results show that the proposed scheme can achieve better system performance.

Recently, multimedia services are increasing with the widespread use of various wireless applications such as web browsers, real-time video, and interactive games, which results in traffic asymmetry between the uplink and downlink. Hence, time division duplex (TDD) systems which provide advantages in efficient bandwidth utilization under asymmetric traffic environments have become one of the most important issues in future mobile cellular systems. It is known that two types of intercell interference, referred to as crossed-slot interference, additionally arise in TDD systems; the performances of the uplink and downlink transmissions are degraded by BS-to-BS crossed-slot interference and MS-to-MS crossed-slot interference, respectively. The resulting performance unbalance between the uplink and downlink makes network deployment severely inefficient. Previous works have proposed intelligent time slot allocation algorithms to mitigate the crossed-slot interference problem. However, they require centralized control, which causes large signaling overhead in the network. In this paper, we propose to change the shape of the cellular structure itself. The conventional cellular structure is easily transformed into the proposed cellular structure with distributed receive antennas (DRAs). We set up statistical Markov chain traffic model and analyze the bit error performances of the conventional cellular structure and proposed cellular structure under asymmetric traffic environments. Numerical results show that the uplink and downlink performances of the proposed cellular structure become balanced with the proper number of DRAs and thus the proposed cellular structure is notably cost-effective in network deployment compared to the conventional cellular structure. As a result, extending the conventional cellular structure into the proposed cellular structure with DRAs is a remarkably cost-effective solution to support asymmetric traffic environments in future mobile cellular systems.

Gamma correction is an essential function and is time consuming task in every display device such as CRT and LCD. And gray scale CCT reproduction in most LCD are quite different from those of standard CRT. An automated fast and accurate display adjusment method and system for gamma correction and for constant gray scale CCT calibration of mobile phone LCD is presented in this paper. We develop the test pattern disply and register control program in mobile phone and devleop automatic measure program in computer using spectroradimeter. The proposed system is maintain given gamma values and CCT values accuratly. In addition, This system is possible to fast mobile phone LCD adjusment within one hour.

This paper proposes an image authentication method that detects tamper and localizes tampered areas efficiently. The efficiency of the proposed method is summarized as the following three points. 1) This method offers coarse-to-fine tamper localization by hierarchical data hiding so that further tamper detection is suppressed for blocks labeled as genuine in the uppper layer. 2) Since the image feature description in the top layer is hidden over an image, the proposed method enciphers the data in the top layer rather than enciphers all data in all layers. 3) The proposed method is based on the reversible data hiding scheme that does not use highly-costed compression technique. These three points makes the proposed method superior to the conventional methods using compression techniques and methods using multi-tiered data hiding that requires integrity verification in many blocks even the image is genuine. Simulation results show the effectiveness of the proposed method.

A new method of multi-bit embedding based on a protocol of secure asymmetric digital watermarking detection is proposed. Secure watermark detection has been achieved by means of allowing watermark verifier to detect a message without any secret information exposed in extraction process. Our methodology is based on an asymmetric property of a watermark algorithm which hybridizes a statistical watermark algorithm and a public-key algorithm. In 2004, Furukawa proposed a secure watermark detection scheme using patchwork watermarking and Paillier encryption, but the feasibility had not tested in his work. We have examined it and have shown that it has a drawback in heavy overhead in processing time. We overcome the issue by replacing the cryptosystem with the modified El Gamal encryption and improve performance in processing time. We have developed software implementation for both methods and have measured effective performance. The obtained result shows that the performance of our method is better than Frukawa's method under most of practical conditions. In our method, multiple bits can be embedded by assigning distinct generators in each bit, while the embedding algorithm of Frukawa's method assumes a single-bit message. This strongly enhances capability of multi-bit information embedding, and also improves communication and computation cost.

As pervasive computing technologies develop fast, the privacy protection becomes a crucial issue and needs to be coped with very carefully. Typically, it is difficult to efficiently identify and manage plenty of the low-cost pervasive devices like Radio Frequency Identification Devices (RFID), without leaking any privacy information. In particular, the attacker may not only eavesdrop the communication in a passive way, but also mount an active attack to ask queries adaptively, which is obviously more dangerous. Towards settling this problem, in this paper, we propose two lightweight authentication protocols which are privacy-preserving against active attack, in an asymmetric way. That asymmetric style with privacy-oriented simplification succeeds to reduce the load of low-cost devices and drastically decrease the computation cost for the management of server. This is because that, unlike the usual management of the identities, our approach does not require any synchronization nor exhaustive search in the database, which enjoys great convenience in case of a large-scale system. The protocols are based on a fast asymmetric encryption with specialized simplification and only one cryptographic hash function, which consequently assigns an easy work to pervasive devices. Besides, our results do not require the strong assumption of the random oracle.

We propose a new label recognition system for photonic label routing network. Binary-coded labels in binary phase-shift-keying format are considered. The system consists of an optical waveguide circuit with tree-structure passive asymmetric X-junctions and time gates. The system uses self-routing propagation of an identifying bit by performing interference with address bits. The identifying bit is placed in advance of the address bits in the label. The identifying bit pulse is routed to the destination output port corresponding to the code of the address. The operation principle is described. It is shown that all the binary number codes can be recognized with this system. We discuss the feasibility of the system by evaluating its crosstalk. To reduce the crosstalk, an improved scheme is also presented. The label recognition operation with the optical waveguide device is verified by numerical simulation using the finite-difference beam propagation method.

New microstrip bandpass filters with extended stopband bandwidths are proposed by using new asymmetric stepped-impedance hairpin resonators (ASIHRs). The size of the proposed resonators has been reduced around 16%, comparing with the conventional stepped-impedance hairpin resonators (SIHRs) structure. The first bandpass filter is a combination of differ resonators with the same fundamental frequency but differ in harmonic frequencies, resulting in improved suppression spurious responses in stopbands. Furthermore, another bandpass filter uses the ASIHRs periodically loaded on a microstrip line to improve stopband characteristics. The proposed filters not only have compact size of resonators, but also provide improved upper stopband characteristics. The proposed filters provide 20 dB rejection levels in the stopband up to 6f0. The measured filters responses agree very well with the simulated expectations.

The power reduction of display devices has become an important issue for extending battery life and running time when they are used in digital multimedia broadcasting (DMB) mobile phones. DMB mobile phones generally use 16-bit data per pixel to reduce power consumption even though a liquid crystal display (LCD) graphic controller can support 16-, 18-, and 24-bit data per pixel. Also, the total transmission time of 16-bit data per pixel is only half that for 18- and 24-bit data per pixel. Decoded 24-bit image data in the frame memory of a DMB decoder are asymmetrically truncated to 16-bit image data. This results in a lack of smoothness such as blocking effects and/or pseudo edge artifacts. To solve these problems, the author proposes and implements a new asymmetric pixel data truncation error compensation algorithm using 1-bit least significant bit (LSB) data expansion with correlated color information for the purpose of ensuring smoothness. In the experimental results, the proposed algorithm is able to correct various artifacts.

This work proposes a 10 b 200 MS/s 1.8 mm2 83 mW 0.13 µm CMOS ADC based on highly linear integrated capacitors for high-quality video system applications such as next-generation DTV and radar vision and wireless communication system applications such as WLAN, WiMax, SDR, LMDS, and MMDS simultaneously requiring low voltage, low power, and small area at high speed. The proposed 3-stage pipeline ADC optimizes chip area and power dissipation at the target resolution and sampling rate. The proposed ADC employs two versions of the SHA with gate-bootstrapped NMOS switches and conventional CMOS switches to verify and compare the input sampling effectiveness. Both of the two versions of the wide-band low-noise SHA maintain 10 b input accuracy at 200 MS/s. The proposed all signal-isolated 3-D completely symmetric capacitor layout reduces the device mismatch of two MDACs by isolating each unit capacitor from all neighboring signal lines with all the employed metal lines and by placing extra internal metal lines with a fixed internal bias voltage between signal lines connecting the bottom plate of each unit capacitor. The low-noise on-chip current and voltage references with internal RC filters can select optional off-chip voltage references. The prototype ADC is implemented in a 0.13 µm 1P8M CMOS process. The measured DNL and INL are within 0.24 LSB and 0.35 LSB while the ADC shows a maximum SNDR of 54 dB and 48 dB and a maximum SFDR of 67 dB and 61 dB at 200 MS/s and 250 MS/s, respectively. The ADC with an active die area of 1.8 mm2 consumes 83 mW at 200 MS/s and at a 1.2 V supply.

Orthogonal frequency division multiplexing (OFDM) systems for mobile applications suffer from inter-carrier-interference (ICI) due to frequency offset and to time-variation of the channels and from high peak-to-average-power ratio (PAPR). In this paper, we revisit symmetric cancellation coding (SCC) proposed by Sathananthan et al. and compare the effectiveness of SCC with a fixed subtraction combining and the well-known polynomial cancellation coding (PCC) over Rayleigh fading channels with Doppler spread in terms of the signal-to-interference plus noise power ratio (SINR) and bit-error-rate (BER). We also compare SCC with subtraction combining and SCC of Sathananthan et al. with maximum ratio combining (MRC). Our results show that SCC-OFDM with subtraction combining gives higher SINR than PCC-OFDM over the flat Rayleigh fading channel and that this superiority is not maintained under multi-path induced frequency-selective fading unless diversity combining is used. A simulation result shows, however, that SCC-OFDM with subtraction combining may perform better than PCC-OFDM for a certain range of Doppler spread when differential modulation is employed. Finally, we also demonstrate that the SCC-OFDM signal has less PAPR compared to the normal OFDM and PCC-OFDM and hence may be more practical.

To achieve scalability and security, large networks are often structured hierarchically as a collection of domains. In hierarchical networks, the topology and QoS parameters of a domain have to be first aggregated before being propagated to other domains. However, topology aggregation may distort useful information. Although spanning tree aggregation can perfectly encode attribute information of symmetric networks, it can not be applied to asymmetric networks directly. In this paper, we propose a spanning tree based attribute aggregation method for asymmetric networks. The time complexity of the proposed method and the space complexity of its resulted aggregated topology are the same with that of the spanning tree aggregation method in symmetric networks. This method can guarantee that the attributes of more than half of the links in the networks are unaltered after aggregation. Simulation results show that the proposed method achieves the best tradeoff between information accuracy and space complexity among the existing asymmetric attribute aggregation methods.

The traffic with asymmetry between uplink and downlink has recently been getting remarkable on mobile communication systems providing multimedia communication services. In the future mobile communications, the accommodation of asymmetric traffic is essential to realize efficient multimedia mobile communication systems. This paper discusses asymmetric traffic accommodation in CDMA/FDD cellular packet communication systems and proposes its efficient scheme using an adaptive cell sizing technique. In the proposed scheme, each base station autonomously controls its coverage area so that almost the same communication quality can be achieved across the service area under the asymmetric traffic conditions. We present some numerical examples to demonstrate the effectiveness of the proposed scheme by using computer simulation. The simulation results show that, under asymmetric traffic conditions, the proposed scheme can provide fair communication quality across the service area in both links and can improve total transmission capacity in the uplink.

A novel asymmetric MOSFET with no LDD on the source side is simulated on bulk-Si using a device simulator (SILVACO). In order to overcome the problems of the conventional asymmetric process, a novel asymmetric MOSFET using mesa structure and sidewall spacer gate is proposed which provides self-alignment process, aggressive scaling, and uniformity. First of all, we have simulated to compare the characteristics between asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel (25-nm) and the same physical parameters. When we compare this with the 25-nm symmetric MOSFET, the proposed asymmetric MOSFET shows better device performances.

This paper investigates the dynamic spectrum management problem for digital subscriber lines. Two new distributed dynamic spectrum management algorithms, which improve upon the existing iterative water-filling algorithm, are proposed. Unlike the iterative water-filling algorithm, in which crosstalk interference is reduced by using adaptive power backoff, the new algorithms employ full power and mitigate crosstalk interference by shifting one user's spectrum away from the other's. Simulation results show that the new algorithms achieve significant performance gains over the iterative water-filling algorithm in mixed central office/remote terminal (CO/RT) deployment asymmetric digital subscriber line (ADSL) and upstream very-high bit-rate digital subscriber line (VDSL).

Differential power analysis (DPA) is an effective technique that extracts secret keys from cryptographic systems through statistical analysis of the power traces obtained during encryption and decryption operations. This letter proposes symmetric discharge logic (SDL), a circuit-level countermeasure against DPA, which exhibits uniform power traces for every clock period by maintaining a set of discharge paths independent of input values. This feature minimizes differences in power traces and improves resistance to DPA attacks. HSPICE simulations for the test circuits using 0.18 µm TSMC CMOS process parameters indicate that SDL reduces power differences by an order of magnitude, compared to the existing circuit-level technique.

We give the necessary and sufficient conditions for a one-dimensional discrete-time autonomous binary cellular neural networks to be stable in the case of fixed boundary. The results are complete generalization of our previous one [16] in which the symmetrical connections were assumed. The conditions are compared with some stability conditions so far known.

In this paper, we evaluate the performance of asymmetric Time Division Duplex (TDD) system that employs Adaptive Modulation and Coding (AMC) and Hybrid ARQ, with consideration of the effect of control delays in TDD. Channel reciprocity characteristic in TDD allows utilization of open loop channel estimation to choose appropriate modulation and coding scheme (MCS) level for AMC. However, control delay in AMC and HARQ depends on TDD time slot allocation formats. Large control delay in AMC will result in false MCS selection due to the poor channel correlation between measured channel state from the received signals and instantaneous channel state of actual transmission with the MCS selected based on the measured channel state. We present an analytical approach to calculate the probability of MCS level selection error in different channel conditions for different asymmetric time slot allocations. From the theoretical and simulation results, it is shown that the instantaneous throughput per slot depends not only on maximum Doppler frequency but also on asymmetric slot allocations. Average delay time that yields error free packet reception in the downlink increases as the number of continuous downlink slots increases.

A 2-bit operational metal/silicon-oxide-nitride-oxide-silicon (MONOS/SONOS) nonvolatile memory using an asymmetric double-gate (ASDG) MOSFET was studied to double flash memory density. The 2-bit programming and erasing was performed by Fowler-Nordheim (FN) tunneling in a NAND array architecture using individually controlled gates. A threshold voltage shift of programmed states for the 2-bit operation was investigated with the aid of a SILVACO® simulator in both sides of the gate by changing gate workfunctions and tunneling oxide thicknesses. In this paper, the scalability of the device down to 30 nm was demonstrated by numerical simulation. Additionally, guidelines of the 2-bit ASDG nonvolatile memory (NVM) structure and operational conditions were proposed for "program," "read," and "erase."

The homomorphic property of the public key cryptosystem has been exploited in order to achieve asymmetric fingerprinting such that only a buyer can obtain fingerprinted content. However, this requires many computations and a wide-band network channel because the entire uncompressed content must be encrypted based on the public key cryptosystem. In this paper, instead of the homomorphic property, we introduce the management of the enciphering keys for the symmetric cryptosystem. Based on a buyer's identity, a trusted center issues the buyer a partial sequence which is one of the two elements in the entire sequence. Although a merchant shares the entire sequence with the center, he cannot extract the buyer's key sequence from it. Such an information gap enables our protocol to be asymmetric and efficient. For each packet of content, the merchant produces two marked packets that contains a "0" or "1" information bit, and they are enciphered using the two elements from the entire sequence. Subsequently, the buyer obtains the two ciphertexts (the encrypted marked packets) containing the information bits of his identity. Since the merchant does not know the ciphertext decrypted by the buyer, an asymmetric property is achieved. In our protocol, before trade between a buyer and a merchant, the merchant can produce and compress the marked packets; this enables the reduction of both the computational costs for the encryption and the amount of data for transmission. Since only the enciphering operation is performed by a merchant in the on-line protocol, real-time operation may be possible.