Voice activity detection (VAD) is to determine whether a short time speech frame is voice or silence. VAD is useful in reducing the mean speech coding rate by suppressing transmission during silence periods, and is effective in transmitting speech and other data simultaneously. This letter describes a VAD system that uses a neural network. The neural network gets several parameters by analyzing slices of the speech wave form, and outputs only one scalar value related to voice activity. This output is compared to a threshold to determine whether the slice is voice or silence. The mean code transfer rate can be reduced to less than 50% by using the proposed VAD system.

This paper discusses a method to evaluate mutual couplings of cavity-backed slot antennas using the FDTD technique. The antenna fed by the short-ended probe is considered, which is investigated as an element of the power transmission antenna, Spacetenna, for the solar power satellite SPS2000. It is found from the FDTD computation on E-plane two- and four-element array antennas that the size of the problem space should be larger for the evaluation of the mutual coupling than for the estimation of the input impedance. Since enlarging the size of the problem space requires a large amount of computer storage, it is not practical for computer simulations. In order to carry out accurate estimations of the mutual coupling with relatively small amount of computer memory, the problem space is extended only in the broadside of the array antenna and in the other directions there are ten cells between the antenna surface and the outer boundary. Computer simulations demonstrate that there are no differences between the results of the proposed problem space geometry and the problem space extended in each direction of the axis coordinate by the same number of cells. Furthermore comparisons of computed and experimental results demonstrate the effectiveness of the approach after discussing how large the size of the problem space is required to estimate the mutual coupling.

We consider a finite-capacity single-server queue with constant service and vacation times, which is seen in the time division multiple access (TDMA) scheme. First we derive the probability that j customers remain in the queue when a test customer arrives. Using this probability we then evaluate the probability that the test customer who arrives during the vacation or service time has to wait in the queue for longer than a given time. From these results, we obtain the waiting time distribution for the customer arriving at an arbitrary time. We also show a practical application to wireless TDMA communications systems.

When wireless multi-media information such as voice, video, data and so on are transmitted, the difference required quality of Service (QoS) including required Bit Error Rate (BER), required information bit rate, message's delay constraints as well as traffic performance should be taken into account. A wireless multi-media system should achieve a flexible balance of these differences. In this letter, an Adaptive Chip/Bit Control Method is proposed for Wireless Multi-media CDMA System. The proposed method controls both chip and bit rate of each medium according to the offered traffic condition and the quality measurement of each medium. In the proposed method, measurement are carried out in the base station. Simulation results show that the proposed method not only maintain the required BER of each medium, but achieve a higher total throughput even in high traffic condition. Thus we see that the proposed method possesses higher flexible ability than conventional methods.

Packet scheduling is one of the key mechanisms that will be employed in the network nodes (routers and switches) for supporting multiple quality of services. In this paper we propose a new packet scheduling algorithm called Urgency-based Round Robin (URR) which computes an index for flows in order to keep track of instantaneous bursts. Basically the index is employed as a measure of the time-dependent service necessity for each flow thus making it possible to detect those flows which might be in need of momentary service. Also, we propose a novel weight allocation scheme to be used together with the scheduler with the aim of preventing network underutilization. Our algorithm can be considered as a version of Weighted Round Robin (WRR) with improved delay characteristics. We show analytically that URR has the desired capability of upper-bounding unfairness. We also show, by simulation, that URR can improve delay performance even under extremely bursty traffic conditions without bandwidth overprovisioning. We also give simulation results for network traffic which exhibits long range dependency (self-similarity) and show that URR is again more effective than a plain round robin multiplexer.

When multiple flows including continuous media streams are simultaneously sent from a computer, allocation and management of both processor capacity and network bandwidth need to be considered. We propose a framework of Quality of Service (QoS) management inside a sending host that controls execution of sending threads in consideration of utilization of processor capacity and network bandwidth. To distinguish from flows which require only best-effort service, we call a flow which requires a specific rate of service "reserved flow. " To guarantee QoS of such reserved flow both in processor- and network-intensive cases in a sending host, processor capacity reserve is allocated such that the rate of each reserved flow is attained and non-conforming data are policed before they are transmitted. Processor Capacity Manager and the network device driver exchange information in a cooperative manner to support the rate adaptive allocation of processor capacity reserve. In this paper, we describe design and implementation of our framework on RT-Mach. The results of performance evaluations demonstrate that our scheme performs well for full-duplex Ethernet.

A generalized radial basis function network consisting of (1 + cosh x)-1 as the basis function of the same class as Gaussian functions is investigated in terms of the feasibility of analog-hardware implementation. A simple way of hardware-implementing (1 + cosh x)-1 is proposed to generate the exact input-output response curve on an analog circuit constructed with bipolar transistors. To demonstrate that networks consisting of the basis function proposed actually work, the networks are applied to numerical experiments of forecasting chaotic time series contaminated with observational random noise. Stochastic gradient descent is used as learning rule. The networks are capable of learning and making short-term forecasts about the dynamic behavior of the time series with comparable performance to Gaussian radial basis function networks.

Reducing communication overhead is a key goal of program optimization for current scalable multiprocessors. A well-known approach to achieving this is to map tasks (indivisible units of computation) to processors so that communication and computation overlap as much as possible. In an earlier work, we developed a look-ahead scheduling heuristic for efficiently reducing communication overhead with the aim of decreasing the completion time of a given parallel program. In this paper, we report on an extension of the algorithm, which fills in the idle time slots created by interprocessor communication without increasing the algorithm's time complexity. The results of experiments emphasize the importance of optimally filling idle time slots in processors.

This article proposes active-ATM, a flexible, simple and cost-effective ATM-WAN architecture that can handle multiple user-customized ATM-layer protocols, such as ABR and ABT, by using a simple universal ATM transit network. The proposed active-ATM architecture enables the construction of flexible networks that can evolve easily. With active-ATM and the ATM multi-protocol emulation network architecture called ALPEN, it is easy to implement new ATM-layer protocols by using user-created programs called active-program capsules that modify only the edge nodes. Because these user-sent program capsules can be used to quickly customize the edge nodes, there is no waiting for standardization and implementation of new services. The ATM-layer protocols are emulated only at the edge nodes, making the transit network independent of customer ATM-layer protocols. The active-ATM edge node is based on the flexible programmable node architecture called PUN(programmable unified node). The PUN is a platform for user-programmable ATM-layer services; it is achieved by using programmable devices, such as FPGAs and DSPs. An prototype system has demonstrated the flexibility of the resulting ATM network. The active-ATM architecture is an efficient approach to implementing multimedia, multi-protocol ATM services in an ATM WAN.

As the current Internet becomes popular in information access, demands for real-time display and playback of continuous media are ever increasing. The applications include real-time audio/video clips embedded in WWW, electronic commerce, and video-on-demand. In this paper, we present a new control protocol R3CP for real-time applications that transmit stored MPEG video stream over a lossy and best-effort based network environment like the Internet. Several control mechanisms are used: a) packet framing based on the meta data; b) adaptive queue-length based rate control scheme; c) data preloading; and d) look-ahead pre-retransmission for lost packet recovery. Different from many adaptive rate control schemes proposed in the past, the proposed flow control is to ensure continuous, periodic playback of video frames by keeping the receiver buffer queue length at a target value to minimize the probability that player finds an empty buffer. Contrary to the widespread belief that "Retransmission of lost packets is unnecessary for real-time applications," we show the effective use of combining look-ahead pre-retransmission control with proper data preloading and adaptive rate control scheme to improve the real-time playback performance. The performance of the proposed protocol is studied via simulation using actual video traces and actual delay traces collected from the Internet. The simulation results show that R3CP can significantly improve frame playback performance especially for transmission paths with poor packet delivery condition.

DQRUMA (Distributed-Queueing Request Update Multiple Access) protocol has been proposed as an access protocol for the wireless ATM Local Area Networks. DQRUMA protocol is useful to transmit fixed-length packets (e. g. ATM cells). However, it cannot be applied to multimedia environment because it does not include any access control policy for multimedia traffic. In the paper, we propose a slot assignment scheme of DQRUMA protocol in wireless ATM LAN which supports integrated multimedia traffic with different service requirements. In this scheme we can allocate network resources according to the service requirements of each medium because the base station assigns Transmit-Permission flexibly according to the features of each medium.

Exception handling is not only useful for increasing program readability, but also provides an effective means to check and locate errors, so it increases productivity in large-scale program development. Some typical and frequent program errors, such as out-of-range indexing, null dereferencing, and narrowing violations, cause exceptions that are otherwise unlikely to be caught. Moreover, the absence of a catcher for exceptions thrown by API procedures also causes uncaught exceptions. This paper discusses how the exception handling mechanism should be supported by the compiler together with the operating system and debugging facilities. This mechanism is implemented in the compiler by inserting inline check code and accompanying propagation code. One drawback to this approach is the runtime overhead imposed by the inline check code, which should therefore be optimized. However, there has been little discussion of appropriate optimization techniques and efficiency in the literature. Therefore, a new solution is proposed that formulates the optimization problem as a common assertion elimination (CAE). Assertions consist of check code and useful branch conditions. The latter are effective to remove redundant check code. The redundancy can be checked and removed precisely with a forward iterative data flow analysis. Even in performance-sensitive applications such as telecommunications software, figures obtained by a CHILL optimizing compiler indicate that CAE optimizes the code well enough to be competitive with check suppressed code.

The development of saturation diving in civil and defense applications has enabled man to work in the sea at great depths and for long periods of time. This advance has resulted, in part, as a consequence of the substitution of helium for nitrogen in breathing gas mixtures. However, utilization of HeO2 breathing mixture at high ambient pressures has caused problems in speech communication; in turn, helium speech enhancement systems have been developed to improve diver communication. These speech unscramblers attempt to process variously the grossly unintelligible speech resulting from the effect of breathing mixtures and ambient pressure, and to reconstruct such signals in order to provide adequate voice communication. It is known that the glottal excitation is quasi-periodic and the vocal tract filter is quasi-stationary. Hence, it is possible to use an auto regressive modelisation to restore speech intelligibility in hyperbaric conditions. Corrections are made on the vocal tract transfer function, either in the frequency domain, or directly on the autocorrelation function. A spectral subtraction or noise reduction may be added to improve speech quality. A new VAD enhanced helium speech unscrambler is proposed for use in adverse conditions or in speech recognition. This system, implementable on single chip DSP of current technology, is capable to work in real time.

This paper presents the architecture of a newly-developed dual-issue RISC processor, D10V, that achieves both high throughput signal processing capability and maintains flexibility for general purpose applications. The RISC processor uses a 2-way VLIW architecture with a 32-bit wide instruction word. Two sub-instructions in a VLIW instruction are executed in two execution units in parallel. It also has several enhancements for signal processing. The processor includes pipelined multiply-and-accumulate instructions allowing a new multiply operation to be initiated every clock cycle and block repeat instructions for zero delay penalty loops. Single-cycle data moves of double-word data elements with modulo addressing are provided to deliver required memory bandwidth for signal processing applications. As a result, the D10V achieves high signal processing capability as 1 clock cycle per tap for FIR filtering. Also, several DSP benchmarks illustrate that the D10V competes favorably and in some instances outperforms conventional 16-bit DSPs. For master controlling application, the processor provides memory operations for signed/unsigned byte and bit wise operations. It shows 49 Dhrystone MIPS at 52 MHz, for general purpose applications.

In this paper we propose a total quality evaluation method in an ATM network-type remote conference system, and describe the results of evaluations of a proving system. The quality of a remote conference system depends on such various elements as video images, voice signals, and cost; but a total quality index may be regarded as the cost of a remote conference system compared with that of a conventional face-to-face conference. Here, however, the decline in communication quality arising from the remote locations of participants must be included in the evaluation. Moreover, the relative weightings of voice signals, video images of participants, and shared data will vary depending on the type of conference, and these factors must also be taken into account in evaluations. An actual conference systems were constructed for evaluation, and based on a MOS (Mean Opinion Score) of the quality elements, the total system quality was evaluated with reference to the proposed concepts. These results are also described in this paper.

Integrating a 243 MHz dual-issue RISC processor core with a small set of dedicated hardware can create a single chip system for real-time encoding and decoding for MPEG2 MP@ML (main profile at main level). A trade-off between software and dedicated hardware is very important to decide performance of the system. This paper evaluates several MPEG2 encoding and decoding systems, focusing on both chip area and power consumption. For MPEG2 encoding, a newly introduced hybrid approach includes the processor core and the dedicated hardware that performs the discrete cosine transform (DCT), the inverse DCT (IDCT), variable length encoding (VLC) and block loading process. The estimated area for the encoder, 23. 0 mm2 using a 0. 3-micrometer 1-poly 4-metal CMOS process, is 33% smaller than that of the dedicated hardware approach. The estimated power consumption for the encoder is 13% smaller than that of the dedicated hardware approach. The dual-issue RISC processor approach has the advantage of a small chip area, low power consumption and that of being very easy to program for multimedia applications.

This paper describes an efficient simulation algorithm for the spatiotemporal pattern analysis of the continuous-time neural networks with the multivalued logic (multivalued continuous-time neural networks). The multivalued transfer function of neuron is approximated to the stepwise constant function which is constructed by the sum of the step functions with the different thresholds. By this approximation, the dynamics of the network can be formulated as a stepwise constant linear differential equation at each timestep and the optimal timestep for the numerical integration can be obtained analytically. Finally, it is shown that the proposed method is much faster than a variety of conventional simulators.

Though response of neurons is mainly decided by synaptic events, the length of a time window for the neuronal response has still not been clarified. In this paper, we analyse the time window within which a neuron processes synaptic events, on the basis of the Hodgkin-Huxley equations. Our simulation shows that an active membrane property makes neurons' behavior complex, and that a few milliseconds is plausible as the time window. A neuron seems to detect coincidence synaptic events in such a time window.

In merged DRAM/logic LSIs, the DRAM portion could suffer from shorter data retention time because of heat and noise caused by the logic portion. In order to reconsider the DRAM data retention characteristics, this paper formulates and evaluates the performance degradation due to conflicts between normal DRAM accesses and refresh operations. Next, this paper proposes a new DRAM refresh architecture which intends to reduce unnecessary refreshes. This architecture exploits multiple refresh periods. Each row is refreshed with the most appropriate period of them. Reducing the number of refreshes improves the accessibility to DRAM. It is shown that the method reduces the number of refreshes and the degree of the performance degradation of the logic portion.

On wide area networks (WANs), UDP has likely been used for real-time applications, such as video and audio. UDP supplies minimized transmission delay by omitting the connection setup process, flow control, and retransmission. Meanwhile, more than 80 percent of the WAN resources are occupied by Transmission Control Protocol (TCP) traffic. As opposed to UDP's simplicity, TCP adopts a unique flow control mechanism with sliding windows. Hence, the quality of service (QoS) of real-time applications using UDP is affected by TCP traffic and its flow control mechanism whenever TCP and UDP share a bottleneck node. In this paper, the characteristics of UDP packet loss are investigated through simulations of WANs conveying UDP and TCP traffic simultaneously. In particular, the effects of TCP flow control on the packet loss of real-time audio are examined to discover how real-time audio should be transmitted with the minimum packet loss, while it is competing with TCP traffic for the bandwidth. The result obtained was that UDP packet loss occurs more often and successively when the congestion windows of TCP connections are synchronized. Especially in this case, the best performance of real-time audio applications can be obtained when they send-small sized packets without reducing their transmission rates.