Intricate Speech Communication Mode (I-SC Mode) is observed in verbal interaction during ISDN-TV conferencing. It is characterized by conflicts and multiple interactions of speech. I-SC Mode might cause mental stress to participants and be obstacles for smooth communication. However, the reasons of I-SC Mode on the environment of information transmission are hitherto unknown. Furthermore, analyses on the talks inside a conference site (LT: local talk or a talk inside a local site) and between remote sites (MT: media talk or a talk between remote sites) are originally conceived on assumed differences in cognitive distance and media intimacy. This study deals with communication effects/barriers and cognitive distance/intimacy of media correlated with audio-video transmission signals and speech modes or talk types and response delay in human speech interactions by using an innovated conference model (decision-making transaction model: DT-Model) in synchronous ISDN-TV conference systems (SYN) and asynchronous ones (ASYN). The effects of intricate communication can be predicted to a certain extent and in some ways. In I-SC Mode, because a timely answer can not be received from recipients (or partner), response time delay and response rate are analyzed. These factors are thus analyzed with an innovated dynamic model, where the recognizable acceptance of delay is evaluated. The nonlinear model shows that the larger the response time delay, the lower the response rate becomes. Comparing the response rate between SYN and ASYN, the latter is notably lower than the former. This indicates that the communication efficiency is lower in ASYN. An I-SC Mode is the main mode that occurs during ASYN conferences, and this in turn causes psychological stress. Statistics show the prevalence of a high incidence of complicated plural talks and a low response rate exists as the main factors preventing smooth human-to-human communication. Furthermore, comparing the response delays in face-to-face LT (Tf) and machine-mediated MT (Tm), human communication delay is significantly extended by the effects of initial mechanical delays. Therefore, cognitive intimacy of media is clearly affected by the existence of physical distance.

Multimedia communications, fast growing industry in the world and in Korea, require advanced technology in network, computer, device, and application software. Korean government and industries prepare for this huge opportunity by commitment to national R&D programs. While investing heavily on present multimedia products, private companies also support R&D on future multimedia technologies. This paper surveys key R&D efforts in Korea by programs and organizations.

In this paper, the real-time scheduling mechanism which could support multimedia retrieval services more efficiently is investigated. In order to support multimedia service, the MEDF (modified earliest deadline first) algorithm that takes advantage of the priority queue and the virtual deadline mechanism is proposed. Additionally, its performance is analyzed and compared with conventional RR (round robin), FCFS (first come first serve), SS (sporadic server), MRF (minimum remained-time first), and EDF (earliest deadline first) algorithms. According to the simulation results, the proposed MEDF algorithm shows better performance than other scheduling algorithms in the multimedia environments.

This paper presents the design concept of the MEMORI, MHEG Engine for Multimedia information Object Retrieval and Interchange, which consists of three functional modules; the decoder, the object manager, and interpreter. Based on our modular design, the MEMORI has been implemented on the UNIX workstation. The menu-driven object generator has also been developed to generate the test objects conforming to the MHEG. Using the object generator, several multimedia/hypermedia test objects have been composed on the basis of presentation scenarios. The results show that the MEMORI correctly decodes, manages, and interprets the MHEG objects. The MEMORI can be utilized for the interactive multimedia server as well as the multimedia presentation system.

In order to produce high quality multimedia contents efficiently, DTPP -desktop program production system- has been proposed. The DTPP is capable of supporting all the necessary procedures of program production, from planning to broadcasting, by molding each process into the desktop environment of program producers. The DTPP system consists of multimedia terminals, a media server, a computing server, and network system. In the DTPP, new technological concepts such as cooperative program production, indexing and utilization of attribute information of images, and video components and spatio-temporal editing will be installed.

Stacked capacitor dynamic random access memory(DRAM) cells with both NMOS and PMOS cell transistors(Lg=0.4µm) were fabricated on ultra-thin SIMOX(separation by implantation of oxygen) substrates, and the data retention time was compared with that of a bulk counterpart. A DATA retention time of 550 sec(at 25 ) could be achieved using ultra-thin SIMOX substrates, which is 6 times longer than that using the bulk substrate. A stacked capacitor cell with a PMOS cell transistor on an ultra-thin SIMOX substrate is very attractive and promising for future giga-bit DRAM cells.

This paper designs recursive least-squares fixed-point smoother and filter, which use the observed value, the probability that the signal exists, and the covariance information relevant to the signal and observation noises, on the estimation problem associated with the uncertain observations in linear continuous-time systems.

This paper illustrates activities and accomplishments being made by DAVIC, a non-profit organization pushing forward its open, international, cross-industry standards for audio-visual information systems, of which video-on-demand is the representative. Core technologies selected in its firstly published specifications and their interoperability aspects are summarized here. Preliminary results in our interoperability testing are also shown. Finally, we touch upon the coming work plan of DAVIC which covers wider range of access network capabilities and service domains, e.g. internet.

Time-critical-communication, which should guarantee a time limit of a communication service is getting important in multimedia and factory automation fields. This paper proposes an IP-based protocol, Network Protocol with Performance (NPP) to provide the advanced best-effort service which takes a time constraint into account for real-time applications on the Internet. NPP uses the packet-scheduling function to make an effort to guarantee time constraints. Packet-scheduling algorithm chooses a packet in a NPP queue by a precedent level and a time constraint of each packet. We also discuss an application of NPP to multimedia communication system, and investigate performance of NPP by simulation.

In this paper, a simple method to investigate the dynamics of continuous-time neural networks based on the force (kinetic vector) derived from the equation of motion for neural networks instead of the energy function of the system has been described. The number of equilibrium points and limit cycles of one-dimensional neural networks with the asymmetric cyclic connection matrix has been investigated experimently by this method. Some types of equilibrium points and limit cycles have been theoretically analyzed. The relations between the properties of limit cycles and the number of connections also have been discussed.

A CMOS fully balanced current-mode filter is presented. A fully balanced current-mode integrator which is the basic building block is implemented by adding a very simple common-mode-rejection mechanism to fully differential one. The fully balanced operation can eliminate even order distortion, which is one of the drawbacks in previous continuous current-mode filter. Moreover, the additional circuit can work as not only common-mode-rejection mechanism but also Q-tuning circuit which compensates lossy elements due to finite output impedance of MOS FET. A prototype fifth-order low-pass lad-der filter designed in a standard digital 0.8µm CMOS process achieved a cut-off frequency (fC) of 100MHz; fC was tunable from 75MHz to 120MHz by varying a reference bias current from 50µA to 150µA. Using a single 3V power supply with a nominal reference current of 100µA, power dissipation per one pole is 30mW. The active filter area was 0.011mm2/pole and total harmonic distortion (THD) was 0.73 [%] at 80MHz, 80µA amplitude signal. Furthermore, by adjusting two bias currents, on chip automatic both frequency and Q controls are easily implemented by typical tuning systems, for example master-slave tuning systems [1].

Multimedia Database Systems as the tool to extract and generate additional values from multimedia 'Contents' are discussed in this paper with putting emphasis on the mediator functions between users and contents. Firstly, we discuss about 'what to do' from the view point of four promising contents sources: 'on the network,' 'in the digital broadcasting' 'in the library' and 'in the real world.' From this view pont, four types of multimedia database systems are defined. 'What to do' for each database system is also discussed. Two concrete multimedia database systems with unique mediator functions, stream-type multimedia database platform GOLS and the intelligent access and authoring system using multiple media synchronization are proposed with experimental evaluation results and concrete multimedia database applications.

Full-search block-matching motion estimation is a popular method to reduce temporal redundancies in video sequence. Due to its excessive computational load, parallel processing architectures are often required for real-time processing. One of the architectures is Hsieh's architecture based on systolic array processor and shift register arrays. Serial input characteristic of his scheme can reduce the number of pixel inputs to one, at the expense of significantly increasing the initialization time. This paper presents a modified and generalized Hsieh's architecture to reduce the initialization time. The proposed architecture can easily control data flows by rearranging shift register arrays and input-pin counts by using multiplexers on input stage, while retaining good properties of Hsieh's. The proposed architecture has the following advantages: (1) it allows controllable data inputs to save the pin counts, (2) it is flexible to the dimensional change of the search area via simple control, (3) it can operate in real time for video conference applications, and (4) it has simple and modular structure which is quite suitable for VLSI implementation. For verification of the proposed architecture, VHDL simulations are performed and some results are given.

This paper is concerned with spoken language translation in multimedia communication environment. We summarize the current research activities, by describing various spoken language translation systems and the multimodal technology related to spoken language translation. We propose a spoken language translation system that exploits the multimedia communication environment in order to overcome the limits caused by imperfect speech recognition. Our approach is in contrast to that of most conventional speech translation systems that limit their dialogue domains to obtain better speech recognition. We also propose a performance measure for spoken language translation systems. Our measure is defined as the ratio of the information quantities at each end of communication. Using this measure, we show that multimedia enhance spoken language translation systems.

In this paper, we describe the design and implementation of a hypermedia system that has the following characteristics. First, being designed according to the Dexter hypertext reference model, it has a layered architecture and thus maintains commonality with other hypermedia systems based on the Dextermodel. Second, being designed based on the MHEG standard, it has data structures that are inherently suitable for data interchange and synchronization. Third, adopting the MIME protocol, it provides multimedia mail services. Finally, being built on top of an object-oriented DBMS, it makes it easy to represent Dexter and MHEG models and also provides efficient storage and search capabilities. The contribution of this paper is combining these characteristics to build an integrated hypermedia system reflecting reference architectures and international standard efforts.

Storage system in a multimedia server must satisfy two contradicting requirements: real-timeliness and large number of parallel user requests. Efficient algorithms for data placement, disk head scheduling, and request admission control schemes are needed to support the requirements. In this paper, we propose efficient schemes to maximize system resource utilization and service availability: cyclic placement scheme, subgroup retrieval scheme, and measurement-based request admission control scheme. Performance analysis through simulation revealed that the amount of system buffers required can be reduced by 70% approximately.

Discrete-time chaotic circuits realizing a tent map and a Bernoulli map are synthesized using switched-current (SI) techniques. For these proposed circuits, simulations are performed concerning the return maps and bifurcation trees. The theoretical analysis is carried out to predict the bifurcation tree under the existence of the nonidealities in the return map. This analysis has been done by assuming the return maps to be piecewise linear. The proposed circuits are built with commerciallyavailable IC's. And their return maps and bifurcation trees are measured in the experiment. The design formulas are obtained for the bifurcation trees and they are confirmed by the simulation results. The proposed circuits are integrable by a standard BiCMOS technology.

In this paper, we show that by suitably selecting a notation to construct synchronization requirement specifications (SRS) for multimedia presentation we can express the timing characteristics at an abstract level, verify the specification, and obtain a hardware implementation through a sequence of transformations of the specification. First, we introduce the notion of a well-formed SRS and its hardware model. Second, we model an SRS as a timed Petri net and interpret the transitions of the net as hardware signals. To obtain logic functions from the SRS, we simplify the net and obtain a signal transition graph satisfying the unique state coding property. Finally, we show how to obtain a logic-level design of synchronizers.

The reception level of a round-trip signal from a VSAT (Very Small Aperture Terminal) was monitored continuously for three years starting October 1991.For these experimental measurements, a commercial satellite channel (up-link 14GHz/downlink 12GHz, bandwidth 100kHz) was used and rainfall was measured simultaneously. Data gathering time interval of 2 seconds was adopted to elucidate very rapid variation and lower percentage statistics. In this paper, attenuation due to rainfall is shown using the data obtained in this three-year period. It is shown that so far, the measured rain attenuation agrees very well with the values estimated using the CCIR model, and limits the range where the cumulative time exceeds 0.01%, even for our VSAT system in Tagajo, Miyagi Prefecture, Japan.

This paper proposes a half-chip offset QPSK (Quadrature Phase Shift Keying) modulation CDMA (Code Division Multiple Access) scheme to allow the simple differential detection while realizing a compact spectrum in nonlinear channels for wireless LAN systems. The experimental results show the proposed scheme achieves excellent Pe (probability of error) performances in ACI (adjacent channel interference) and CCI (co-channel interference) environments. Moreover, by employing time diversity and high-coding-gain FEC (Forward Error Correction), the half-chip offset QPSK-CDMA scheme realizes an improvement of 3.0 dB (in terms of Eb/No at a Pe of 105) in Rician fading environments with a Doppler frequency fD of 10 Hz and a delay spread of 40 nsec.