This paper proposes a new supply current test method for detecting floating gate defects in CMOS ICs. In the method, unusual increase of the supply current caused by defects is promoted by superposing an AC component on the DC power supply. Feasibility of the test is examined by some experiments on four DUTs with an intentionally caused defect. The results showed that our method could detect clearly all the defects, one of which may be detected by neither any functional logic test nor any conventional supply current test.

In this paper, test time reduction for IDDQ testing is discussed. Although IDDQ testing is known to be effective to detect faults in CMOS circuit, test time of IDDQ testing is larger than that of logic testing since supply current is measured after a circuit is in its quiescent state. It is shown by simulation that test time of IDDQ test mostly depends on switching current. A procedure to modify test vectors and a procedure to arrange test vectors are presented for reducing the test time of IDDQ testing. A test sequence is modified such that switching current quickly disappears. The procedure utilizes a unit delay model to estimate the time of the last transition of logic value from L to H in a circuit. Experimental results for benchmark circuits show the effectiveness of the procedure.

In this paper, we analyze behaviors of bridging faults in CMOS synchronous sequential circuits based on transient analysis. From analysis results, we expose dynamic and analog behaviors of the circuit caused by the bridging faults, which are oscillation, asynchronous sequential behavior, IDDT failure and IDDQ failure as well as logic error. In order to detect this kind of fault, we show that not only IDDQ testing but also IDDT testing and logic testing which guarantees correct state transitions are required.

In this paper, we propose a preemptive test scheduling technique (a test can be interrupted and later resumed) for core-based systems with the objective to minimize the test application time. We make use of reconfigurable core test wrappers in order to increase the flexibility in the scheduling process. The advantage with such a wrapper is that it is not limited to a single TAM (test access mechanism) bandwidth (wrapper chain configuration) at each core. We model the scheduling problem as a Bin-packing problem, and we discuss the transformation: number of TAM wires (wrapper-chains) versus test time in combination with preemption, as well as the possibilities and the limitations to achieve an optimal solution in respect to test application time. We have implemented the proposed preemptive test scheduling algorithm, and we have through experiments demonstrated its efficiency.

Most of system-on-chips (SOCs) have many memory cores. Diagnosis is often used to improve the yield of memories. Memory cores usually represent a significant portion of the chip area and dominate the yield of the chip. Memory diagnosis thus is one of key techniques for improving the yield and quality of SOCs. Content addressable memories (CAMs) are important components in many SOCs. In this paper we propose a three-phase diagnosis procedure for binary CAMs (BCAMs). The user can distinguish different types of BCAM-specific comparison and RAM faults and locate the faulty cells with the procedure. A March-like fault identification algorithm is also proposed. The algorithm can distinguish different types of faults--including typical RAM faults and BCAM-specific comparison faults. The algorithm requires 15N Read/Write operations and 2(N + B) Compare operations for an N B-bit BCAM. Analysis results show that the algorithm has 100% diagnostic resolution for the target faults.

To realize the hardware object which facilitates the application development in the reconfigurable computing system, a hardware module (HwModule) is proposed and implemented. To access the circuit in the HwModule from the standard PC without detailed knowledge of the hardware, an object manager (ObjectManager) is also implemented. With the help of the ObjectManager, the programmers can use the hardware objects like the usual software objects. The HwModule is applied to the image matching, and the easiness of the application development for the HwModule is confirmed.

There exists a class of nonlinear systems which fail to have a well-defined relative degree but have a robust relative degree. We have removed the full relative degree assumption which the previous results required, and have provided a local state observer for nonlinear systems that have robust relative degree γ n and have detectability property in some sense. The proposed observer utilizes the coordinate change which transforms the system into an approximate normal form. Using the proposed method, we constructed an observer for the ball and beam system on a vibrating frame. Simulation results reveal that substantial improvement in the performance is achieved compared with other local observers.

A new sorting algorithm and architecture for fast median filter are proposed. This algorithm results in low area VLSI architecture producing low switching activity and without using feedback. The main idea is to employ the extra matrix for fast search operation of rank of oldest window element. We simulated and synthesized this algorithm using SYNOPSYSTM and showed the sufficiency in real time operation.

We propose a novel optical signal processing using an optically pumped vertical-cavity surface-emitting laser (VCSEL) with an external light input. The mode transition between a fundamental and a 1st-high-order transverse mode is induced by an external light injection. Since a single mode fiber (SMF) spatially selects a fundamental transverse mode as an output signal, we are able to realize a nonlinear transfer function, which will be useful in future photonic networks. The mode transition characteristic of a 1.55 µm optically pumped two-mode VCSEL has been simulated by using a two-mode rate equation, which includes the effects of spatial hole burning and spectral hole burning as gain saturation coefficients. We focus on the detuning effect in the injection locking. When the wavelength of an input light with a fundamental mode is slightly longer than that of a VCSEL operating in a 1st-high-order transverse mode, the transverse mode of the VCSEL is switched to a fundamental mode at a critical input power level. This gives us an ideal transfer function for 2R (reamplification and reshaping) regeneration. Also, the proposed scheme may enable polarization insensitive signal processing, which is a unique feature in surface emitting lasers.

There is an increasing demand for the technology of content distribution, by which each user can request desired content through a network. Because of the low efficiency of existing systems, we proposed a new block transfer type video distribution system called Burst VoD. The Burst VoD system aggressively utilizes multicasting, and divides the content data into a mass of block files, which it periodically transmits to a terminal through a high-speed network, using a higher rate than the playback speed. However, by using the scheduling algorithm of the Burst VoD system, when users request the same content from different periods, the VoD server repeatedly transmits the same block files in different periods. In this paper, we propose an advanced scheduling algorithm based on the Burst VoD system to improve its multicasting efficiency. In addition, we propose a multi-channel BurstVoD in order to reduce the interface bandwidth of client.

By means of the three-dimensional (3D) finite-difference time domain (FDTD) method, we have investigated in detail the optical properties of a two-dimensional photonic crystal (PC) surface-emitting laser having a square-lattice structure. The 3D-FDTD calculation is carried out for the finite size PC slab structure. The device is based on band-edge resonance, and plural band edges are present at the corresponding band edge point. For these band edges, we calculate the mode profile in the PC slab, far field pattern (FFP) and polarization mode of the surface-emitted component, and photon lifetime. FFPs are shown to be influenced by the finiteness of the structure. Quality (Q) factor, which is a dimensionless quantity representing photon lifetime, is introduced. The out-plane radiation loss in the direction normal to the PC plane greatly influences the total Q factor of resonant mode and is closely related with the band structure. As a result, Q factors clearly differ among these band edges. These results suggest that these band edges include resonant modes that are easy to lase and resonant modes that are difficult to lase.

In this paper, we discuss the performance of a basic scheme to support network mobility. Network mobility arises when an entire network segment, such as a network inside a vehicle, changes its topological location and thus its access point to the fixed backbone network. Mechanisms to support network mobility are necessary to maintain sessions. The approach followed by the IETF (NEMO Basic Support) and us (B-ORC) is to establish a bi-directional tunnel between the mobile network and the Internet. As we show, this bi-directional tunnel is a performance bottleneck and leads to single points of failure. In order to address the issues of the existing mobile network architecture, we propose enhanced operations of the basic mobile network protocol to achieve reliability and efficiency: (1) multiple bi-directional tunnels between the mobile network and the Internet, and (2) policy-based routing. The proposed operations could be realized by extending the existing architecture and protocol. The performance of various multihoming configurations is evaluated based on the implementation of our own basic scheme. The evaluation criteria are delay, throughput and latency. The results are encouraging and show we can achieve a better throughput.

The IP routing lookup problem is equivalent to finding the longest prefix of a packet's destination address in a routing table. It is a challenging problem to design a high performance IP routing lookup architecture, because of increasing traffic, higher link speed, frequent updates and increasing routing table size. At first, increasing traffic and higher link speed require that the IP routing can be executed at wire speed. Secondly, frequent routing table updates require that the insertion and deletion operations should be simple and low delay. At last, increasing routing table size hopes that less memory is used in order to reduce cost. Although many schemes to achieve fast lookup exist, less attention is paid on the latter two factors. This paper proposed a novel pipelined IP routing lookup architecture using selective binary search on hash table organized by prefix lengths. The evaluation results show that it can perform IP lookup operations at a maximum rate of one lookup per cycle. The hash operation ratio for one lookup can be reduced to about 1%, less than two hash operations are needed for one table update and only 512 kbytes SRAM is needed for a routing table with about 43000 prefixes. It proves to have higher performance than the existing schemes.

We present master-slave pulse-coupled bifurcating neurons having refractoriness. The system can exhibit various phenomena, e. g. , periodic and chaotic in-phase synchronizations, and periodic out-of-phase synchronization. We clarify local stabilities of the phenomena and a sufficient condition for the in-phase synchronization. It is suggested that bifurcations of the synchronization phenomena may relate to detection of a master parameter, and the refractoriness may relate to control of the detection accuracy. Using a simple test circuit, typical phenomena are verified in the laboratory.

This paper presents a new mobility protocol that supports multiple namespaces on IPv6 networks. Our proposed protocol framework allows a mobile node to specify a correspondent node by a name that is defined in any namespace as a node identifier. This technique removes certain restrictions on the space of node identifiers and allows mobile nodes to communicate with each other regardless of their location. Mobile nodes negotiate a pseudo node identifier, which is unique between the two nodes, with a correspondent node that is identified by the name. We make this pseudo node identifier compatible with the IPv6 address format; we can thus use existing IPv6 applications with our proposed mobility framework. This framework is based on Location Independent Network Architecture (LINA), and provides mobility support in a simple fashion and with low protocol overhead. We also demonstrate how to provide anonymity to our mobility protocol by using a dynamic pseudo node identifier. Our prototype implementation shows minimal overhead compared to a conventional IPv6 implementation.

When LSIs that are designed and manufactured for low power dissipation are tested, test vectors that make the power dissipation low should be applied. If test vectors that cause high power dissipation are applied, incorrect test results are obtained or circuits under test are permanently damaged. In this paper, we propose a method to generate test sequences with low power dissipation for sequential circuits. We assume test sequences generated by an ATPG tool are given, and modify them while keeping the original stuck-at fault coverages. The test sequence is modified by inverting the values of primary inputs of every test vector one by one. In order to keep the original fault coverage, fault simulation is conducted whenever one value of primary inputs is inverted. We introduce heuristics that perform fault simulation for a subset of faults during the modification of test vectors. This helps reduce the power dissipation of the modified test sequence. If the fault coverage by the modified test sequence is lower than that by the original test sequence, we generate a new short test sequence and add it to the modified test sequence.

G.Huet (1980) showed that a left-linear term-rewriting system (TRS) is Church-Rosser (CR) if P Q for every critical pair where P Q is a parallel reduction from P to Q. But, it remains open whether it is CR when Q P for every critical pair . In this paper, we give a partial solution to this problem, that is, a left-linear TRS is CR if Q P for every critical pair where Q P is a parallel reduction with the set W of redex occurrences satisfying that if the critical pair is generated from two rules overlapping at an occurrence u, then the length |w| |u| for every w W. We also show that a left-linear TRS is CR if Q P for every critical pair generated from two rules overlapping at an occurrence u. Here, Q P is either Q = P or a reduction whose redex occurrence is not greater than u. This condition is incomparable with the previous one and a partial solution to the open problem of ascertaining whether it is CR when Q P for every critical pair .

In order to transport an ever-increasing amount of IP traffic effectively, Photonic IP networks that employ wavelength routing and Layer 3 cut-through are very important. This paper proposes a new network design algorithm that minimizes the network cost considering IP traffic growth for multi-layered photonic IP networks that comprise electrical label switched paths (LSPs) and optical LSPs. We evaluate the network cost obtained from the developed network design algorithm that considers IP traffic growth and compare it to the results obtained from a static zero-based algorithm. The static zero-based algorithm does not take into account the history of progressive past IP traffic changes/growth until that time. The results show that our proposed algorithm is very effective; the cost increase from the cost obtained using the zero-based algorithm is marginal. The algorithm developed herein enables effective multi-layered photonic IP network design that can be applied to practical networks where IP traffic changes/increases progressively and that can be used for long term network provisioning.

In this paper, we address the survivable routing problem with and without wavelength-continuity constraints by proposing a new Integer Linear Programming (ILP) algorithm, which is based on a simplified necessary and sufficient condition. Numerical results are given and discussed to show the efficiency of our algorithm and the impact of wavelength-continuity constraints.

Simply-typed term rewriting systems (STRSs) are an extension of term rewriting systems. STRSs can be naturally handle higher order functions, which are widely used in existing functional programming languages. In this paper we design recursive and lexicographic path orders, which can efficiently prove the termination of STRSs. Moreover we discuss an application to the dependency pair and the argument filtering methods, which are very effective and efficient support methods for proving termination.