In this letter, a novel steganographic method with four-pixel differencing and exploiting modification direction is proposed. Secret data are embedded into each four-pixel block by adaptively applying exploiting modification direction technique. The difference value of the four-pixel block is used to judge whether the pixels in edge areas can tolerate larger changes than those in smooth areas. The readjustment guarantees to extract the secret data exactly and to minimize the embedding distortion. Since the proposed method processes non-overlapping 22 pixels blocks instead of two consecutive pixels, the features of edge can be considered sufficiently. Compared with the previous method, experimental results show that the proposed method provides better performance, i.e., larger embedding capacity and better image quality.

In this paper, a fast and automated method of counting pedestrians in crowded areas is proposed along with three contributions. We firstly propose Local Empirical Templates (LET), which are able to outline the foregrounds, typically made by single pedestrians in a scene. LET are extracted by clustering foregrounds of single pedestrians with similar features in silhouettes. This process is done automatically for unknown scenes. Secondly, comparing the size of group foreground made by a group of pedestrians to that of appropriate LET captured in the same image patch with the group foreground produces the density ratio. Because of the local scale normalization between sizes, the density ratio appears to have a bound closely related to the number of pedestrians who induce the group foreground. Finally, to extract the bounds of density ratios for groups of different number of pedestrians, we propose a 3D human models based simulation in which camera viewpoints and pedestrians' proximity are easily manipulated. We collect hundreds of typical occluded-people patterns with distinct degrees of human proximity and under a variety of camera viewpoints. Distributions of density ratios with respect to the number of pedestrians are built based on the computed density ratios of these patterns for extracting density ratio bounds. The simulation is performed in the offline learning phase to extract the bounds from the distributions, which are used to count pedestrians in online settings. We reveal that the bounds seem to be invariant to camera viewpoints and humans' proximity. The performance of our proposed method is evaluated with our collected videos and PETS 2009's datasets. For our collected videos with the resolution of 320 × 240, our method runs in real-time with good accuracy and frame rate of around 30 fps, and consumes a small amount of computing resources. For PETS 2009's datasets, our proposed method achieves competitive results with other methods tested on the same datasets [1],[2].

This paper presents a method to improve field uniformity using two TX antennas in a reverberation chamber with less steps of a stirrer. A mode-stirred reverberation chamber (MSRC) is considered as an alternative to the semi-anechoic chamber for an electromagnetic compatibility test because it provides a large test volume, a statistically uniform field, and a high maximum electric field. To improve field uniformity, we introduce two transmitting antennas for excitation in an MSRC, and predict statistical distribution of the complex reflection coefficients (scattering parameters). To prove the validation of our theory and the reliability of measurement results, three kinds of stirrers with different shape and sizes were fabricated and their efficiencies were measured in an MSRC, and then field uniformities have been investigated for 1–3 GHz frequency within the maximum number of independent samples that stirrers can provide. The measurement results show that the average received power is about 1.5 times as high as when using one transmitting antenna, and field uniformity is improved. Use of two transmitting antennas in an MSRC is regarded as a useful method to improve field uniformity at less stirrer steps, for radiated immunity tests.

Multicast routing with Quality-of-Service (QoS) guarantees is the key to efficient content distribution and sharing. Developing QoS-aware multicast routing algorithm is an important open topic. This paper investigates QoS-aware multicast routing problem with K constraints where K > 2. The contributions made in this paper include a heuristic that employs the concept of nonlinear combination to extend the existing well-known algorithm for fast computation of a QoS multicast tree, and a Fully Polynomial Time Approximation Scheme (FPTAS) to approximate a multicast routing tree with QoS guarantees. The theoretical analyses and simulations conducted on both algorithms show that the algorithms developed in this paper are general and flexible, thus are applicable to the various networking systems.

We present a fast voting scheme for localizing circular objects among clutter and occlusion. Typical solutions for the problem are based on Hough transform that evaluates an instance of circle by counting the number of edge points along its boundary. The evaluated value is proportional to radius, making the normalization with respect to the factor necessary for detecting circles with different radii. By representing circle with a number of sampled points, we get rid of the step. To evaluate an instance then involves obtaining the same number of edge points, each close to a sampled point in both spatial position and orientation. The closeness is measured by compatibility function, where a truncating operation is used to suppress noise and deal with occlusion. To evaluate all instances of circle is fulfilled by letting edge point vote in a maximizing way such that any instance possesses a set of maximally compatible edge points. The voting process is further separated into the radius-independent and -dependent parts. The time-consuming independent part can be shared by different radii and outputs the sparse matrices. The radius-dependent part shifts these sparse matrices according to the radius. We present precision-recall curves showing that the proposed approach outperforms the solutions based on Hough transform, at the same time, achieves the comparable time complexity as algorithm of Hough transform using 2D accumulator array.

A 315 MHz power-gated ultra low power transceiver for wireless sensor network is developed in 40 nm CMOS. The developed transceiver features an injection-locked frequency multiplier for carrier generation and a power-gated low noise amplifier with current second-reuse technique for receiver front-end. The injection-locked frequency multiplier implements frequency multiplication by edge-combining and thereby achieves 11 µW power consumption at 315 MHz. The proposed low noise amplifier achieves the lowest power consumption of 8.4 µW with 7.9 dB noise figure and 20.5 dB gain in state-of-the-art designs.

Mirrored serpentine microstrip lines are proposed for a parallel high speed digital signaling to reduce the peak far-end crosstalk (FEXT) voltage. Mirrored serpentine microstrip lines consist of two serpentine microstrip lines, each one equal to a conventional normal serpentine microstrip line. However, one serpentine microstrip line of the mirrored serpentine microstrip lines is flipped in the length direction, and thus, two serpentine microstrip lines face each other. Time domain reflectometry measurements show that the peak FEXT voltage of the mirrored serpentine microstrip lines is reduced by 56.4% of that of conventional microstrip lines and 30.0% of that of conventional normal serpentine microstrip lines.

In this paper, a low-complexity symbol-spaced turbo frequency domain equalization (FDE) algorithm based on Laurent decomposition is proposed for precoded binary continuous phase modulation (CPM) with modulation index h=1/2. At the transmitter, a precoder is utilized to eliminate the inherent memory of the CPM signal. At the receiver, a matched filter based on Laurent decomposition is utilized to make the detection symbol-spaced. As a result, the symbol-spaced iteration can be taken between the equalizer and the decoder directly without a CPM demodulator, and we derive a symbol-spaced soft interference cancellation frequency domain equalization (SSIC-FDE) algorithm for binary CPM with h=1/2. A new data block structure for FDE of partial response CPM is also presented. The computational complexity analysis and simulations show that this approach provides a complexity reduction and an impressive performance improvement over previously proposed turbo FDE algorithm for binary CPM with h=1/2 in multi-path fading channels.

The performances of the conventional planar type 1T DRAM and the Vertical type 1T DRAM are compared based on structure difference using a fully-consistent device simulator. We discuss the structural advantage of the Vertical type 1T-DRAM in comparison with the conventional planar type 1T-DRAM, and evaluate their performance in each operating mode such as write, erase, read, and hold; and discuss its cell performances such as Cell Current Margin and data retention. These results provide a useful guideline designing the high performance Vertical type 1T-DRAM cell.

Recently, the 3-D vertical Floating Gate (FG) type NAND cell arrays with the Sidewall Control Gate (SCG), such as ESCG, DC-SF and S-SCG, are receiving attention to overcome the reliability issues of Charge Trap (CT) type device. Using this novel cell structure, highly reliable flash cell operations were successfully implemented without interference effect on the FG type cell. However, the 3-D vertical FG type cell has large cell size by about 60% for the cylindrical FG structure. In this point of view, we intensively investigate the scalability of the FG width of the 3-D vertical FG NAND cells. In case of the planar FG type NAND cell, the FG height cannot be scaled down due to the necessity of obtaining sufficient coupling ratio and high program speed. In contrast, for the 3-D vertical FG NAND with SCG, the FG is formed cylindrically, which is fully covered with surrounded CG, and very high CG coupling ratio can be achieved. As results, the scaling of FG width of the 3-D vertical FG NAND cell with S-SCG can be successfully demonstrated at 10 nm regime, which is almost the same as the CT layer of recent BE-SONOS NAND.

In parallel computing systems using the master/worker model for distributed grid computing, as the size of handling data grows, the increase in the data transmission time degrades the performance. For divisible workload applications, therefore, multiple-round scheduling algorithms have been being developed to mitigate the adverse effect of longer data transmission time by dividing the data into chunks to be sent out in multiple rounds, thus overlapping the times required for computation and transmission. However, a standard multiple-round scheduling algorithm, Uniform Multi-Round (UMR), adopts a sequential transmission model where the master communicates with one worker at a time, thus the transmission capacity of the link attached to the master cannot be fully utilized due to the limits of worker-side capacity. In the present study, a Parallel Transferable Uniform Multi-Round algorithm (PTUMR) is proposed. It efficiently utilizes the data transmission capacity of network links by allowing chunks to be transmitted in parallel to workers. This algorithm divides workers into groups in a way that fully uses the link bandwidth of the master under some constraints and considers each group of workers as one virtual worker. In particular, introducing a Grouping Threshold effectively deals with very heterogeneous workers in both data transmission and computation capacities. Then, the master schedules sequential data transmissions to the virtual workers in an optimal way like in UMR. The performance evaluations show that the proposed algorithm achieves significantly shorter turnaround times (i.e., makespan) compared with UMR regardless of heterogeneity of workers, which are close to the theoretical lower limits.

In this paper, we analyze current-voltage characteristics of InSb/AlInSb triple-barrier resonant tunneling diodes (TBRTDs) with spin-splitting under zero magnetic fields. The InSb has very small effective mass, thus we can obtain large spin-splitting by Rashba spin-orbit interaction due to asymmetric InSb/AlInSb quantum wells. In our model, broadening of each resonant tunneling level and spin-splitting energy can be considered to calculate spin-polarized resonant tunneling current.

We propose an optical fiber connection navigation system that uses visible light communication for an integrated distribution module in a central office. The system realizes an accurate database, requires less skilled work to operate and eliminates human error. This system can achieve a working time reduction of up to 88.0% compared with the conventional work without human error for the connection/removal of optical fiber cords, and is economical as regards installation and operation.

This letter proposes an efficient Location-Aware Social Routing (LASR) scheme for Delay Tolerant Networks (DTNs). LASR makes forwarding decisions based on a new metric which uses location information to reflect the node relations and community structure. Simulation results are presented to support the effectiveness of our scheme.

In this paper, Source/Drain (S/D) engineering for high performance (HP) Vertical MOSFET (V-MOSFET) in 3Xnm generation and its beyond is investigated, by using gradual S/D profile while degradation of driving current (ION) due to the parasitic series resistance (Rpara) is minimized through two-dimensional device simulation taking into account for gate-induced-drain-leakage (GIDL). In general, it is significant to reduce spreading resistance in the case of conventional Planar MOSFET. Therefore, in this study, we focused and analyzed the abruptness of diffusion layer that is still importance parameter in V-MOSFET. First, for improving the basic device performance such as subthreshold swing (SS), ION, and Rpara, S/D engineering is investigated. The dependency of device performance on S/D abruptness (σS/D) for various Lightly Doped Drain Extension (LDD) abruptness (σLDD) is analyzed. In this study, Spacer Length (LSP) is defined as a function of σS/D. As σS/D becomes smaller and S/D becomes more abrupt, LSP becomes shorter. SS depends on the σS/D rather than the σLDD. ION has the peak value of 1750 µA/µm at σS/D = 2 nm/dec. and σLDD=3 nm/dec. when the silicon pillar diameter (D) is 30 nm and the gate length (Lg) is 60 nm. As σS/D becomes small, higher ION is obtained due to reduction of Rpara while SS is degraded. However, when σS/D becomes too small in the short channel devices (Lg = 60 nm and Lg = 45 nm), ION is degraded because the leakage current due to GIDL is increased and reaches IOFF limit of 100 nA/µm. In addition, as σLDD becomes larger, larger ION is obtained in the case of Lg = 100 nm and Lg = 60 nm because channel length becomes shorter. On the other hand, in the case of Lg = 45 nm, as σLDD becomes larger, ION is degraded because short channel effect (SCE) becomes significant. Next, the dependency of the basic device performance on D is investigated. By slimming D from 30 nm to 10 nm, while SS is improved and approaches the ideal value of 60 mV/Decade, ION is degraded due to increase of on-resistance (Ron). From these results, it is necessary to reduce Rpara while IOFF meets limit of 100 nA/µm for designing S/D of HP V-MOSFET. Especially for the V-MOSFET in the 1Xnm generation and its beyond, the influence of the Rpara and GIDL on ION becomes more significant, and therefore, the trade-off between σS/D and ION has a much greater impact on S/D engineering of V-MOSFET.

In this paper, we propose an interleaving updating framework of disparity and confidence map (IUFDCM) for stereo matching to eliminate the redundant and interfere information from unreliable pixels. Compared with other propagation algorithms using matching cost as messages, IUFDCM updates the disparity map and the confidence map in an interleaving manner instead. Based on the Confidence-based Support Window (CSW), disparity map is updated adaptively to alleviate the effect of input parameters. The reassignment for unreliable pixels with larger probability keeps ground truth depending on reliable messages. Consequently, the confidence map is updated according to the previous disparity map and the left-right consistency. The top ranks on Middlebury benchmark corresponding to different error thresholds demonstrate that our algorithm is competitive with the best stereo matching algorithms at present.

In this paper, we propose a new low power nonvolatile counter unit based on Magnetic Tunnel Junction (MTJ) with fine-grained power gating. The proposed counter unit consists of only a single latch with two MTJs. We verify the basic operation and estimate the power consumption of the proposed counter unit. The operating power consumption of the proposed nonvolatile counter unit is smaller than the conventional one below 140 kHz. The power of the proposed unit is 74.6% smaller than the conventional one at low frequency.

As process technology is scaled down, a typical system on a chip (SoC) becomes denser. In scaled process technology, process variation becomes greater and increasingly affects the SoC circuits. Moreover, the process variation strongly affects network-on-chips (NoCs) that have a synchronous network across the chip. Therefore, its network frequency is degraded. We propose a process-variation-adaptive NoC with a variation-adaptive variable-cycle router (VAVCR). The proposed VAVCR can configure its cycle latency adaptively on a processor core basis, corresponding to the process variation. It can increase the network frequency, which is limited by the process variation in a conventional router. Furthermore, we propose a variable-cycle pipeline adaptive routing (VCPAR) method with VAVCR; the proposed VCPAR can reduce packet latency and has tolerance to network congestion. The total execution time reduction of the proposed VAVCR with VCPAR is 15.7%, on average, for five task graphs.

In a large queuing system, the effect of the ratio of the filled data on the queue and waiting time from the head of a queue to the service gate are important factors for process efficiency because they are too large to ignore. However, many research works assumed that the factors can be considered to be negligible according to the queuing theory. Thus, the existing queuing models are not applicable to the design of large-scale systems. Such a system could be used as a product classification center for a home delivery service. In this paper, we propose a tree-queue model for large-scale systems that is more adaptive to efficient processes compared to existing models. We analyze and design a mean waiting time equation related to the ratio of the filled data in the queue. Based on simulations, the proposed model demonstrated improvement in process-efficiency, and it is more suitable to realistic system modeling than other compared models for large-scale systems.

The cause-and-effect relation between plasmon-resonance absorption and surface wave in a sinusoidal metal grating is investigated. By introducing an equivalent impedance model, similar to an equivalent circuit on an electric circuit, which is an impedance boundary value problem on the fictitious surface over the grating, we estimate the surface wave from the eigen field of the model by using the resonance property of the scattered field. Through numerical examples, we illustrate that the absorption in the grating occurs in the condition of exciting the surface wave along the model, and the real part of the surface impedance is negative on about half part of the fictitious surface in the condition.