We propose the collective electron tunneling model in the electron injection process between the Nano Dots (NDs) and the two-dimensional electron gas (2DEG). We report the collective motion of electrons between the 2DEG and the NDs based on the measurement of the Si-ND floating gate structure in the previous studies. However, the origin of this collective motion has not been revealed yet. We evaluate the proposed tunneling model by the model calculation. We reveal that our proposed model reproduces the collective motion of electrons. The insight obtained by our model shows new viewpoints for designing future nano-electronic devices.

The fabricated 1.55 µm high power superluminescent light emitting diodes (SLEDs) with 115 mW maximum output power and 3 dB bandwidth of 50 nm, using active multi-mode interferometer (MMI), showed high coupling efficiency of 66% into single-mode fiber, which resulted in maximum fiber-coupled power of 77 mW.

The number of Web applications handling online transaction is increasing, but verification of the correctness of Web application development has been done manually. This paper proposes a method for modeling, verifying and testing Web applications. In our method, a Web application is modeled using two finite-state automata, i.e., a page automaton which specifies Web page transitions, and an internal state automaton which specifies internal state transitions of the Web application. General properties for checking the Web application design are presented in LTL formulae and they are verified using the model checker Spin. Test cases examining the behavior of the Web application are also generated by utilizing the counterexamples obtained as the result of model checking. We applied our method to an example Web application to confirm its effectiveness.

Automatic recognition of finger gestures can be used for promotion of life quality. For example, a senior citizen can control the home appliance, call for help in emergency, or even communicate with others through simple finger gestures. Here, we focus on one-stroke finger gesture, which are intuitive to be remembered and performed. In this paper, we proposed and evaluated an accelerometer-based method for detecting the predefined one-stroke finger gestures from the data collected using a MEMS 3D accelerometer worn on the index finger. As alternative to the optoelectronic, sonic and ultrasonic approaches, the accelerometer-based method is featured as self-contained, cost-effective, and can be used in noisy or private space. A compact wireless sensing mote integrated with the accelerometer, called MagicRing, is developed to be worn on the finger for real data collection. A general definition on one-stroke gesture is given out, and 12 kinds of one-stroke finger gestures are selected from human daily activities. A set of features is extracted among the candidate feature set including both traditional features like standard deviation, energy, entropy, and frequency of acceleration and a new type of feature called relative feature. Both subject-independent and subject-dependent experiment methods were evaluated on three kinds of representative classifiers. In the subject-independent experiment among 20 subjects, the decision tree classifier shows the best performance recognizing the finger gestures with an average accuracy rate for 86.92 %. In the subject-dependent experiment, the nearest neighbor classifier got the highest accuracy rate for 97.55 %.

Energy conservation is an important issue in mobile ad hoc networks (MANET), where the terminals are always supplied with limited energy. A new routing protocol is presented according to the study on the influence of low-energy nodes in ad hoc networks. The novel routing protocol (energy sensing routing protocol, ESRP) is based on the energy sensing strategy. Multiple strategy routing and substitute routing are both adopted in this paper. Referring to the level of the residual energy and the situation of energy consumption, different routes are chosen for packets transmission. The local maintenance is adopted, which can reduce packets retransmission effectively when the link breaks. We focus on the network lifetime most in all performances. The evaluation is done in comparison with other routing protocols on NS2 platform, and the simulation results show that this routing protocol can prolong the network lifetime and balance energy consumption effectively.

For analog applications, the Metal-Insulator-Metal (MIM) capacitance has to be measured at a much higher resolution than using the conventional methods, i.e. to a sub-femto level. A new robust mismatch measurement technique is proposed, which is more accurate and robust compared to the conventional Floating Gate Capacitance Measurement (FGCM) methods. A capacitance mismatching measurement methodology based on Vs is more stable than that based on Vf because the influence of pre-existing charge in the floating-gate can be cancelled in the slope of ΔVs/ΔVf based on Vs. The accuracy of this method is evaluated through silicon measurement in a 0.13 µm technology. It shows that, compared to the ideal value, the average of the new method are within 0.12% compared to 49.23% in conventional method while the standard deviation is within 0.15%.

In the face of constant malicious attacks to network-connected software systems, software vulnerabilities need to be discovered early in the development phase. In this paper, we present AspFuzz, a state-aware protocol fuzzer based on the specifications of application-layer protocols. AspFuzz automatically generates anomalous messages that exploit possible vulnerabilities. The key observation behind AspFuzz is that most attack messages violate the strict specifications of application-layer protocols. For example, they do not conform to the rigid format or syntax required of each message. In addition, some attack messages ignore the protocol states and have incorrect orders of messages. AspFuzz automatically generates a large number of anomalous messages that deliberately violate the specifications of application-layer protocols. To demonstrate the effectiveness of AspFuzz, we conducted experiments with POP3 and HTTP servers. With AspFuzz, we can discover 20 reported and 1 previously unknown vulnerabilities for POP3 servers and 25 reported vulnerabilities for HTTP servers. Two vulnerabilities among these can be discovered by the state-awareness of AspFuzz. It can also find a SIP state-related vulnerability.

Several kinds of capacitor-less DRAM cells based on planar SOI-MOSFET technology have been proposed and researched to overcome the integration limit of the conventional DRAM. In this paper, we propose the Floating Body type DRAM cell array architecture with the Vertical MOSFET and discuss its basic operation using a 3-D device simulator. In contrast to previous planar SOI-MOSFET technology, the Floating Body type DRAM with the Vertical MOSFET achieves a cell area of 4F2 and obtain its floating body cell by isolating the body from the substrate vertically by the bottom-electrode. Therefore, the necessity for a SOI substrate is eliminated. In this paper, the cell array architecture of Floating Body type 1T-DRAM is proposed, and furthermore, the basic memory operations of read, write, and erase for Vertical type 1 transistor (1T) DRAM in the 45 nm technology node are shown. In addition, the retention and disturb characteristics of the Vertical type 1T-DRAM are discussed.

We consider wireless interactive data broadcasting environments consisting of the broadcast channel for data dissemination and the communication channels for client requests. Modeling client impatience as the soft deadline of client requests, we propose a broadcast scheduling based on a combination of periodic scheduling and priority-based scheduling. The server partitions data items into hot and cold-item sets according to the optimized cut-off point. We apply periodic and priority-based scheduling to hot and cold item sets, respectively, in order to maximize the average utility of the items. We investigate the optimized cut-off point by analyzing the average utility of items as a function of the cut-off point. Simulation results show that our proposed algorithm outperforms existing methods in various circumstances in terms of average utility as well as average response time.

This paper presents an on-chip resonant supply noise canceller utilizing parasitic capacitance of sleep blocks. The test chip was fabricated in a 0.18 µm CMOS process and measurement results show 43.3% and 12.5% supply noise reduction on the abrupt supply voltage switching and the abrupt wake-up of a sleep block, respectively. The proposed method requires 1.5% area overhead for four 100 k-gate blocks, which is 7.1 X noise reduction efficient comparing with the conventional decap for the same power supply noise, while achieves 47% improvement of settling time. These results make fast switching of power mode possible for dynamic voltage scaling and power gating.

We developed a real-world oriented mobile constellation learning environment. Learners point at a target constellation by gazing through a cylinder with a gyro-sensor under the real starry sky. The system can display information related to the constellation. The system has original exercise functions which are not supported by existing systems or products by other research group or companies. Through experimentation, we evaluated the learning environment to assess its learning effects.

Various low power technologies have been developed and applied to LSIs from the point of device and circuit design. A lot more CPU cores as well as function IPs are integrated on a single chip LSI today. Therefore, not only the device and circuit low power technologies, but software power control technologies are becoming more important to reduce active power of application systems. This paper overviews the low power technologies and defines power management platform as a combination of hardware functions and software programming interface. This paper discusses importance of the power management platform and direction of its development.

The adjustable range on post-fabrication resonance wavelength trimming of long-period fiber gratings was broadened toward the blue side, and the mechanisms of the resonance wavelength shifts caused by heating were investigated. It can be concluded that the glass structure relaxes more slowly than the residual stress with decreasing heating temperature and the blue shift caused by the residual stress relaxation appears more strongly at the early stage of heating. The blue shift of 41 nm was obtained by heating a long-period grating at 600 for 3500 minutes. The changes of the index difference inducing the wavelength shifts of -41 nm and 35 nm were estimated at about -1.210-4 and +1.0 10-4 by numerical analysis, respectively.

Power-aware X-filling is a preferable approach to avoiding IR-drop-induced yield loss in at-speed scan testing. However, the ability of previous X-filling methods to reduce launch switching activity may be unsatisfactory, due to low effect (insufficient and global-only reduction) and/or low scalability (long CPU time). This paper addresses this reduction quality problem with a novel GA (Genetic Algorithm) based X-filling method, called GA-fill. Its goals are (1) to achieve both effectiveness and scalability in a more balanced manner and (2) to make the reduction effect of launch switching activity more concentrated on critical areas that have higher impact on IR-drop-induced yield loss. Evaluation experiments are being conducted on both benchmark and industrial circuits, and the results have demonstrated the usefulness of GA-fill.

An advantage of an RLD (reconfigurable logic device) such as an FPGA (field programmable gate array) is that it can be customized after being manufactured. Due to the aggressive technology scaling, device density is increasing, and it has become a serious problem in power consumption accordingly. In SoC of embedded systems, power gating is one of the major power reduction techniques. However, it is difficult to adopt SRAM-based RLDs because of the high overhead and SRAM being volatile. In this paper, we describe a TEG (test element group) chip of a reconfigurable logic based FeRAM (ferroelectric random access memory) technology. FeRAM brings reconfigurable logic devices the advantage of being a genuine power gater. The chip employs island-style routing architecture and uses a variable grain logic cell as a logic block. A NV-FF (non-volatile flip-flop), which contains FeRAM, a FF, and power-gating control circuits, is used as both configuration memories and FFs in a logic block. The NV-FF can transmit data between FeRAM and FF automatically when a power source is turned off/on. Thus chip-level power gating is possible. The hibernate/restore time is less than 1 ms. The chip has 1818 logic blocks and an area of 54.76 mm2.

'Super Hi-Vision' (SHV) is promising as a future form of television. It is an ultra-high definition TV system that has 16 times the number of pixels of HDTV and employs a 22.2 multichannel sound system. It offers superior presence and gives the impression of reality. The information bitrates of the current prototypes range from 24 to 72 Gbit/s, and a fiber optic transmission system is needed to transfer even just one channel. This paper describes the optical transmission technologies that have been developed for SHV inter-equipment connects and links between outdoor sites and broadcasting stations.

This paper discusses a simple and speedy routing method in large-capacity optical Wavelength Division Multiplexing (WDM) networks. The large-capacity WDM network is necessary to accommodate increasing traffic load in future. In this large-capacity WDM network, each link has many fibers and a huge amount of optical data can be transmitted through these fibers simultaneously. Optical path is configured for transmitting optical data by wavelength reservation including routing and wavelength assignment (RWA). Since traditional RWA methods have to treat much information about available wavelengths in each fiber, it is difficult to resolve RWA problem on time. In other words, the electrical processing becomes the bottleneck in the large-capacity WDM network. Therefore, a simple and speedy RWA method is necessary for the large-capacity WDM network. In this paper, we propose the simple and effective RWA method which considers reduced information as Network Map. The objective is to improve the network performance by using multiple fibers effectively. The complex processing is not suitable for data transmission because the switching operation must be done in very short time for one request. In addition to this, it is not practical to collect detailed network information frequently. The proposed wavelength assignment method assigns wavelength more uniformly than traditional method, and therefore, the proposed routing method can select routes without considering detailed information about each wavelength state. The proposed routing method needs only local information and reduced network information. This paper shows that the proposed routing method can get suitable solution for large-capacity optical WDM networks through computer simulations. The proposed RWA method drastically improves the loss probability against other simple RWA methods. This paper also describes two types of optical switches with tunable or fixed wavelength conversions. The wavelength converters with relatively low technology becomes effective with the proposed RWA method in the large-capacity WDM network. This paper reveals that complex routing methods are not necessary for large-capacity optical WDM networks.

The Network-on-Chip (NoC) is limited by the reliability constraint, which impels us to exploit the fault-tolerant routing. Generally, there are two main design objectives: tolerating more faults and achieving high network performance. To this end, we propose a new multiple-round dimension-order routing (NMR-DOR). Unlike existing solutions, besides the intermediate nodes inter virtual channels (VCs), some turn-legally intermediate nodes inside each VC are also utilized. Hence, more faults are tolerated by those new introduced intermediate nodes without adding extra VCs. Furthermore, unlike the previous solutions where some VCs are prioritized, the NMR-DOR provides a more flexible manner to evenly distribute packets among different VCs. With extensive simulations, we prove that the NMR-DOR maximally saves more than 90% unreachable node pairs blocked by faults in previous solutions, and significantly reduces the packet latency compared with existing solutions.

This paper presents a single-chip RF tuner/OFDM demodulator for a mobile digital TV application called “1-segment broadcasting.” To achieve required performances for the single-chip receiver, a tunable technique for a low-noise amplifier (LNA) and spurious suppression techniques are proposed in this paper. Firstly, to receive all channels from 470 MHz to 770 MHz and to relax distortion characteristics of following circuit blocks such as an RF variable-gain amplifier and a mixer, a tunable technique for the LNA is proposed. Then, to improve the sensitivity, spurious signal suppression techniques are also proposed. The single-chip receiver using the proposed techniques is fabricated in 90 nm CMOS technology and total die size is 3.26 mm 3.26 mm. Using the tunable LNA and suppressing undesired spurious signals, the sensitivities of less than -98.6 dBm are achieved for all the channels.

Robust local image features have become crucial components of many state-of-the-art computer vision algorithms. Due to limited hardware resources, computing local features on embedded system is not an easy task. In this paper, we propose an efficient parallel computing framework for speeded-up robust features with an orientation towards multi-DSP based embedded system. We optimize modules in SURF to better utilize the capability of DSP chips. We also design a compact data layout to adapt to the limited memory resource and to increase data access bandwidth. A data-driven barrier and workload balance schemes are presented to synchronize parallel working chips and reduce overall cost. The experiment shows our implementation achieves competitive time efficiency compared with related works.