A Modified Hierarchical 3D-Torus (MH3DT) network is a 3D-torus network consisting of multiple basic modules, in which each basic module itself is a 3D-torus network. Inter-node communication performance has been evaluated using dimension-order routing and 2 virtual channels (VCs) under uniform traffic patterns but not under non-uniform traffic patterns. In this paper, we evaluate the inter-node communication performance of MH3DT under five non-uniform traffic patterns and compare it with other networks. We found that under non-uniform traffic patterns, the MH3DT yields high throughput and low latency, providing better inter-node communication performance compared to H3DT, TESH, mesh, and torus networks. Also, we found that non-uniform traffic patterns have higher throughput than uniform traffic in the MH3DT network.

This paper presents a Multiple-Input Multiple-Output (MIMO) propagation model for independent and identically distributed (i.i.d.) channels in the mixture of none-Line-of-Sight (NLOS) and Line-of-Sight (LOS) environments. The derived model enables to evaluate the system statistical characteristics of Signal-to-Noise-Ratio (SNR) for MIMO transmission based on Maximal Ratio Combing (MRC). An application example applying the model in 22 configuration to ITS Inter-Vehicle Communication (IVC) system is introduced. We clarify the effectiveness of the proposed model by comparisons of both computer simulations and measurement results of a field experiment. We also use the model to show the better performance of SNR when applying MIMO to IVC system than SISO and SIMO.

Utilizing available channels to improve the network performance is one of the most important targets for the cognitive MAC protocol design. Using antenna technologies is an efficient way to reach this target. Therefore, in this paper, we propose a novel cognitive MAC protocol, called Polarization-based Long-range Communication Directional MAC Protocol (PLRC-DMAC), for Cognitive Ad Hoc Networks (CAHNs). The proposed protocol uses directional antennas to acquire better spatial reuse and establish long-range communication links, which can support more nodes to access the same channel simultaneously. Moreover, the PLRC-DMAC also uses polarization diversity to allow nodes in the CAHN to share the same channel with Primary Users (PUs). Furthermore, we also propose a Long-range Orientation (LRO) algorithm to orient the long-range nodes. Simulation results show that the LRO algorithm can accurately orient the long-range nodes, and the PLRC-DMAC can significantly increase the network throughput as well as reduce the end-to-end delay.

Hop-timing detection is of extreme importance for the reception of frequency hopping (FH) signals. Any error in the hop-timing detection has a deleterious effect on the performance of the receiver in frequency hopping (FH) communication systems. However, it is not easy to detect the hop-timing under low signal to noise power ratio (SNR) environments. Adaptive array antennas (AAA) have been expected to improve the performance of FH communication systems by beamforming for the direction of arrival of the desired signal. Since the conventional AAA exploits at least the coarse synchronization for dehopping of FH signals before achieving the beamforming, any fault in the hop-timing detection causes the deterioration of the performance of AAA. Using AAA based on the constant modulus algorithm (CMA), this paper proposes a new method for blind beamforming and hop-timing detection for FH signals. The proposed method exploits both the spatial and temporal characteristics of the received signal to accomplish the beamforming and detect the hop-timing without knowing any a priori information such as fine/coarse time synchronization and training signal. The performance verifications of the proposed method based on pertinent simulations are presented.

Simple half-duplex repetition-based relaying protocols can achieve spatial diversity at the expense of additional relaying signals in the time domain. In this paper, a linear unitary precoder based on a singular vector for cooperative systems with the amplify-and-forward (AF) relaying protocol is proposed in order to improve spectral efficiency. An exact expression of the precoder design is first derived for the case of equal power allocation. Then, water-filling power allocation is used in conjunction with the precoder to further increase the system capacity, where the precoder matrix is generated with an iterative process. From the implementation point of view, the channel state information (CSI) has to be estimated and quantized in systems, the detail of which is described in the sequel. The adaptive modulation and coding (AMC) technique with the proposed precoder is also discussed to achieve high throughput performance. Finally, numerical and simulation results are presented to demonstrate the effectiveness of the proposed technique in improving capacity and throughput.

Due to the aggressive scaling of non-volatile memories, “charge-trap memories” such as MONOS-type memories become one of the most important targets. One of the merits of such MONOS-type memories is that they can trap charges inside atomic-scale defect sites in SiN layers. At the same time, however, charge traps with atomistic scale tend to induce additional large structural changes. Hydrogen has attracted a great attention as an important heteroatom in MONOS-type memories. We theoretically investigate the basic characteristics of hydrogen-defects in SiN layer in MONOS-type memories on the basis of the first-principles calculations. We find that SiN structures with a hydrogen impurity tend to reveal reversible structural change during program/erase operation.

Several kinds of capacitor-less DRAM cells based on planar SOI-MOSFET technology have been proposed and researched to overcome the integration limit of the conventional DRAM. In this paper, we propose the Floating Body type DRAM cell array architecture with the Vertical MOSFET and discuss its basic operation using a 3-D device simulator. In contrast to previous planar SOI-MOSFET technology, the Floating Body type DRAM with the Vertical MOSFET achieves a cell area of 4F2 and obtain its floating body cell by isolating the body from the substrate vertically by the bottom-electrode. Therefore, the necessity for a SOI substrate is eliminated. In this paper, the cell array architecture of Floating Body type 1T-DRAM is proposed, and furthermore, the basic memory operations of read, write, and erase for Vertical type 1 transistor (1T) DRAM in the 45 nm technology node are shown. In addition, the retention and disturb characteristics of the Vertical type 1T-DRAM are discussed.

Autonomous objects represent active database objects which can be distributed over the Internet. This paper proposes a robust authentication scheme for the remote autonomous object based on AES (Advanced Encryption Standard) symmetric cryptosystem. Compared with related schemes, the proposed scheme not only resists various security attacks but also provides computation and communication efficiency.

Different from distributed baluns, active baluns have group delay variations in the lower bands related to inherent internal capacitances and resistance in transistors. A negative group delay (NGD) circuit is employed as a compensator of group delay variation for an ultra-wideband (UWB) active balun. First, three-cell NGD circuit is inserted into a simple active balun circuit for realizing both group delay compensation and return loss improvement. The simulated results show a group delay variation of 4.8 ps and an input return loss of above 11.5 dB in the UWB band (3.1-10.6 GHz). Then, a pair of one-cell NGD circuits is added to reduce the remaining group delay variation (3.4 ps in simulation). The circuit with the NGD circuits was fabricated on an InGaP/GaAs HBT MMIC substrate. The measured results achieved a group delay variation of 7.7 ps, a gain variation of 0.5 dB, an input return loss of greater than 10 dB, and an output return loss of larger than 8.1 dB in the UWB band.

We analyze linear channel estimation for MIMO-OFDM systems and propose a spherical linear interpolator in closed-form for the beamforming codewords. We also suggest a hybrid interpolator using a simplified version of the derived interpolator. Simulation results show that the proposed schemes are efficient and competitive with respect to the feedback overhead and have low complexity.

We report a fast single element nonvolatile memory that employs amorphous to crystalline phase change. Temperature change is induced within a single electronic element in confined geometry transistors to cause the phase change. This novel phase change memory (PCM) operates without the need for charge transport through insulator films for charge storage in a floating gate. GeSbTe (GST) was employed to the phase change material undergoing transition below 200. The phase change, causing conductivity and permittivity change of the film, results in the threshold voltage shift observed in transistors and capacitors.

We present a design optimization method of H-plane waveguide components, based on the level set method with the finite element method. In this paper, we propose a new formulation for the improvement of a level set function, which describes shape, location, and connectivity of dielectric in a design region. Employing the optimization procedure, we demonstrate that optimized structures of an H-plane waveguide filter and T-junction are obtained from an initial structure composed of several circular blocks of dielectric.

Motion blur in TFT-LCD is caused by sample and hold characteristic, slow response time of liquid crystal, and the inconsistency between object tracking of the human eye and the actual object location. In order to solve this problem, a high frame rate driving method based on motion estimation and motion compensation has been applied to LCD products. However, as the required processing time of motion estimation increases in LCD TV and monitor systems, real-time video image processing becomes more difficult. Frame interpolation through the large macro block (MB) size has limitations to detect small objects. So, this paper proposes the efficient motion estimator architecture which uses seven kinds of macro blocks to enhance the accuracy of motion estimation and combines the parallel processing with pre-computation technology and hardware optimization for high-speed processing. Also, for increased efficiency in the hardware architecture, we employed an I2C (Inter Integrated Circuit) communication unit to control the key parameters easily through the personnel computer. Simulation results show that the critical path at the motion estimator is reduced by about 27.47% compared to the conventional structure. As a result, the proposed motion estimator will be applicable for the high-speed frame interpolation of variable video.

A novel NMOS Electrostatic Discharge (ESD) clamp circuit is proposed for a 0.35 µm Bipolar-CMOS-DMOS (BCD) process. The proposed ESD clamp has a non-snapback characteristic because of gate-coupled effect. This proposed ESD clamp circuit is developed without additional components made possible by replacing a capacitor with an isolated parasitic capacitor. The result of the proposed ESD clamp circuit is measured by 100 ns Transmission Line Pulse (TLP) system. From the measurement, it was observed that the proposed ESD clamp has approximately 40% lower triggering voltage compared to the conventional gate-grounded NMOS ESD clamp. This is achieved without degradation of the other ESD design key parameter. The proposed ESD clamp also has high robustness characteristics compared to the conventional RC-triggered NMOS ESD clamp circuit.

We have succeeded in fabricating 180 nm Current Controlled MOS Current Mode Logic (CC-MCML) and verified the stable circuit operation of 180 nm CC-MCML under threshold voltage fluctuations by measurement. The performance stability of the CC-MCML inverter under the fluctuations of threshold voltage of NMOS and PMOS is evaluated from the viewpoint of diminishing the bias offset voltage ΔVB. The ΔVB, that is defined as (base voltage of output waveform) - (base voltage of input waveform), is a key design parameter for differential circuit. It is shown that when the threshold voltage of NMOS fluctuates in the range of 0.53 V to 0.69 V, and threshold voltage of PMOS fluctuates in the range of -0.47 V to -0.67 V, the CC-MCML technique is able to suppress ΔVB within only 30 mV, where as the conventional MCML technique caused maximum ΔVB of 1.0 V. In this paper, it is verified for the first time that the fabricated CC-MCML is more tolerant against the fluctuations of threshold voltages than the conventional MCML.

We have studied the transport property of the Vertical MOSFET (V-MOSFET) with an impurity from the viewpoint of quantum electron dynamics. In order to obtain the position dependence of impurity for the electron transmission property through the channel of the V-MOSFET, we solve the time-dependent Shrodinger equation in real space mesh technique We reveal that the impurity in the source edge can assist the electron transmission from the source to drain working as a wave splitter. In addition, we also reveal the effect of an impurity in the surface of pillar is limited because of its dimensionality. Furthermore, we obtained that the electron injection from the source to the channel becomes difficult due to the energy difference between the subbands of the source and the channel. These results enable us to obtain the guiding principle to design the V-MOSFET in the 10 nm pillar. The results enable us to obtain the guiding principle to design the V-MOSFET beyond 20 nm design rule.

We propose the collective electron tunneling model in the electron injection process between the Nano Dots (NDs) and the two-dimensional electron gas (2DEG). We report the collective motion of electrons between the 2DEG and the NDs based on the measurement of the Si-ND floating gate structure in the previous studies. However, the origin of this collective motion has not been revealed yet. We evaluate the proposed tunneling model by the model calculation. We reveal that our proposed model reproduces the collective motion of electrons. The insight obtained by our model shows new viewpoints for designing future nano-electronic devices.

Recently, the 3-dimensional (3-D) vertical Floating Gate (FG) type NAND flash memory cell arrays with the Extended Sidewall Control Gate (ESCG) was proposed [7]. Using this novel structure, we successfully implemented superior program speed, read current, and less interference characteristics, by the high Control Gate (CG) coupling ratio with less interference capacitance and highly electrical inverted S/D technique. However, the process stability of the ESCG structure has not been sufficiently confirmed such as the variations of the physical dimensions. In this paper, we intensively investigated the electrical dependency according to the physical dimensions of ESCG, such as the line and spacing of ESCG and the thickness of barrier oxide. Using the 2-dimentional (2-D) TCAD simulations, we compared the basic characteristics of the FG type flash cell operation, in the aspect of program speed, read current, and interference effect. Finally, we check the process window and suggest the optimum target of the ESCG structure for reliable flash cell operation. From above all, we confirmed that this 3-dimensional vertical FG NAND flash memory cell arrays using the ESCG structure is the most attractive candidate for terabit 3-D vertical NAND flash cell array.

Based on the reiterative maximum signal minus interference level (MSMIL) criterion and adaptive beamforming, a novel interference suppression algorithm is proposed for shared-spectrum multistatic radar that must contend with clutter. In this algorithm, two-dimensional adaptive beamformers are designed for azimuths and range cells. Numerical results show advantages of the proposed method.

This paper discusses the possibility of deploying a short-range cognitive radio (secondary communication system) within the service area of a primary system. Although the secondary system interferes with the primary system, there are certain locations in the service area of the primary system where the cognitive radio can reuse the frequency of the primary system without causing harmful interference to it and being disturbed by the primary system. These locations are referred to as having a spatial opportunity for communications in the secondary system, since it can reuse the frequency of the primary system. Simulation results indicate that the antenna gain, beamwidth, and propagation path loss greatly affect the spatial opportunity of frequency reuse for the secondary users. The results show that spatial spectrum reuse can be significantly increased when the primary system users are equipped with directional antennas. An important component in this study is the heterogeneous path loss model, i.e., the path loss model within the primary system is different from the model used to calculate the interference between the primary and the secondary systems. Our results show that the propagation models corresponding to the actual antenna heights in the primary/secondary system can largely impact the possibilities for spectrum reuse by the cognitive radios.