The shared last level cache (SLLC) in tile chip multiprocessors (TCMP) provides a low off-chip miss rate, but it causes a long on-chip access latency. In the two-level cache hierarchy, data replication stores replicas of L1 victims in the local LLC (L2 cache) to obtain a short local LLC access latency on the next accesses. Many data replication mechanisms have been proposed, but they do not consider both L1 victim reuse behaviors and LLC replica reception capability. They either produce many useless replicas or increase LLC pressure, which limits the improvement of system performance. In this paper, we propose a two-level cache aware adaptive data replication mechanism (TCDR), which controls replication based on both L1 victim reuse behaviors prediction and LLC replica reception capability monitoring. TCDR not only increases the accuracy of L1 replica selection, but also avoids the pressure of replication on LLC. The results show that TCDR improves the system performance with reasonable hardware overhead.

This paper proposes novel test techniques for high accuracy measurement of ADCs and a ramp generator on a CMOS image sensor (CIS) chip. The test circuit for the ADCs has a dual path and has an ability of multi-functional fine pattern generator that can define any input for each column to evaluate CIS specific characteristics electrically. The test circuit for the ramp generator can realize an on-chip current cell test and reject the current cell failure within 1LSB accuracy. We fabricated the test sensor using 55nm CIS process and measured the IP characteristics. Measured results show INL of 14.6LSB, crosstalk of 14.9LSB and column interference noise of 5.4LSB. These measured results agree with the designed values. By using this technique, we confirmed the accurate ADC measurement can be realized without being affected by the ambiguity of the optical input.

As known to us all, L-shaped co-prime array (LCA) is a recently introduced two-dimensional (2-D) sparse array structure, which is extended from linear co-prime array (CA). Such sparse array geometry can be used for 2-D parameters estimation with higher degrees-of-freedom (DOF). However, in the scenario where several narrowband transmissions spread over a wide spectrum, existing technique based on LCA with Nyquist sampling may encounter a bottleneck for both analog and digital processing. To alleviate the burden of high-rate Nyquist sampling, a method of joint wideband spectrum and direction-of-arrival (DOA) estimation with compressed sampling based on LCA, which is recognized as LCA-based modulated wideband converter (MWC), is presented in this work. First, the received signal along each antenna is mixed to basebands, low-pass filtered and down-sampled to get the compressed sampling data. Then by constructing the virtual received data of 2-D difference coarray, we estimate the wideband spectrum and DOA jointly using two recovery methods where the first is a joint ESPRIT method and the other is a joint CS method. Numerical simulations illustrate the validity of the proposed LCA based MWC system and show the superiority.

Intelligent transportation systems (ITSs) have been extensively studied in recent years to improve the safety and efficiency of transportation. The use of a radar system to enable the ITSs monitor the environment is robust to weather conditions and is less invasive to user privacy. Moreover, equipping the roadside units (RSUs) with radar modules has been deemed an economical and efficient option for ITS operators. However, because the detection and tracking parameters can significantly influence the radar system performance and the best parameters for different scenarios are different, the selection of appropriate parameters for the radar systems is critical. In this study, we investigated radar parameter selection and consequently proposes a parameter selection approach capable of automatically choosing the appropriate detection and tracking parameters for radar systems. The experimental results indicate that the proposed method realizes appropriate selection of parameters, thereby significantly improving the detection and tracking performance of radar systems.

Manufacturers are coping with increasing pressures in quality, cost and efficiency as more and more industries are moving from traditional setup to industry 4.0 based digitally transformed setup due to its numerous playbacks. Within the manufacturing domain organizational structures and processes are complex, therefore adopting industry 4.0 and finding an optimized re-engineered business process is difficult without using a systematic methodology. Authors have developed Business Process Re-engineering (BPR) and Business Process Optimization (BPO) methods but no consolidated methodology have been seen in the literature that is based on industry 4.0 and incorporates both the BPR and BPO. We have presented a consolidated and systematic re-engineering and optimization framework for a manufacturing industry setup. The proposed framework performs Evolutionary Multi-Objective Combinatorial Optimization using Multi-Objective Genetic Algorithm (MOGA). An example process from an aircraft manufacturing factory has been optimized and re-engineered with available set of technologies from industry 4.0 based on the criteria of lower cost, reduced processing time and reduced error rate. At the end to validate the proposed framework Business Process Model and Notation (BPMN) is used for simulations and perform comparison between AS-IS and TO-BE processes as it is widely used standard for business process specification. The proposed framework will be used in converting an industry from traditional setup to industry 4.0 resulting in cost reduction, increased performance and quality.

This letter presents an innovative solution for real-time interaction during online classes. Synchronous sharing enables instructors to provide real-time feedback to students. This encourages students to stay focused and feel engaged during class. Consequently, students evaluated anonymously that this solution significantly enhanced their learning experience during real-time online classes.

A robust saliency detection approach for images with a complex background is proposed. The absorbing Markov chain integrating low-level, mid-level and high-level cues dynamically evolves by using the similarity between pixels to detect saliency objects. The experimental results show that the proposed algorithm has advantages in saliency detection, especially for images with a chaotic background or low contrast.

Combinatorial testing is an effective testing technique for detecting faults in a software or hardware system with multiple factors using combinatorial methods. By performing a test, which is an assignment of possible values to all the factors, and verifying whether the system functions as expected (pass) or not (fail), the presence of faults can be detected. The failures of the tests are possibly caused by combinations of multiple factors assigned with specific values, called faulty interactions. Martínez et al. [1] proposed the first deterministic adaptive algorithm for discovering faulty interactions involving at most two factors where each factor has two values, for which graph representations are adopted. In this paper, we improve Martínez et al.'s algorithm by an adaptive algorithmic approach for discovering faulty interactions in the so-called “non-2-locatable” graphs. We show that, for any system where each “non-2-locatable factor-component” involves two faulty interactions (for example, a system having at most two faulty interactions), our improved algorithm efficiently discovers all the faulty interactions with an extremely low mistaken probability caused by the random selection process in Martínez et al.'s algorithm. The effectiveness of our improved algorithm are revealed by both theoretical discussions and experimental evaluations.

Side-channel analysis is one of the most investigated hardware Trojan detection approaches. However, nearly all the side-channel analysis approaches require golden chips for reference, which are hard to obtain actually. Besides, majority of existing Trojan detection algorithms focus on the data similarity and ignore the Trojan misclassification during the detection. In this paper, we propose a cost-sensitive golden chip-free hardware Trojan detection framework, which aims to minimize the probability of Trojan misclassification during the detection. The post-layout simulation data of voltage variations at different process corners is utilized as a golden reference. Further, a classification algorithm based on the combination of principal component analysis and Naïve bayes is exploited to identify the existence of hardware Trojan with a minimum misclassification risk. Experimental results on ASIC demonstrate that the proposed approach improves the detection accuracy ratio compared with the three detection algorithms and distinguishes the Trojan with only 0.27% area occupies even under ±15% process variations.

Numerous variable tap-length algorithms can be found in some literature and few strategies are derived from a basic theoretical formula. Thus, some algorithms lack of theoretical depth and their performance are unstable. In view of this point, the novel variable tap-length algorithm which is based on the mixed error cost function is presented in this letter. By analyzing the mixed expectation of the prior and the posterior error, the novel variable tap-length strategy is derived. The proposed algorithm has a more valid proximity to the optimal tap-length and a good convergence ability by the performance analysis. It can solve many deficiencies comprising large fluctuations of the tap-length, the high complexity and the weak steady-state ability. Simulation results demonstrate that the proposed algorithm equips good performance.

In the state estimation of steady-state power networks, a cyber attack that cannot be detected from the residual (i.e., the estimation error) is called a false data injection (FDI) attack. In this letter, to enforce the security of power networks, we propose a method of detecting an FDI attack. In the proposed method, an FDI attack is detected by randomly choosing sensors used in the state estimation. The effectiveness of the proposed method is presented by two examples including the IEEE 14-bus system.

Basic characteristics for relating design and base station layout design in land mobile communications are provided through a propagation model for path loss prediction. Owing to the rapid annual increase in traffic data, the number of base stations has increased accordingly. Therefore, propagation models for various scenarios and frequency bands are necessitated. To solve problems optimization and creation methods using the propagation model, a path loss prediction method that merges multiple models in machine learning is proposed herein. The method is discussed based on measurement values from Kitakyushu-shi. In machine learning, the selection of input parameters and suppression of overlearning are important for achieving highly accurate predictions. Therefore, the acquisition of conventional models based on the propagation environment and the use of input parameters of high importance are proposed. The prediction accuracy for Kitakyushu-shi using the proposed method indicates a root mean square error (RMSE) of 3.68dB. In addition, predictions are performed in Narashino-shi to confirm the effectiveness of the method in other urban scenarios. Results confirm the effectiveness of the proposed method for the urban scenario in Narashino-shi, and an RMSE of 4.39dB is obtained for the accuracy.

This paper proposes two accurate source-number estimation methods for array antennas and multi-input multi-output radar. Direction of arrival (DOA) estimation is important in high-speed wireless communication and radar imaging. Most representative DOA estimation methods require the source-number information in advance and often fail to estimate DOAs in severe environments such as those having low signal-to-noise ratio or large transmission-power difference. Received signals are often bandlimited or narrowband signals, so the proposed methods first involves denoising preprocessing by removing undesired components then comparing the original and denoised signal information. The performances of the proposed methods were evaluated through computer simulations.

The adiabatic quantum flux parametron (AQFP) is an energy-efficient, high-speed superconducting logic device. To observe the tiny output currents from the AQFP in experiments, high-speed voltage drivers are indispensable. In the present study, we develop a compact voltage driver for AQFP logic based on a Josephson latching driver (JLD), which has been used as a high-speed driver for rapid single-flux-quantum (RSFQ) logic. In the JLD-based voltage driver, the signal currents of AQFP gates are converted into gap-voltage-level signals via an AQFP/RSFQ interface and a four-junction logic gate. Furthermore, this voltage driver includes only 15 Josephson junctions, which is much fewer than in the case for the previously designed driver based on dc superconducting quantum interference devices (60 junctions). In measurement, we successfully operate the JLD-based voltage driver up to 4 GHz. We also evaluate the bit error rate (BER) of the driver and find that the BER is 7.92×10-10 and 2.67×10-3 at 1GHz and 4GHz, respectively.

Salient ship detection plays an important role in ensuring the safety of maritime transportation and navigation. However, due to the influence of waves, special weather, and illumination on the sea, existing saliency methods are still unable to achieve effective ship detection in a complex marine environment. To solve the problem, this paper proposed a novel saliency method based on an attention nested U-Structure (AU2Net). First, to make up for the shortcomings of the U-shaped structure, the pyramid pooling module (PPM) and global guidance paths (GGPs) are designed to guide the restoration of feature information. Then, the attention modules are added to the nested U-shaped structure to further refine the target characteristics. Ultimately, multi-level features and global context features are integrated through the feature aggregation module (FAM) to improve the ability to locate targets. Experiment results demonstrate that the proposed method could have at most 36.75% improvement in F-measure (Favg) compared to the other state-of-the-art methods.

The adiabatic quantum-flux-parametron (AQFP) is an energy-efficient superconductor logic device. In a previous study, we proposed a low-latency clocking scheme called delay-line clocking, and several low-latency AQFP logic gates have been demonstrated. In delay-line clocking, the latency between adjacent excitation phases is determined by the propagation delay of excitation currents, and thus the rising time of excitation currents should be sufficiently small; otherwise, an AQFP gate can switch before the previous gate is fully excited. This means that delay-line clocking needs high clock frequencies, because typical excitation currents are sinusoidal and the rising time depends on the frequency. However, AQFP circuits need to be tested in a wide frequency range experimentally. Hence, in the present study, we investigate AQFP circuits adopting delay-line clocking with square excitation currents to apply delay-line clocking in a low frequency range. Square excitation currents have shorter rising time than sinusoidal excitation currents and thus enable low frequency operation. We demonstrate an AQFP buffer chain with delay-line clocking using square excitation currents, in which the latency is approximately 20ps per gate, and confirm that the operating margin for the buffer chain is kept sufficiently wide at clock frequencies below 1GHz, whereas in the sinusoidal case the operating margin shrinks below 500MHz. These results indicate that AQFP circuits adopting delay-line clocking can operate in a low frequency range by using square excitation currents.

A Josephson parametric oscillator (JPO) is an interesting system from the viewpoint of quantum optics because it has two stable self-oscillating states and can deterministically generate quantum cat states. A theoretical proposal has been made to operate a network of multiple JPOs as a quantum annealer, which can solve adiabatically combinatorial optimization problems at high speed. Proof-of-concept experiments have been actively conducted for application to quantum computations. This article provides a review of the mechanism of JPOs and their application as a quantum annealer.

Most research on detecting shilling attacks focuses on users' rating behavior but does not consider that attackers may also attack the users' trusting behavior. For example, attackers may give a low score to other users' ratings so that people would think the ratings from the users are not helpful. In this paper, we define the trust shilling attack, propose the behavior features of trust attacks, and present an effective detection method using machine learning methods. The experimental results demonstrate that, based on our proposed behavior features of trust attacks, we can detect trust shilling attacks as well as traditional shilling attacks accurately.

When collecting images, owing to the influence of shooting equipment, shooting environment, and other factors, often low-illumination images with insufficient exposure are obtained. For low-illumination images, it is necessary to improve the contrast. In this paper, a digital color image contrast enhancement method based on luminance weight adjustment is proposed. This method improves the contrast of the image and maintains the detail and nature of the image. In the proposed method, the illumination of the histogram equalization image and the adaptive gamma correction with weighted distribution image are adjusted by the luminance weight of w1 to obtain a detailed image of the bright areas. Thereafter, the suppressed multi-scale retinex (MSR) is used to process the input image and obtain a detailed image of the dark areas. Finally, the luminance weight w2 is used to adjust the illumination component of the detailed images of the bright and dark areas, respectively, to obtain the output image. The experimental results show that the proposed method can enhance the details of the input image and avoid excessive enhancement of contrast, which maintains the naturalness of the input image well. Furthermore, we used the discrete entropy and lightness order error function to perform a numerical evaluation to verify the effectiveness of the proposed method.

In this paper, we review the basic components of superconducting quantum computers. We mainly focus on the packaging and wiring technologies required to realize large-scalable superconducting quantum computers.