In this paper, we present the sexual dimorphism analysis in 3D human face and perform gender classification based on the result of sexual dimorphism analysis. Four types of features are extracted from a 3D human-face image. By using statistical methods, the existence of sexual dimorphism is demonstrated in 3D human face based on these features. The contributions of each feature to sexual dimorphism are quantified according to a novel criterion. The best gender classification rate is 94% by using SVMs and Matcher Weighting fusion method. This research adds to the knowledge of 3D faces in sexual dimorphism and affords a foundation that could be used to distinguish between male and female in 3D faces.

Proportional fair scheduling attains a graceful trade-off between fairness among users and total system throughput. It is simple to implement in single carrier transmission systems, while changes to a prohibitively complex combinatorial problem for multi-carrier transmission systems. This letter addresses a couple of conditions that approximate multi-carrier proportional fair scheduling (MCPF) as carrier-by-carrier proportional fair scheduling (CCPF), which has much lower complexity than MCPF. Numerical results show that the proportional fairness metric of CCPF approaches to that of MCPF for those conditions.

Usually the contact voltage drop or contact resistance of electromagnetic relays is observed only to identify if the contacts are failure or not on the manufactures' life tests. However, it is difficult to reveal the contact performance degradation because the variation of contact resistance may not be obvious. In this paper, a new life test technology was investigated to analyze the contact failure mechanisms and degenerative processes of electromagnetic relays by measuring their time parameters including closing time, opening time, over-travel time, rebound duration and gap time during each operation. Moreover, for the purpose of verifying the time parameters, the contact motion and contact morphology during life test were record by using a high speed camera. Both the variations of time parameters and information obtained from photos taken by high speed camera show that it involves three different degenerative phases during the whole life of a relay. The results also indicate this method is an effective technology to discriminate and diagnose the failure mechanisms for electromagnetic relays.

This letter proposes an intra-cell partial spectrum reuse (PSR) scheme for cellular OFDM-relay networks. The proposed method aims to increase the system throughput, while the SINR of the cell edge users can be also promoted by utilizing the PSR scheme. The novel pre-allocation factor γ not only indicates the flexibility of PSR, but also decreases the complexity of the reuse mechanism. Through simulations, the proposed scheme is shown to offer superior performances in terms of system throughput and SINR of last 5% users.

This paper studies the performance of a coded convolutional spreading CDMA system with cyclic prefix (CS-CDMA/CP) combined with the zero correlation zone code generated from the M-sequence (M-ZCZ code) for downlink transmission over a multipath fast fading channel. In particular, we propose a new pilot-aided channel estimation scheme based on the shift property of the M-ZCZ code and show the robustness of the scheme against fast fading through comparison with the W-CDMA system empolying time-multiplexed pilot signals.

The IEEE 802.11 MAC standard for wireless ad hoc networks adopts Binary Exponential Back-off (BEB) mechanism to resolve bandwidth contention between stations. BEB mechanism controls the bandwidth allocation for each station by choosing a back-off value from one to CW according to the uniform random distribution, where CW is the contention window size. However, in asymmetric multi-hop networks, some stations are disadvantaged in opportunity of access to the shared channel and may suffer severe throughput degradation when the traffic load is large. Then, the network performance is degraded in terms of throughput and fairness. In this paper, we propose a new cross-layer scheme aiming to solve the per-flow unfairness problem and achieve good throughput performance in IEEE 802.11 multi-hop ad hoc networks. Our cross-layer scheme collects useful information from the physical, MAC and link layers of own station. This information is used to determine the optimal Contention Window (CW) size for per-station fairness. We also use this information to adjust CW size for each flow in the station in order to achieve per-flow fairness. Performance of our cross-layer scheme is examined on various asymmetric multi-hop network topologies by using Network Simulator (NS-2).

In an early design stage of LSI designing, finding out the proper parameters for power planning is important from the viewpoint of cost minimization. In this paper, we present simple analytical formulas which are used to obtain the initial parameters close to the proper power distribution networks in the early design stage. The formulas for estimating static and pseudo-dynamic voltage drops (IR-drops) are derived by the response surface method (RSM). By making the formulas once, they can be used for the general power planning for the power-grid style in any process technology.

This paper proposes an adaptive resource allocation for multi-tier computing systems to guarantee a fair QoS level under resource constraints of tiers. We introduce a multi-tier computing architecture which consists of a group of resource managers and an arbiter. Resource allocation of each client is managed by a dedicated resource manager. Each resource manager updates resources allocated to subtasks of its client by locally exchanging QoS levels with other resource managers. An arbiter compensates the updated resources to avoid overload conditions in tiers. Based on the compensation by the arbiter, the subtasks of each client are executed in corresponding tiers. We derive sufficient conditions for the proposed resource allocation to achieve a fair QoS level avoiding overload conditions in all tiers with some assumptions on a QoS function and a resource consumption function of each client. We conduct a simulation to demonstrate that the proposed resource allocation can adaptively achieve a fair QoS level without causing any overload condition.

We propose a low-power eFuse one-time programmable (OTP) memory IP based on a bipolar CMOS DMOS (BCD) process. It is an eFuse OTP memory cell which uses separate transistors that are optimized in program and in read mode. The eFuse cell also uses poly-silicon gates having co-silicide. An asynchronous interface and a separate I/O method are used for the low-power and small-area eFuse OTP memory IP. Additionally, we propose a new circuit protecting a short-circuit current in the VDD-to-VIO voltage level translator circuit while the VDD voltage is being generated by the voltage regulator at power-up. A digital sensing circuit using clocked inverters is used to sense a bit-line (BL) datum. Furthermore, the poly-silicon of the IP is split into n+ poly-silicon and p+ poly-silicon to optimize the eFuse link. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18 µm BCD process is 283.565524.180 µm2. It is measured by manufactured test IPs with Dongbu HiTek's 0.18 µm BCD process that the programming voltage of the n+ gate poly-silicon is about 0.1 V less than that of the p+ gate poly-silicon.

Drain collapse in AlGaN/GaN HFET is analyzed using a two-dimensional device simulator. Two-step saturation is obtained, assuming hole-trap type surface states on the AlGaN surface and a short negative-charge-injected region at the drain side of the gate. Due to the surface electric potential pinning by the surface traps, the negative charge injected region forms a constant potential like in a metal gate region and it acts as an FET with a virtual gate. The electron concentration profile reveals that the first saturation occurs by pinch-off in the virtual gate region and the second saturation occurs by the pinch-off in the metal gate region. Due to the short-channel effect of the virtual gate FET, the saturation current increases until it finally reaches the saturation current of the intrinsic metal gate FET. Current collapses with current degradation at the knee voltage in the I-V characteristics can be explained by the formation of the virtual gate.

Method for eliminating magnetic saturation in low-voltage and high-current DC-DC converter with fast dynamic response is described. The magnetic saturation is observed in onboard isolated bridge-type DC-DC converter due to inherently asymmetrical PWM signal during transient condition. The saturation is not eliminated by using ac-coupling capacitor for transformer. Mechanism of the saturation is analyzed and confirmed by experiments. Based on the analysis a solution for the magnetic saturation is proposed. The effectiveness of proposed method is also confirmed by experiments.

Digital signal processing requires digital filters with variable frequency characteristics. A variable digital filter (VDF) is a filter whose frequency characteristics can be easily and instantaneously changed. In this paper, we present a design method for variable linear-phase finite impulse response (FIR) filters with multiple variable factors and a reduction method for the number of polynomial coefficients. The obtained filter has a high piecewise attenuation in the stopband. The stopband edge and the position and magnitude of the high piecewise stopband attenuation can be varied by changing some parameters. Variable parameters are normalized in this paper. An optimization methodology known as semidefinite programming (SDP) is used to design the filter. In addition, we present that the proposed VDF can be implemented using the Farrow structure, which suitable for real time signal processing. The usefulness of the proposed filter is demonstrated through examples.

In this letter, we develop a behavioral metric with which spamming botnets can be quickly identified with respect to their residing IP blocks. Our method aims at line-speed operation without deep inspection, so only TCP/IP header fields of the passing packets are examined. However, the proposed metric yields a high-quality receiver operating characteristics (ROC), with high detection rates and low false positive rates.

This paper presents a Pulse-Width Modulation (PWM) pre-emphasis technique which utilizes time-domain information processing to increase the data rate for a given bandwidth of interconnection. The PWM pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower supply voltage. We discuss multiple-valued data transmission based on time-domain pre-emphasis techniques in consideration of higher-order channel effects. Also, a new data-dependent adaptive time-domain pre-emphasis technique is proposed to compensate for the data-dependent jitter.

This paper proposes and investigates a distributed adaptive contention window adjustment algorithm based on the transmission history for wireless LANs called the transmission-history-based distributed adaptive contention window adjustment (THAW) algorithm. The objective of this paper is to reduce the transmission delay and improve the channel throughput compared to conventional algorithms. The feature of THAW is that it adaptively adjusts the initial contention window (CWinit) size in the binary exponential backoff (BEB) algorithm used in the IEEE 802.11 standard according to the transmission history and the automatic rate fallback (ARF) algorithm, which is the most basic algorithm in automatic rate controls. This effect is to keep CWinit at a high value in a congested state. Simulation results show that the THAW algorithm outperforms the conventional algorithms in terms of the channel throughput and delay, even if the timer in the ARF is changed.

Polar Fourier Descriptor(PFD) and Spherical Fourier Descriptor(SFD) are rotation invariant feature descriptors for two dimensional(2D) and three dimensional(3D) image retrieval and pattern recognition tasks. They are demonstrated to show superiorities compared with other methods on describing rotation invariant features of 2D and 3D images. However in order to increase the computation speed, fast computation method is needed especially for machine vision applications like realtime systems, limited computing environments and large image databases. This paper presents fast computation method for PFD and SFD that are deduced based on mathematical properties of trigonometric functions and associated Legendre polynomials. Proposed fast PFD and SFD are 8 and 16 times faster than direct calculation that significantly boost computation process. Furthermore, the proposed methods are also compact for memory requirements for storing PFD and SFD basis in lookup tables. The experimental results on both synthetic and real data are given to illustrate the efficiency of the proposed method.

Generalized selection combining (GSC) was recently proposed as a low-complexity diversity combining technique for diversity-rich environments. This letter proposes a multi-hop Decode-and-Forward Relaying (MDFR) scheme in conjunction with GSC and describes its performance in terms of average bit error probability. We have shown that the proposed protocol offers a remarkable diversity advantage over direct transmission as well as the conventional decode-and-forward relaying (CDFR) scheme. Simulation results are also given to verify the analytical results.

In this paper, a novel CMA (constant modulus algorithm) algorithm employing fast convolution in the DFT (discrete Fourier transform) domain is proposed. We propose a non-linear adaptation algorithm that minimizes CMA cost function in the DFT domain. The proposed algorithm is completely new one as compared to the recently introduced similar DFT domain CMA algorithm in that, the original CMA cost function has not been changed to develop DFT domain algorithm, resulting improved convergence properties. Using the proposed approach, we can reduce the number of multiplications to O(Nlog2 N), whereas the conventional CMA has the computation order of O(N2). Simulation results show that the proposed algorithm provides a comparable performance to the conventional CMA.

This paper studies the optimum combining (OC) system with multiple arbitrary-power interferers and thermal noise in a flat Rayleigh fading environment. The main contribution of the paper is a concise performance analysis for the overload OC system where the number of interferers exceeds or is equal to the number of antennas elements. Simple closed-form formulas are derived for the moment generating function (m.g.f) of the output signal-to-interference-plus-noise ratio (SINR) and the symbol error rate (SER) with M-ary phase shift keying (M-PSK). These formulas are expressed as a finite sum involving polynomial, exponential and exponential integral terms. Based on the derived m.g.f, the closed-form explicit expressions for the moments of the output SINR are determined. Finally, asymptotic analysis illustrates that employing distinguished power control is an effective approach to combat the SER floor for the overload OC system.

Information on false paths in a circuit is useful for design and testing. The use of this information may contribute not only to reducing circuit area, the time required for logic synthesis, test generation and test application of the circuit, but also to alleviating over-testing. Since identification of the false paths at gate level is hard, several methods using high-level design information have been proposed. These methods are effective only if the correspondence between paths at register transfer level (RTL) and at gate level can be established. Until now, giving restriction on logic synthesis is the only way to establish the correspondence. However, it is not practical for industrial designs. In this paper, we propose a method for mapping RTL false paths to their corresponding gate level paths without such a specific logic synthesis; it guarantees that the corresponding gate level paths are false. Experimental results show that our path mapping method can establish the correspondences of RTL false paths and many gate level false paths.