This paper reviews two simple numerical algorithms particularly useful in Computational ElectroMagnetics (CEM): the Weighted Averages (WA) algorithm and the Double Exponential (DE) quadrature. After a short historical introduction and an elementary description of the mathematical procedures underlying both techniques, they are applied to the evaluation of Sommerfeld integrals, where WA and DE combine together to provide a numerical tool of unprecedented quality. It is also shown that both algorithms have a much wider range of applications. A generalization of the WA algorithm, able to cope with integrands including products of Bessel and similar oscillatory functions, is described. Similarly, the original DE algorithm is adapted with exceptional results to the evaluation of the multidimensional singular integrals arising in the discretization of Integral-Equation based CEM formulations. The new possibilities of WA and DE algorithms are demonstrated through several practical numerical examples.

In this paper, Hermite polynomial representation is proposed as an alternative way to represent finite fields of characteristic two. We show that multiplication in Hermite polynomial representation can be achieved with subquadratic space complexity. This representation enables us to find binomial or trinomial irreducible polynomials which allows us faster modular reduction over binary fields when there is no desirable such low weight irreducible polynomial in other representations. We then show that the product of two elements in Hermite polynomial representation can be performed as Toeplitz matrix-vector product. This representation is very interesting for NIST recommended binary field GF(2571) since there is no ONB for the corresponding extension. This representation can be used to obtain more efficient finite field arithmetic.

This paper proposes a new double-edge-triggered implicitly level-converting flip-flop, suitable for a low-power and low-voltage design. The design employs a sense amplifier architecture to reduce the delay and power consumption. Experimentally, when implemented with a 130-nm, single-Vt and 0.84V VDD process, it achieves 64% power-delay product (PDP) improvement, and moreover, 78% PDP improvement when implemented with a mixed-Vt technology, as compared to that of the classic double-edge-triggered flip-flop design.

Folded dipole antenna with feed line (FDAFL) whose relative bandwidth is 65% (VSWR≤3) has been reported as a wideband planar antenna for a small terminal. However, this antenna is constructed outside of the ground plane (50×80mm2) by 12mm. In this study, we analyze the antenna configurations of FDAFL in 3D so that the antenna does not protrude from the ground plane as much as possible. Two different 3D antenna models derived from FDAFL are investigated. The first model is folded over the ground plane, and the second one is folded outside of the ground plane. The relative bandwidth, the VSWR characteristics and radiation patterns are studied. As a result, it is confirmed that antenna prominence could be reduced and broadband characteristics over 74% and 83% are obtained by the 3D models, respectively, which are wider than the bandwidth of conventional 2D model. Thus, FDAFL could be used in both 2D and 3D for a small terminal.

A directional lapped orthogonal transform (DirLOT) is an orthonormal transform of which basis is allowed to be anisotropic with the symmetric, real-valued and compact-support property. Due to its directional property, DirLOT is superior to the existing separable transforms such as DCT and DWT in expressing diagonal edges and textures. The goal of this paper is to enhance the ability of DirLOT further. To achieve this goal, we propose a novel image restoration technique using multiple DirLOTs. This paper generalizes an image denoising technique in [1], and expands the application of multiple DirLOTs by introducing linear degradation operator P. The idea is to use multiple DirLOTs to construct a redundant dictionary. More precisely, the redundant dictionary is constructed as a union of symmetric orthonormal discrete wavelet transforms generated by DirLOTs. To select atoms fitting a target image from the dictionary, we formulate an image restoration problem as an l1-regularized least square problem, which can efficiently be solved by the iterative-shrinkage/thresholding algorithm (ISTA). The proposed technique is beneficial in expressing multiple directions of edges/textures. Simulation results show that the proposed technique significantly outperforms the non-subsampled Haar wavelet transform for deblurring, super-resolution, and inpainting.

NROM is one of the emerging non-volatile-memory technologies, which is promising for replacing current floating-gate-based non-volatile memory such as flash memory. In order to raise the fabrication yield and enhance its reliability, a novel test and repair flow is proposed in this paper. Instead of the conventional fault replacement techniques, a novel fault masking technique is also exploited by considering the logical effects of physical defects when the customer's code is to be programmed. In order to maximize the possibilities of fault masking, a novel data inversion technique is proposed. The corresponding BIST architectures are also presented. According to experimental results, the repair rate and fabrication yield can be improved significantly. Moreover, the incurred hardware overhead is almost negligible.

Arc discharge at breaking electrical contact is considered as a main source of not only degradation of the electrical property but also an undesired electromagnetic (EM) noise. In order to clarify the effect of holder temperature on the bridge and arc-duration, opening-waveforms at slowly separating silver-tin dioxide contact with different holder temperature are measured and discussed experimentally in this paper. Firstly, as opening-waveforms, the contact voltage, the contact current and the movement of moving contact related to the gap length are measured simultaneously. Secondly, the relationship between temperature of the holder and duration of the arc was quantified experimentally. It was revealed that as the initial temperature of the holder becomes higher, arc-duration becomes slightly longer. More importantly, the holder temperature dependencies of percentage of each-phase (metallic and gaseous-phases) are different with different closed-current.

In the image classification applications, the test sample with multiple man-handcrafted descriptions can be sparsely represented by a few training subjects. Our paper is motivated by the success of multi-task joint sparse representation (MTJSR), and considers that the different modalities of features not only have the constraint of joint sparsity across different tasks, but also have the constraint of local manifold structure across different features. We introduce the constraint of local manifold structure into the MTJSR framework, and propose the Locality-constrained multi-task joint sparse representation method (LC-MTJSR). During the optimization of the formulated objective, the stochastic gradient descent method is used to guarantee fast convergence rate, which is essential for large-scale image categorization. Experiments on several challenging object classification datasets show that our proposed algorithm is better than the MTJSR, and is competitive with the state-of-the-art multiple kernel learning methods.

Break arcs are generated between carbon contacts in a DC48V and 10A resistive circuit. The external transverse magnetic field formed by a permanent magnet is applied to break arcs. The position of the cathode spot region of the break arcs occurring between carbon contacts is investigated and the following results are shown. The cathode and anode spot regions moves together with and without the magnetic field. The position of the break arcs just before arc extinction tends to shift upward with increase of the magnetic flux density of the transverse magnetic field.

Silver electrical contacts are separated at a constant speed and break arcs are generated in a DC300V-450V/10A resistive circuit. The transverse magnetic field formed by a permanent magnet is applied to the break arcs. Alumina pipes are placed around the contacts to restrict the motion of break arcs. The dependences of the arc lengthening time and arc length just before arc extinction L on the strength of the magnetic field and supply voltage are investigated. It was found that the arc lengthening time increases with increasing supply voltage E and tends to decrease when the magnetic flux density Bx is increased. The arc length just before arc extinction L increases with increasing E and decreasing Bx. It also increases linearly with increasing arc lengthening time tm when no reignitions occur.

We experimentally investigate and analyze faults in optical fiber connections with refractive index matching material that have incorrectly cleaved fiber ends. We explain that incorrectly cleaved fiber ends, which are not ideal because they are uneven and not perpendicular to the fiber axis, are caused by defective optical fiber cleavers. We discover that the optical performance of field installable connections using incorrectly cleaved fiber ends might change greatly. We also infer that the significant change in insertion and return losses might be attributed to partially air-filled gaps by using scatter diagrams of measured insertion and return losses. Our experiment results reveal that the optical performance might deteriorate to more than 40dB in terms of insertion loss and less than 30dB in terms of return loss.

We propose an asynchronous datapath for the low-density parity-check decoder to decrease power consumption. Glitches and redundant computations are decreased by the asynchronous design. Taking advantage of the statistical characteristics of the input data, we develop novel key arithmetic elements in the datapath to reduce redundant computations. Two other types of datapaths, including normal synchronous design and clock-gating design, are implemented for comparisons with the proposed design. The three designs use similar architectures and realize the same function by using the 0.18µm process of the Semiconductor Manufacturing International Corporation. Post-layout result shows that the proposed asynchronous design exhibits the lowest power consumption. The proposed asynchronous design saves 48.7% and 21.9% more power than the normal synchronous and clock-gating designs, respectively. The performance of the proposed datapath is slightly worse than the clock-gating design but is better than the synchronous design. The proposed design is approximately 7% larger than the other two designs.

As mobile multimedia services expand, user behavior will become more diverse and the control of service quality from the user's perspective will become more important in service design. The quality of the network is one of the critical factors determining mobile service quality. However, this has mainly been evaluated in objective physical terms, such as delay reduction and bandwidth expansion. It is less common to use a human-centered design viewpoint when improving network performance. In this paper, we discuss ways to improve the quality of web services using time-fillers that actively address the human factors to improve the subjective quality of a mobile network. A field experiment was conducted, using a prototype. The results of the field experiment show that time-fillers can significantly decrease user dissatisfaction with waiting, but that this effect is strongly influenced by user preferences concerning content. Based on these results, we discuss the design requirements for effective use of time-fillers.

Semantic concept in an utterance is obtained by a fuzzy matching methods to solve problems such as words' variation induced by automatic speech recognition (ASR), or missing field of key information by users in the process of spoken language understanding (SLU). A two-stage method is proposed: first, we adopt conditional random field (CRF) for building probabilistic models to segment and label entity names from an input sentence. Second, fuzzy matching based on similarity function is conducted between the named entities labeled by a CRF model and the reference characters of a dictionary. The experiments compare the performances in terms of accuracy and processing speed. Dice similarity and cosine similarity based on TF score can achieve better accuracy performance among four similarity measures, which equal to and greater than 93% in F1-measure. Especially the latter one improved by 8.8% and 9% respectively compared to q-gram and improved edit-distance, which are two conventional methods for string fuzzy matching.

Small delay defects can cause serious issues such as very short lifetime in the recent VLSI devices. Delay measurement is useful to detect small delay defects in manufacturing testing. This paper presents a design for delay measurement to detect small delay defects on global routing resources, such as double, hex and long lines, in a Xilinx Virtex 4 based FPGA. This paper also shows a measurement method using the proposed design. The proposed measurement method is based on an existing one for SoC using delay value measurement circuit (DVMC). The proposed measurement modifies the construction of configurable logic blocks (CLBs) and utilizes an on-chip DVMC newly added. The number of configurations required by the proposed measurement is 60, which is comparable to that required by stuck-at fault testing for global routing resources in FPGAs. The area overhead is low for general FPGAs, in which the area of routing resources is much larger than that of the other elements such as CLBs. The area of every modified CLB is 7% larger than an original CLB, and the area of the on-chip DVMC is 22% as large as that of an original CLB. For recent FPGAs, we can estimate that the area overhead is approximately 2% or less of the FPGAs.

In this paper, a new finger vein recognition method based on Gabor wavelet and Local Binary Pattern (GLBP) is proposed. In the new scheme, Gabor wavelet magnitude and Local Binary Pattern operator are combined, so the new feature vector has excellent stability. We introduce Block-based Linear Discriminant Analysis (BLDA) to reduce the dimensionality of the GLBP feature vector and enhance its discriminability at the same time. The results of an experiment show that the proposed approach has excellent performance compared to other competitive approaches in current literatures.

This paper proposes a procedure for avoiding delay faults in field with slack assessment during standby time. The proposed procedure performs path delay testing and checks if the slack is larger than a threshold value using selectable delay embedded in basic elements (BE). If the slack is smaller than the threshold, a pair of BEs to be replaced, which maximizes the path slack, is identified. Experimental results with two application circuits mapped on a coarse-grained architecture show that for aging-induced delay degradation a small threshold slack, which is less than 1 ps in a test case, is enough to ensure the delay fault prediction.

We propose a sound field control system to control the sound over a wide area within a room by reducing the influence of the reproduction space using power envelope inverse filtering (PEIF). Envelopes of the impulse response within the room have approximately the same shape at all observation points. Therefore, the proposed sound field control system can control with a small number of loudspeakers a wider area by reducing reverberation in the room through envelope processing. We present experimental data demonstrating that the proposed PEIF system can provide better control than a system that uses minimum phase inverse filtering (MPIF), which is conventionally used for reducing reverberation. Improvement was observed across the frequency band, especially above 1 kHz. Additionally, our PEIF system is more effective over the high-frequency range.

In this paper, an area-efficient decoder architecture is proposed for the quasi-cyclic low-density parity check (QC-LDPC) codes specified in the IEEE 802.16e WiMAX standard. The decoder supports all the code rates and codeword lengths defined in the standard. In order to achieve low area and maximize hardware utilization, the decoder utilizes 4 decoding function units, which is the greatest common divisor of the expansion factors. In addition, the decoder adopts a novel scheduling scheme named stride scheduling, which stores the extrinsic messages in non-sequential order to replace the conventional complex flexible permutation network with simple small-sized cyclic shifters and also minimize the number of memory accesses. To further minimize the complexity, the number of extrinsic memory instances for 24 block columns is reduced to 5 banks by identifying independent sets. All the memory instances used in the decoder are single-port memories which cost less area and price compared to dual-port ones. Finally, the decoding function units have partially parallel structure to make the decoding throughput sufficiently over the requirement of the WiMAX standard. The proposed decoder is synthesized with 49 K equivalent gates and 54,144 bits of memory, and the implementation occupies 0.40 mm2 in a 65 nm CMOS technology.

This paper presents symmetric and full swing designs of multiplier and full adder cells, based on weighted inputs for nanotechnology. Carbon Nanotube Field Effect Transistors (CNTFETs) are used to implement the circuits. Proposed designs are simulated using the HSPICE simulation tool and they are compared with their counterparts in terms of delay, power consumption and power-delay product. Significant improvements have been achieved at different voltage levels and different frequencies, load capacitors and temperatures have also been tested. Finally, process variation issue has been analyzed and the results have been reported.