The development of assistive devices for automated sound recognition is an important field of research and has been receiving increased attention. However, there are still very few methods specifically developed for identifying environmental sounds. The majority of the existing approaches try to adapt speech recognition techniques for the task, usually incurring high computational complexity. This paper proposes a sound recognition method dedicated to environmental sounds, designed with its main focus on embedded applications. The pre-processing stage is loosely based on the human hearing system, while a robust set of binary features permits a simple k-NN classifier to be used. This gives the system the capability of in-field learning, by which new sounds can be simply added to the reference set in real-time, greatly improving its usability. The system was implemented in an FPGA based platform, developed in-house specifically for this application. The design of the proposed method took into consideration several restrictions imposed by the hardware, such as limited computing power and memory, and supports up to 12 reference sounds of around 5.3 s each. Experimental results were performed in a database of 29 sounds. Sensitivity and specificity were evaluated over several random subsets of these signals. The obtained values for sensitivity and specificity, without additional noise, were, respectively, 0.957 and 0.918. With the addition of +6 dB of pink noise, sensitivity and specificity were 0.822 and 0.942, respectively. The in-field learning strategy presented no significant change in sensitivity and a total decrease of 5.4% in specificity when progressively increasing the number of reference sounds from 1 to 9 under noisy conditions. The minimal signal-to-noise ration required by the prototype to correctly recognize sounds was between -8 dB and 3 dB. These results show that the proposed method and implementation have great potential for several real life applications.

The analytic expressions of lightning electromagnetic fields generated by tortuous channel with an inclined lower section are obtained by decomposing the current infinitesimal and solving Maxwell's equations. By using the transmission line model and pulse function to express the channel-base current, the influence of length and tilt angle of the oblique part on lightning electromagnetic fields as well as the distribution laws of electromagnetic fields for different azimuth angles are analyzed. The results show that the electromagnetic fields in near area are mainly determined by the lower section of the tortuous discharge channel, and the peak values of electromagnetic fields in different field regions will increase with the increasing of the length of the lower section when L1 is shorter than the distance that return-stroke speed multiplied by peak time. Whereas the length of the lower section is longer than the distance that return-stroke speed multiplied by peak time, the waveforms of electromagnetic fields will overlap each other and won't be influenced by oblique part length of the discharge channel before the return-stroke current arrives at the inflection point. Moreover, the peak values of electromagnetic fields will decrease with the increase of tilt angle (the azimuth angle φ = 2π/3) and azimuth angle, and the impact of channel geometry on the electromagnetic field strengthens with the distance.

Biphase periodic sequences having elements +1 or -1 with the two-level autocorrelation function are desirable in communications and radars. However, in case of the biphase orthogonal periodic sequences, Turyn has conjectured that there exist only sequences with period 4, i.e., there exist the circulant Hadamard matrices for order 4 only. In this paper, it is described that the conjecture is proved to be true by means of the isomorphic mapping, the Chinese remainder theorem, the linear algebra, etc.

An (M,N)-field-data extractor reads out any consecutive N bytes from an M-byte register by connecting its input/output using a multiplexer (MUX) network. It is used in packet analysis and/or stream data processing for video/audio data. In this letter, we propose an efficient MUX network for an (M,N)-field-data extractor. By bi-partitioning a simple MUX network into an upper one and a lower one, we can theoretically reduce the number of required MUXs without increasing the MUX network depth. Experimental results show that we can reduce the gate count by up to 92% compared to a naive approach.

In this paper, the system identification problem from the high-dimensional input and output is considered. If the relationship between the features extracted from the data is represented as a linear time-invariant dynamical system, the input-output manifold learning method has shown to be a powerful tool for solving such a system identification problem. However, in the previous study, the system is assumed to be initially relaxed because the transfer function model is used for system representation. This assumption may not hold in several tasks. To handle the initially non-relaxed system, we propose the alternative approach of the input-output manifold learning with state space model for the system representation. The effectiveness of our proposed method is confirmed by experiments with synthetic data and motion capture data of human-human conversation.

The Building puzzle is played on an N×N grid of cells. Initially, some numbers are given around the border of the grid. The object of the puzzle is to fill out blank cells such that every row and column contains the numbers 1 through N. The number written in each cell represents the height of the building. The numbers around the border indicate the number of buildings which a person can see from that direction. A shorter building behind a taller one cannot be seen by him. It is shown that deciding whether the Building puzzle has a solution is NP-complete.

A single-flux-quantum (SFQ) arithmetic logic unit (ALU) was designed and tested to evaluate the effectiveness of introducing dynamically reconfigurable logic gates in the design of a superconducting logic circuit. We designed and tested a bit-serial SFQ ALU that can perform six arithmetic/logic functions by using a dynamically reconfigurable AND/OR gate. To ensure stable operation of the ALU, we improved the operating margin of the SFQ AND/OR gate by employing a partially shielded structure where the circuit is partially surrounded by under- and over-ground layers to reduce parasitic inductances. Owing to the introduction of the partially shielded structure, the operating margin of the dynamically reconfigurable AND/OR gate can be improved without increasing the circuit area. This ALU can be designed with a smaller circuit area compared with the conventional ALU by using the dynamically reconfigurable AND/OR gate. We implemented the SFQ ALU using the AIST 2.5kA/cm2 Nb standard process 2. We confirmed high-speed operation and correct reconfiguration of the SFQ ALU by a high-speed test. The measured maximum operation frequency was 30GHz.

One of the fundamental problems in many-pixel detectors implemented in cryogenics environments is the number of bias and read-out wires. If one targets a megapixel range detector, number of wires should be significantly reduced. One possibility is that the detectors are serially connected and biased by using only one line and read-out is accomplished by on-chip circuitry. In addition to the number of pixels, the detectors should have fast response times, low dead times, high sensitivities, low inter-pixel crosstalk and ability to respond to simultaneous irradiations to individual pixels for practical purposes. We have developed an equivalent circuit model for a serially connected superconducting strip line detector (SSLD) array together with the read-out electronics. In the model we take into account the capacitive effects due to the ground plane under the detector, effects of the shunt resistors fabricated under the SSLD layer, low pass filters placed between the individual pixels that enable individual operation of each pixel and series resistors that prevents the DC bias current flowing to the read-out electronics as well as adjust the time constants of the inductive SSLD loop. We explain the results of investigation of the following parameters: Crosstalk between the neighbor pixels, response to simultaneous irradiation, dead times, L/R time constants, low pass filters, and integration with the SFQ front-end circuit. Based on the simulation results, we show that SSLDs are promising devices for detecting a wide range of incident radiation such as neurons, X-rays and THz waves in many-pixel configurations.

A negative capacitor is fabricated using poly(vinylidene fluoride-trifluoroethylene) copolymer and connected in series to an a-IZO TFT. It is experimentally demonstrated that the negative capacitance of the negative capacitor can create steep switching in the a-IZO TFT (e.g., a subthreshold slope change from 342mV/decade to 102mV/decade at room-temperature).

This paper presents the design of a multiple-standard 1080 high definition (HD) video decoder on a mixed-grained reconfigurable computing platform integrating coarse-grained reconfigurable processing units (RPUs) and FPGAs. The proposed RPU, including 16×16 multi-functional processing elements (PEs), is used to accelerate compute-intensive tasks in the video decoding. A soft-core-based microprocessor array is implemented on the FPGA and adopted to speed-up the dynamic reconfiguration of the RPU. Furthermore, a mail-box-based communication scheme is utilized to improve the communication efficiency between RPUs and FPGAs. By exploiting dynamic reconfiguration of the RPUs and static reconfiguration of the FPGAs, the proposed platform achieves scalable performances and cost trade-offs to support a variety of video coding standards, including MPEG-2, AVS, H.264, and HEVC. The measured results show that the proposed platform can support H.264 1080 HD video streams at up to 57 frames per second (fps) and HEVC 1080 HD video streams at up to 52fps under 250MHz, at the same time, it achieves a 3.6× performance gain over an industrial coarse-grained reconfigurable processor for H.264 decoding, and a 6.43× performance boosts over a general purpose processor based implementation for HEVC decoding.

Cognitive radio sensor networks (CRSNs) with their dynamic spectrum access capability appear to be a promising solution to address the increasing challenge of spectrum crowding faced by the traditional WSN. In this paper, through maximizing the utility index of the CRSN, a node density-adaptive spectrum access strategy for sensor nodes is proposed that takes account of the node density in a certain event-driven region. For this purpose, considering the burst real-time data traffic, we analyze the energy efficiency (EE) and the packet failure rate (PFR) combining network disconnected rate (NDR) and packet loss rate (PLR) during the channel switching interval (CSI) for both underlay and interweave spectrum access schemes. Numerical results confirm the validity of our theoretical analyses and indicate that the adaptive node density threshold (ANDT) exists for underlay and interweave spectrum access scheme switching.

A Field Programmable Sequencer and Memory (FPSM), which is a programmable unit exclusively optimized for peripherals on a micro controller unit, is proposed. The FPSM functions as not only the peripherals but also the standard built-in memory. The FPSM provides easier programmability with a smaller area overhead, especially when compared with the FPGA. The FPSM is implemented on the FPGA and the programmability and performance for basic peripherals such as the 8 bit counter and 8 bit accuracy Pulse Width Modulation are emulated on the FPGA. Furthermore, the FPSM core with a 4K bit SRAM is fabricated in 0.18µm 5 metal CMOS process technology. The FPSM is an half the area of FPGA, its power consumption is less than one-fifth.

System expandability becomes a major concern for highly parallel computers and data centers, because their number of nodes gradually increases year by year. In this context we propose a low-degree topology and its floor layout in which a cabinet or node set can be newly inserted by connecting short cables to a single existing cabinet. Our graph analysis shows that the proposed topology has low diameter, low average shortest path length and short average cable length comparable to existing topologies with the same degree. When incrementally adding nodes and cabinets to the proposed topology, its diameter and average shortest path length increase modestly. Our discrete-event simulation results show that the proposed topology provides a comparable performance to 2-D Torus for some parallel applications. The network cost and power consumption of DSN-F modestly increase when compared to the counterpart non-random topologies.

An application of laser annealing process, which is used to form the shallow P-type Base junction for 20-V planar power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) is proposed. We demonstrated that the fabricated devices integrated with laser annealing process have superior electrical characteristics than those fabricated according to the standard process. Moreover, the threshold voltage variation of the devices applied by the new annealing process is effectively suppressed. This is due to that a uniform impurity distribution at the channel region is achieved by adopting laser annealing. Laser annealing technology can be applied as a reliable, effective, and advantageous process for the low-voltage power MOSFETs.

Electroencephalography (EEG) and magnetoencephalography (MEG) measure the brain signal from spatially-distributed electrodes. In order to detect event-related synchronization and desynchronization (ERS/ERD), which are utilized for brain-computer/machine interfaces (BCI/BMI), spatial filtering techniques are often used. Common spatial potential (CSP) filtering and its extensions which are the spatial filtering methods have been widely used for BCIs. CSP transforms brain signals that have a spatial and temporal index into vectors via a covariance representation. However, the variance-covariance structure is essentially different from the vector space, and not all the information can be transformed into an element of the vector structure. Grassmannian embedding methods, therefore, have been proposed to utilize the variance-covariance structure of variational patterns. In this paper, we propose a metric learning method to classify the brain signal utilizing the covariance structure. We embed the brain signal in the extended Grassmann manifold, and classify it on the manifold using the proposed metric. Due to this embedding, the pattern structure is fully utilized for the classification. We conducted an experiment using an open benchmark dataset and found that the proposed method exhibited a better performance than CSP and its extensions.

This work presents an object tracking framework which is based on integration of Deformable Part based Models (DPMs) and Dynamic Conditional Random Fields (DCRF). In this framework, we propose a DCRF based novel way to track an object and its details on multiple resolutions simultaneously. Meanwhile, we tackle drastic variations in target appearance such as pose, view, scale and illumination changes with DPMs. To embed DPMs into DCRF, we design specific temporal potential functions between vertices by explicitly formulating deformation and partial occlusion respectively. Furthermore, temporal transition functions between mixture models bring higher robustness to perspective and pose changes. To evaluate the efficacy of our proposed method, quantitative tests on six challenging video sequences are conducted and the results are analyzed. Experimental results indicate that the method effectively addresses serious problems in object tracking and performs favorably against state-of-the-art trackers.

The threshold voltage variations for actual size MOSFETs obtained by capacitance measurement are compared with those obtained by the current measurement, and their differences are studied for the first time. It is found that the threshold voltage variations obtained by the capacitance measurement show the similar behavior to those current measurement and the absolute value is less than those obtained by the current measurement. The reason for the difference is partially explained by that the local channel dopant non-uniformity along the current path makes the threshold voltage variation obtained from current measurement larger. It is found that the flat-band voltage variations, which are obtained from the measured C-V curves, are small and not significant to the threshold voltage variation.

These days, the Web contains a huge volume of (semi-)structured data, called Linked Data (LD). However, LD suffer in data quality, and this poor data quality brings the need to identify erroneous data. Because manual erroneous data checking is impractical, automatic erroneous data detection is necessary. According to the data publishing guidelines of LD, data should use (already defined) ontology which populates type-annotated LD. Usually, the data type annotation helps in understanding the data. However, in our observation, the data type annotation could be used to identify erroneous data. Therefore, to automatically identify possible erroneous data over the type-annotated LD, we propose a framework that uses a novel nearest-neighbor based error detection technique. We conduct experiments of our framework on DBpedia, a type-annotated LD dataset, and found that our framework shows better performance of error detection in comparison with state-of-the-art framework.

The recent popularization of social network services (SNSs), such as YouTube, Dailymotion, and Facebook, enables people to easily publish their personal videos taken with mobile cameras. However, at the same time, such popularity has raised a new problem: video privacy. In such social videos, the privacy of people, i.e., their appearances, must be protected, but naively obscuring all people might spoil the video content. To address this problem, we focus on videographers' capture intentions. In a social video, some persons are usually essential for the video content. They are intentionally captured by the videographers, called intentionally captured persons (ICPs), and the others are accidentally framed-in (non-ICPs). Videos containing the appearances of the non-ICPs might violate their privacy. In this paper, we developed a system called BEPS, which adopts a novel conditional random field (CRF)-based method for ICP detection, as well as a novel approach to obscure non-ICPs and preserve ICPs using background estimation. BEPS reduces the burden of manually obscuring the appearances of the non-ICPs before uploading the video to SNSs. Compared with conventional systems, the following are the main advantages of BEPS: (i) it maintains the video content, and (ii) it is immune to the failure of person detection; false positives in person detection do not violate privacy. Our experimental results successfully validated these two advantages.

In this letter, we propose a novel wear leveling technique we call Hidden cold block-aware Wear Leveling (HaWL) using a bit-set threshold. HaWL prolongs the lifetime of flash memory devices by using a bit array table in wear leveling. The bit array table saves the histories of block erasures for a period and distinguishes cold blocks from all blocks. In addition, HaWL can reduce the size of the bit array table by using a one-to-many mode, where one bit is related to many blocks. Moreover, to prevent degradation of wear leveling in the one-to-many mode, HaWL uses bit-set threshold (BST) and increases the accuracy of the cold block information. The performance results illustrate that HaWL prolongs the lifetime of flash memory by up to 48% compared with previous wear leveling techniques in our experiments.