A method for measuring the magnetic field strength for human exposure assessment closer than 20cm to wireless power transfer (WPT) systems for information household appliances is investigated based on numerical simulations and measurements at 100kHz and 6.78MHz. Four types of magnetic sources are considered: a simple 1-turn coil and three types of coils simulating actual WPT systems. A magnetic sensor whose cross sectional area is 100cm2 as prescribed in International Electrotechnical Commission 62233 is used. Simulation results show that the magnetic field strength detected by the magnetic sensor is affected by its placement angle. The maximum coefficient of variation (CV) is 27.2% when the magnetic source and the sensor are in contact. The reason for this deviation is attributable to the localization of the magnetic field distribution around the magnetic source. The coupling effect between the magnetic source and the sensor is negligible. Therefore, the sensor placement angle is an essential factor in magnetic field measurements. The CV due to the sensor placement angle is reduced from 21% to 4% if the area of the sensor coil is reduced from 100 to 0.75cm2 at 6.78MHz. However, the sensitivity of the sensor coil is decreased by 42.5dB. If measurement uncertainty that considers the deviation in the magnetic field strength due to the sensor placement angle is large, the measured magnetic field strength should be corrected by the uncertainty. If the magnetic field distribution around the magnetic source is known, conservative exposure assessments can be achieved by placing the magnetic sensor in locations at which the spatial averaged magnetic field strengths perpendicular to the magnetic sensor coils become maximum.

Outsourcing IC design and fabrication is one of the effective solutions to reduce design cost but it may cause severe security risks. Particularly, malicious outside vendors may implement Hardware Trojans (HTs) on ICs. When we focus on IC design phase, we cannot assume an HT-free netlist or a Golden netlist and it is too difficult to identify whether a given netlist is HT-free or not. In this paper, we propose a score-based hardware-trojans identifying method at gate-level netlists without using a Golden netlist. Our proposed method does not directly detect HTs themselves in a gate-level netlist but it detects a net included in HTs, which is called Trojan net, instead. Firstly, we observe Trojan nets from several HT-inserted benchmarks and extract several their features. Secondly, we give scores to extracted Trojan net features and sum up them for each net in benchmarks. Then we can find out a score threshold to classify HT-free and HT-inserted netlists. Based on these scores, we can successfully classify HT-free and HT-inserted netlists in all the Trust-HUB gate-level benchmarks and ISCAS85 benchmarks as well as HT-free and HT-inserted AES gate-level netlists. Experimental results demonstrate that our method successfully identify all the HT-inserted gate-level benchmarks to be “HT-inserted” and all the HT-free gate-level benchmarks to be “HT-free” in approximately three hours for each benchmark.

In this letter, we propose a novel kind of uncertain query, top (k1,k2) query. The x-tuple model and the possible world semantics are used to describe data objects in uncertain datasets. The top (k1,k2) query is going to find k2 x-tuples with largest probabilities to be the result of top k1 query in a possible world. Firstly, we design a basic algorithm for top (k1,k2) query based on dynamic programming. And then some pruning strategies are designed to improve its efficiency. An improved initialization method is proposed for further acceleration. Experiments in real and synthetic datasets prove the performance of our methods.

We investigated a control of the crystalline orientation of soluble organic semiconductor single crystals using liquid crystal solvents aligned by the electric field to improve the performance of organic thin-film transistors. We clarified that the semiconductor single crystal grows to the direction parallel to the liquid crystal alignment oriented by the lateral electric field.

The effect of annealing on the field emission characteristics of a field emitter comprising diamond micropowder was investigated. The threshold voltage Vth at which the emission current begins to flow decreased as the annealing temperature increased, and a minimum Vth was obtained at an annealing temperature of 1345K. The reduction in threshold voltage was due to a reduction in the work function with annealing.

Irreversible k-conversion set is introduced in connection with the mathematical modeling of the spread of diseases or opinions. We show that the problem to find a minimum irreversible 2-conversion set can be solved in O(n2log 6n) time for graphs with maximum degree at most 3 (subcubic graphs) by reducing it to the graphic matroid parity problem, where n is the number of vertices in a graph. This affirmatively settles an open question posed by Kyncl et al. (2014).

The emerging three-dimensional (3D) technology is considered as a promising solution for achieving better performance and easier heterogeneous integration. However, the thermal issue becomes exacerbated primarily due to larger power density and longer heat dissipation paths. The thermal issue would also be critical once FPGAs step into the 3D arena. In this article, we first construct a fine-grained thermal resistive model for 3D FPGAs. We show that merely reducing the total power consumption and/or minimizing the power density in vertical direction is not enough for a thermal-aware 3D FPGA backend (placement and routing) flow. Then, we propose our thermal-aware backend flow named TherWare considering location-based heat balance. In the placement stage, TherWare not only considers power distribution of logic tiles in both lateral and vertical directions but also minimizes the interconnect power. In the routing stage, TherWare concentrates on overall power minimization and evenness of power distribution at the same time. Experimental results show that TherWare can significantly reduce the maximum temperature, the maximum temperature gradient, and the temperature deviation only at the cost of a minor increase in delay and runtime as compared with present arts.

An appropriate similarity measure between images is one of the key techniques in search-based image annotation models. In order to capture the nonlinear relationships between visual features and image semantics, many kernel distance metric learning(KML) algorithms have been developed. However, when challenged with large-scale image annotation, their metrics can't explicitly represent the similarity between image semantics, and their algorithms suffer from high computation cost. Therefore, they always lose their efficiency. In this paper, we propose a manifold kernel metric learning (M_KML) algorithm. Our M_KML algorithm will simultaneously learn the manifold structure and the image annotation metrics. The main merit of our M_KML algorithm is that the distance metrics are builded on image feature's interior manifold structure, and the dimensionality reduction on manifold structure can handle the high dimensionality challenge faced by KML. Final experiments verify our method's efficiency and effectiveness by comparing it with state-of-the-art image annotation approaches.

Near-threshold computing has emerged as one of the most promising solutions for enabling highly energy efficient and high performance computation of microprocessors. This paper proposes architecture-level statistical static timing analysis (SSTA) models for the near-threshold voltage computing where the path delay distribution is approximated as a lognormal distribution. First, we prove several important theorems that help consider architectural design strategies for high performance and energy efficient near-threshold computing. After that, we show the numerical experiments with Monte Carlo simulations using a commercial 28nm process technology model and demonstrate that the properties presented in the theorems hold for the practical near-threshold logic circuits.

This paper shows that the induced peak voltage on the short monopole antenna by the EM field radiated from a small gap discharge when the gap width was experimentally changed from 10 to 360µm was not directly proportional to the discharge voltage between the gap. It was found that the 10mm short monopole antenna induced peak voltage had a peak value between 40 and 60µm gap width.

In recent years, applications of complex-valued neural networks have become wide spread. Quaternions are an extension of complex numbers, and neural networks with quaternions have been proposed. Because quaternion algebra is non-commutative algebra, we can consider two orders of multiplication to calculate weighted input. However, both orders provide almost the same performance. We propose hybrid quaternionic Hopfield neural networks, which have both orders of multiplication. Using computer simulations, we show that these networks outperformed conventional quaternionic Hopfield neural networks in noise tolerance. We discuss why hybrid quaternionic Hopfield neural networks improve noise tolerance from the standpoint of rotational invariance.

The linear complexity of binary sequences plays a fundamental part in cryptography. In the paper, we construct more general forms of generalized cyclotomic binary sequences with period 2pm+1qn+1. Furthermore, we establish the formula of the linear complexity of proposed sequences. The results reveal that such sequences with period 2pm+1qn+1 have a good balance property and high linear complexity.

The MQ problem, which consists of solving a system of multivariate quadratic polynomials over a finite field, has attracted the attention of researchers for the development of public-key cryptosystems because (1) it is NP-complete, (2) there is no known polynomial-time algorithm for its solution, even in the quantum computational model, and (3) it enables cryptographic primitives of practical interest. In 2011, Sakumoto, Shirai and Hiwatari presented two new zero-knowledge identification protocols based exclusively on the MQ problem. The 3-pass identification protocol of Sakumoto et al. has impersonation probability 2/3. In this paper, we propose an improvement that reduces the impersonation probability to 1/2. The result is a protocol that reduces the total computation time, the total communication needed and requires a smaller number of rounds for the same security level. We also present a new extension that achieves an additional communication reduction with the use of some smaller hash commitments, but maintaining the same security level.

Syndrome key equation solution is one of the important processes in the decoding of Reed-Solomon codes. This paper proposes a low power key equation solver (KES) architecture where the power consumption is reduced by decreasing the required number of multiplications without degrading the decoding throughput and latency. The proposed method employs smaller number of multipliers than a conventional low power KES architecture. The critical path in the proposed KES circuit is minimized so that the operation at a high clock frequency is possible. A low power folded KES architecture is also proposed to further reduce the hardware complexity by executing folded operations in a pipelined manner with a slight increase in decoding latency.

We have demonstrated tunable extit{n}-channel fullerene and extit{p}-channel pentacene OFETs and CMOS inverter circuit based on a bilayer-dielectric structure of CYTOP (poly(perfluoroalkenyl vinyl ether)) electret and SiO$_{2}$. For both OFET types, the $V_{mathrm{th}}$ can be electrically tuned thanks to the charge-trapping at the interface of CYTOP and SiO$_{2}$. The stability of the shifted $V_{mathrm{th}}$ was investigated through monitoring a change in transistor current. The measured transistor current versus time after programming fitted very well with a stretched-exponential distribution with a long time constant up to 10$^{6}$ s. For organic CMOS inverter, after applying the program gate voltages for extit{n}-channel fullerene or extit{p}-channel pentacene elements, the voltage transfer characteristics were shifted toward more positive values, resulting in a modulation of the noise margin. We realized that at a program gate voltage of 60,V for extit{p}-channel OFET, the circuit switched at 4, 8,V, that is close to half supply voltage $V_{mathrm{DD}}$, leading to the maximum electrical noise immunity of the inverter circuit.

The field electron emission characteristics of a p-type Si emitter sharpened by a spirally scanned Ga focused-ion-beam milling process were investigated. Saturated Fowler--Nordheim (F--N) plots, which are unique phenomena of p-type semiconductor emitters, were observed. The slight increase of the emission current in the saturated F--N plots region was discussed in terms of the depletion layer width in which electron generation occurs. The temperature dependence of the field electron emission current was also discussed. The activation energy of carrier generation was determined to be 0.26,eV, ascribable to the surface states that accompany the defects introduced by the Ga ion beam. When the emitter was irradiated by a 650-nm-wavelength laser, the increase in the emission current, i.e., the photoexcited emission current, was observed in the saturated region of the F--N plots. The photoexcited emission current was proportional to the laser intensity.

Since most password schemes are vulnerable to login-recording attacks, graphical password schemes that are resistant to such attacks have been proposed. However, none of existing graphical password schemes with resistance to login-recording attacks can provide both sufficient security and good usability. Herein, we design and implement a simple sector-based graphical password scheme, RiS, with dynamically adjustable resistance to login-recording attacks. RiS is a pure graphical password scheme by using the shape of the sector. In RiS, the user can dynamically choose the login mode with suitable resistance to login-recording attacks depending on the login environment. Hence, the user can efficiently complete the login process in an environment under low threat of login-recording attacks and securely complete the login process in an environment under high threat of login-recording attacks. Finally, we show that RiS can achieve both sufficient security and good usability.

We deposited thin films of thiophene/phenylene co-oligomers (TPCOs) onto poly(tetrafluoroethylene) (PTFE) layers that were friction-transferred on substrates. These films were composed of aligned molecules in such a way that their polarizations of emissions and absorbances were larger along the drawing direction than those perpendicular to that direction. Organic field-effect transistors (OFETs) fabricated with these films indicated large mobilities, when the drawing direction of PTFE was parallel to the channel length direction. The friction-transfer technique forms the TPCO films that indicate the anisotropic optical and electronic properties.

The novel ladder-shaped polydiacetylene with a terephthalamide linker in the molecular center, namely poly(TPh-bisDA) was synthesized by photo-polymerization. The characteristics of thin films of polymer were dependent upon a casting solvent, but no significant change of backbone conformation of the PDA was observed. Obtained film is expected to be applied to the semi-conducting materials for organic field effect transistors (OFET).

Recently, array speaker products have received attention in the field of consumer electronics, and control technologies for arrayed speaker units, including beamforming and wave field synthesis (WFS), have been developed for various purposes. An important application of these algorithms is focused source reproduction. The focused source reproduction capability is strongly coupled with the array length. The array length is a very important design factor in consumer products, but it is very short in home entertainment systems, compared with ideal WFS systems or theater speaker systems. Therefore, a well-defined measure for the maximum focusing range is necessary for designing an array speaker product. In this paper, a maximum focusable range measure is proposed and is analyzed by simulation of a small array speaker. The analysis results show that the proposed maximum focusable range has properties strongly related to the capability for focused source reproduction.