A brain-computer interface (BCI) translates the brain activity into commands to control external devices. P300 speller based character recognition is an important kind of application system in BCI. In this paper, we propose a framework to integrate channel correlation analysis into P300 detection. This work is distinguished by two key contributions. First, a coefficient matrix is introduced and constructed for multiple channels with the elements indicating channel correlations. Agglomerative clustering is applied to group correlated channels. Second, the statistics of central tendency are used to fuse the information of correlated channels and generate virtual channels. The generated virtual channels can extend the EEG signals and lift up the signal-to-noise ratio. The correlated features from virtual channels are combined with original signals for classification and the outputs of discriminative classifier are used to determine the characters for spelling. Experimental results prove the effectiveness and efficiency of the channel correlation analysis based framework. Compared with the state-of-the-art, the recognition rate was increased by both 6% with 5 and 10 epochs by the proposed framework.

As three dimensional (3D) discrete wavelet transform (DWT) is widely used for high resolution volumetric data compression, and to further improve the performance of lossless coding, the adaptive directional lifting (ADL) structure based on non-separable 3D DWT with a (5,3) filter is proposed in this paper. The proposed 3D DWT has less lifting steps and better prediction performance compared to the existing separable 3D DWT with fixed filter coefficients. It also has compatibility with the conventional DWT defined by the JPEG2000 international standard. The proposed method shows comparable and better results with the non-separable 3D DWT and separable 3D DWT and it is effective for lossless coding of high resolution volumetric data.

Because accurate position information plays an important role in wireless sensor networks (WSNs), target localization has attracted considerable attention in recent years. In this paper, based on target spatial domain discretion, the target localization problem is formulated as a sparsity-seeking problem that can be solved by the compressed sensing (CS) technique. To satisfy the robust recovery condition called restricted isometry property (RIP) for CS theory requirement, an orthogonalization preprocessing method named LU (lower triangular matrix, unitary matrix) decomposition is utilized to ensure the observation matrix obeys the RIP. In addition, from the viewpoint of the positioning systems, taking advantage of the joint posterior distribution of model parameters that approximate the sparse prior knowledge of target, the sparse Bayesian learning (SBL) approach is utilized to improve the positioning performance. Simulation results illustrate that the proposed algorithm has higher positioning accuracy in multi-target scenarios than existing algorithms.

We propose a low-noise and low-power dynamic comparator with an offset calibration circuit for Low-Power ADCs. The proposed comparator equips the control circuit in order to switching the comparison accuracy and the current consumption. When high accuracy is not required, current consumption is reduced by allowing the noise increase. Compared with a traditional dynamic comparator, the proposed architecture reduced the current consumption to 78% at 100MHz operating and 1.8V supply voltage. Furthermore, the offset voltage is corrected with minimal current consumption by controlling the on/off operation of the offset calibration circuit.

In recent years, the need to build solid state drive (SSD)-based cloud storage systems has been increasing in order to process the big data generated by lots of Internet of Things devices and Internet users. Because these kinds of cloud systems require high performance and reliable storage, the use of flash-based Redundant Array of Independent Disks (RAID) will increase. But in flash-based RAID storage, parity data must be updated with every data write operation, which can more quickly overwhelm SSD's lifespan. To solve this problem, this letter proposes parity data deduplication for OpenStack cloud storage systems using an all flash array. Unlike the traditional data deduplication method, it only removes parity data, which will be stored in the parity disks of the all flash array. Experiments show that the proposed parity data deduplication method can efficiently reduce the number of parity data write operations, compared to the traditional data deduplication method.

The information maximization (Infomax) based on information entropy theory is a class of methods that can be used to blindly separate the sources. Torkkola applied the Infomax criterion to blindly separate the mixtures where the sources have been delayed with respect to each other. Compared to the frequency domain methods, this time domain method has simple adaptation rules and can be easily implemented. However, Torkkola's method works only in the real valued field. In this letter, the Infomax for blind separation of the delayed sources is extended to the complex case for processing of complex valued signals. Firstly, based on the gradient ascent the adaptation rules for the parameters of the unmixing network are derived and the steps of algorithm are given. Then, a measurement matrix is constructed to evaluate the separation performance. The results of computer experiment support the extended algorithm.

Pulse Pairs (PPs) generated by Distance Measure Equipment (DME) cause severe interference on L-band Digital Aeronautical Communication System type 1 (L-DACS1) which is based on Orthogonal Frequency Division Multiplexing (OFDM). In this paper, a novel and practical PP mitigation approach is proposed. Different from previous work, it adopts only time domain methods to mitigate interference, so it will not affect the subsequent signal processing in frequency domain. At the receiver side, the proposed approach can precisely reconstruct the deformed PPs (DPPs) which are often overlapped and have various parameters. Firstly, a filter bank and a correlation scheme are jointly used to detect non-overlapped DPPs, also a weighted average scheme is used to automatically measure the waveform of DPP. Secondly, based on the measured waveform, sparse estimation is used to estimate the precise positions of DPPs. Finally, the parameters of each DPP are estimated by a non-linear estimator. The key point of this step is, a piecewise linear model is used to approximate the non-linear carrier frequency of each DPP. Numerical simulations show that comparing with existing work, the proposed approach is more robust, closer to interference free environment and its Bit Error Rate is reduced by about 10dB.

In this work, the bias polarity dependent resistive switching behaviors in Cu/Si3N4/p+ Si RRAM memory cell have been closely studied. Different switching characteristics in both unipolar and bipolar modes after the positive forming are investigated. The bipolar switching did not need a forming process and showed better characteristics including endurance cycling, uniformity of switching parameters, and on/off resistance ratio. Also, the resistive switching characteristics by both positive and negative forming switching are compared. It has been confirmed that both unipolar and bipolar modes after the negative forming exhibits inferior resistive switching performances due to high forming voltage and current.

This paper presents a parallelization method utilizing dead time to implement higher precision feedback control systems in multicore processors. The feedback control system is known to be difficult to parallelize, and it is difficult to deal with the dead time in control systems. In our method, the dead time is explicitly represented as delay elements. Then, these delay elements are distributed to the overall systems with equivalent transformation so that the system can be simulated or executed in parallel pipeline operation. In addition, we introduce a method of delay-element addition for parallelization. For a spring-mass-damper model with a dead time, parallel execution of the model using our technique achieves 3.4 times performance acceleration compared with its sequential execution on an ideal four-core simulation and 1.8 times on a cycle-accurate simulator of a four-core embedded processor as a threaded application on a real-time operating system.

This work presents an object tracking framework which is based on integration of Deformable Part based Models (DPMs) and Dynamic Conditional Random Fields (DCRF). In this framework, we propose a DCRF based novel way to track an object and its details on multiple resolutions simultaneously. Meanwhile, we tackle drastic variations in target appearance such as pose, view, scale and illumination changes with DPMs. To embed DPMs into DCRF, we design specific temporal potential functions between vertices by explicitly formulating deformation and partial occlusion respectively. Furthermore, temporal transition functions between mixture models bring higher robustness to perspective and pose changes. To evaluate the efficacy of our proposed method, quantitative tests on six challenging video sequences are conducted and the results are analyzed. Experimental results indicate that the method effectively addresses serious problems in object tracking and performs favorably against state-of-the-art trackers.

In this paper, we construct ideal and probabilistic secret sharing schemes for some multipartite access structures, including the General Hierarchical Access Structure and Compartmented Access Structures. We devise an ideal scheme which implements the general hierarchical access structure. For the compartmented access structures, we consider three special access structures. We propose ideal and probabilistic schemes for these three compartmented access structures by bivariate interpolation.

Local spatio-temporal features are popular in the human action recognition task. In practice, they are usually coupled with a feature encoding approach, which helps to obtain the video-level vector representations that can be used in learning and recognition. In this paper, we present an efficient local feature encoding approach, which is called Approximate Sparse Coding (ASC). ASC computes the sparse codes for a large collection of prototype local feature descriptors in the off-line learning phase using Sparse Coding (SC) and look up the nearest prototype's precomputed sparse code for each to-be-encoded local feature in the encoding phase using Approximate Nearest Neighbour (ANN) search. It shares the low dimensionality of SC and the high speed of ANN, which are both desired properties for a local feature encoding approach. ASC has been excessively evaluated on the KTH dataset and the HMDB51 dataset. We confirmed that it is able to encode large quantity of local video features into discriminative low dimensional representations efficiently.

The availability is an important issue of software-defined networking (SDN). In this paper, the experiments based on a SDN testbed showed that the resource utilization of the data plane and control plane changed drastically when DDoS attacks happened. This is mainly because the DDoS attacks send a large number of fake flows to network in a short time. Based on the observation and analysis, a DDoS defense mechanism based on legitimate source and destination IP address database is proposed in this paper. Firstly, each flow is abstracted as a source-destination IP address pair and a legitimate source-destination IP address pair database (LSDIAD) is established by historical normal traffic trace. Then the proportion of new source-destination IP address pair in the traffic per unit time is cumulated by non-parametric cumulative sum (CUSUM) algorithm to detect the DDoS attacks quickly and accurately. Based on the alarm from the non-parametric CUSUM, the attack flows will be filtered and redirected to a middle box network for deep analysis via south-bound API of SDN. An on-line updating policy is adopted to keep the LSDIAD timely and accurate. This mechanism is mainly implemented in the controller and the simulation results show that this mechanism can achieve a good performance in protecting SDN from DDoS attacks.

In this paper, a vehicular antenna design scheme that considers vehicular body effects is proposed. A wire antenna for the global positioning system (GPS) and long-term evolution (LTE) systems is implemented on a plastic plate and then mounted on a windshield of the vehicle. Common outputs are used to allow feed sharing. It is necessary to increase the GPS right-hand circularly polarization (RHCP) gain near the zenith and to reduce the axis ratio (AR). For LTE, we need to increase the horizontal polarization (HP) gain. In addition, for LTE, multiband characteristics are required. In order to achieve the specified performance, the antenna shape is optimized via a Pareto genetic algorithm (PGA). When an antenna is mounted on the body, antenna performance changes significantly. To evaluate the performance of an antenna with complex shape mounted on a windshield, a commercial electromagnetic simulator (Ansoft HFSS) is used. To apply electromagnetic results output by HFSS to the PGA algorithm operating in the MATLAB environment, a MATLAB-to-HFSS linking program via Visual BASIC (VB) script was used. It is difficult to carry out the electromagnetic analysis on the entire body because of the limitations of the calculating load and memory size. To overcome these limitations, we consider only that part of the vehicle's body that influences antenna performance. We show that a series of optimization steps can minimize the degradation caused by the vehicle`s body. The simulation results clearly show that it is well optimized at 1.575GHz for GPS, and 0.74 ∼ 0.79GHz and 2.11 ∼ 2.16GHz for LTE, respectively.

A partitioning parallelization of the multi-objective evolutionary algorithm based on decomposition, pMOEA/D, is proposed in this letter to achieve significant time reductions for expensive bi-objective optimization problems (BOPs) on message-passing clusters. Each sub-population of pMOEA/D resides on a separate processor in a cluster and consists of a non-overlapping partition and some extra overlapping individuals for updating neighbors. Additionally, sub-populations cooperate across separate processors by the hybrid migration of elitist individuals and utopian points. Experimental results on two benchmark BOPs and the wireless sensor network layout problem indicate that pMOEA/D achieves satisfactory performance in terms of speedup and quality of solutions on message-passing clusters.

This paper proposes an algorithm that solves the node-to-set disjoint paths problem in an n-Möbius cube in polynomial-order time of n. It also gives a proof of correctness of the algorithm as well as estimating the time complexity, O(n4), and the maximum path length, 2n-1. A computer experiment is conducted for n=1,2,...,31 to measure the average performance of the algorithm. The results show that the average time complexity is gradually approaching to O(n3) and that the maximum path lengths cannot be attained easily over the range of n in the experiment.

In this study, we propose a simple, yet general and powerful framework of integrating multiple global and local features by Product Sparse Coding (PSC) for image retrieval. In our framework, multiple global and local features are extracted from images and then are transformed to Trimmed-Root (TR)-features. After that, the features are encoded into compact codes by PSC. Finally, a two-stage ranking strategy is proposed for indexing in retrieval. We make three major contributions in this study. First, we propose TR representation of multiple image features and show that the TR representation offers better performance than the original features. Second, the integrated features by PSC is very compact and effective with lower complexity than by the standard sparse coding. Finally, the two-stage ranking strategy can balance the efficiency and memory usage in storage. Experiments demonstrate that our compact image representation is superior to the state-of-the-art alternatives for large-scale image retrieval.

We propose a cooperative spectrum sensing scheme based on sub-Nyquist sampling in cognitive radios. Our main purpose is to understand the uncertainty caused by sub-Nyquist sampling and to present a sensing scheme that operates at low sampling rates. In order to alleviate the aliasing effect of sub-Nyquist sampling, we utilize cooperation among secondary users and the sparsity order of channel occupancy. The simulation results show that the proposed scheme can achieve reasonable sensing performance even at low sampling rates.

Cache memories are the major application of high-speed SRAMs, and they are frequently installed in high performance logic VLSIs including microprocessors. This paper presents a 4-way set-associative, SOI cache-tag memory. To obtain higher operating speed with less power dissipation, we devised an I/O-separated memory cell with a dual-rail wordline, which is used to transmit complementary selection signals. The address decoding delay was shortened using CMOS dual-rail logic. To enhance the maximum operating frequency, bitline's recovery operations after writing data were eliminated using a memory array configuration without half-selected cells. Moreover, conventional, sensitive but slow differential amplifiers were successfully removed from the data I/O circuitry with a hierarchical bitline scheme. As regards the stored data management, we devised a new hardware-oriented LRU-data replacement algorithm on the basis of 6-bit directed graph. With the experimental results obtained with a test chip fabricated with a 0.25-µm CMOS/SIMOX process, the core of the cache-tag memory with a 1024-set configuration can achieve a 1.5-ns address access time under typical conditions of a 2-V power supply and 25°C. The power dissipation during standby was less than 14 µW, and that at the 500-MHz operation was 13-83 mW, depending on the bit-stream data pattern.

The new generation video standard, i.e., High-efficiency Video Coding (HEVC), shows a significantly improved efficiency relative to the last standard, i.e., H.264. However, the quad tree structured coding units (CUs), which are adopted in HEVC to improve compression efficiency, cause high computational complexity. In this study, a novel fast algorithm is proposed for CU partition in intra coding to reduce the computational complexity. A rough minimum depth prediction of the largest CU method and an early termination method for CU partition based on the total coding bits of the current CU are employed. Many approaches have been proposed to reduce the encoding complexity of HEVC, but these methods do not use the total coding bits of the current CU as the main basis for judgment to judge the CU complexity. Compared with the reference software HM16.6, the proposed algorithm reduces encoding time by 45% on average and achieves an approximately 1.1% increase in Bjntegaard delta bit rate and a negligible peak signal-to-noise ratio loss.