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61-80hit(4570hit)

  • Highly-Efficient Low-Latency HARQ Built on NOMA for URLLC: Radio Resource Allocation and Transmission Rate Control Aspects Open Access

    Ryota KOBAYASHI  Yasuaki YUDA  Kenichi HIGUCHI  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2023/05/22
      Vol:
    E106-B No:10
      Page(s):
    1015-1023

    Hybrid automatic repeat request (HARQ) is an essential technology that efficiently reduces the transmission error rate. However, for ultra-reliable low latency communications (URLLC) in the 5th generation mobile communication systems and beyond, the increase in latency due to retransmission must be minimized in HARQ. In this paper, we propose a highly-efficient low-latency HARQ method built on non-orthogonal multiple access (NOMA) for URLLC while minimizing the performance loss for coexisting services (use cases) such as enhanced mobile broadband (eMBB). The proposed method can be seen as an extension of the conventional link-level non-orthogonal HARQ to the system-level protocol. This mitigates the problems of the conventional link-level non-orthogonal HARQ, which are decoding error under poor channel conditions and an increase in transmission delay due to restrictions in retransmission timing. In the proposed method, delay-sensitive URLLC packets are preferentially multiplexed with best-effort eMBB packets in the same channel using superposition coding to reduce the transmission latency of the URLLC packet while alleviating the throughput loss in eMBB. This is achieved using a weighted channel-aware resource allocator (scheduler). The inter-packet interference multiplexed in the same channel is removed using a successive interference canceller (SIC) at the receiver. Furthermore, the transmission rates for the initial transmission and retransmission are controlled in an appropriate manner for each service in order to deal with decoding errors caused by error in transmission rate control originating from a time varying channel. We show that the proposed method significantly improves the overall performance of a system that simultaneously provides eMBB and URLLC services.

  • A Quick Startup Low-Power Hybrid Crystal Oscillator for IoT Applications

    Masaya MIYAHARA  Zule XU  Takehito ISHII  Noritoshi KIMURA  

     
    PAPER

      Pubricized:
    2023/04/13
      Vol:
    E106-C No:10
      Page(s):
    521-528

    In this paper, we propose a hybrid crystal oscillator which achieves both quick startup and low steady-state power consumption. At startup, a large negative resistance is realized by configuring a Pierce oscillating circuit with a multi-stage inverter amplifier, resulting in high-speed startup. During steady-state oscillation, the oscillator is reconfigured as a class-C complementary Colpitts circuit for low power consumption and low phase noise. Prototype chips were fabricated in 65nm CMOS process technology. With Pierce-type configuration, the measured startup time and startup energy of the oscillator are reduced to 1/11 and 1/5, respectively, compared with the one without Pierce-type configuration. The power consumption during steady oscillation is 30 µW.

  • A 58-%-Lock-Range Divide-by-9 Injection-Locked Frequency Divider Using Harmonic-Control Technique

    Sangyeop LEE  Shuhei AMAKAWA  Takeshi YOSHIDA  Minoru FUJISHIMA  

     
    BRIEF PAPER

      Pubricized:
    2023/04/06
      Vol:
    E106-C No:10
      Page(s):
    529-532

    This paper presents a divide-by-9 injection-locked frequency divider (ILFD). It can lock onto about 6-GHz input with a locking range of 3.23GHz (58%). The basic concept of the ILFD is based on employing self-gated multiple inputs into the multiple-stage ring oscillator. A wide lock range is also realized by adapting harmonic-control circuits, which can boost specific harmonics generated by mixing. The ILFD was fabricated using a 55-nm deeply depleted channel (DDC) CMOS process. It occupies an area of 0.0210mm2, and consumes a power of 14.4mW.

  • A 0.6-V 41.3-GHz Power-Scalable Sub-Sampling PLL in 55-nm CMOS DDC

    Sangyeop LEE  Kyoya TAKANO  Shuhei AMAKAWA  Takeshi YOSHIDA  Minoru FUJISHIMA  

     
    BRIEF PAPER

      Pubricized:
    2023/04/06
      Vol:
    E106-C No:10
      Page(s):
    533-537

    A power-scalable sub-sampling phase-locked loop (SSPLL) is proposed for realizing dual-mode operation; high-performance mode with good phase noise and power-saving mode with moderate phase noise. It is the most efficient way to reduce power consumption by lowering the supply voltage. However, there are several issues with the low-supply millimeter-wave (mmW) SSPLL. This work discusses some techniques, such as a back-gate forward body bias (FBB) technique, in addition to employing a CMOS deeply depleted channel process (DDC).

  • Nonvolatile Storage Cells Using FiCC for IoT Processors with Intermittent Operations

    Yuki ABE  Kazutoshi KOBAYASHI  Jun SHIOMI  Hiroyuki OCHI  

     
    PAPER

      Pubricized:
    2023/04/13
      Vol:
    E106-C No:10
      Page(s):
    546-555

    Energy harvesting has been widely investigated as a potential solution to supply power for Internet of Things (IoT) devices. Computing devices must operate intermittently rather than continuously, because harvested energy is unstable and some of IoT applications can be periodic. Therefore, processors for IoT devices with intermittent operation must feature a hibernation mode with zero-standby-power in addition to energy-efficient normal mode. In this paper, we describe the layout design and measurement results of a nonvolatile standard cell memory (NV-SCM) and nonvolatile flip-flops (NV-FF) with a nonvolatile memory using Fishbone-in-Cage Capacitor (FiCC) suitable for IoT processors with intermittent operations. They can be fabricated in any conventional CMOS process without any additional mask. NV-SCM and NV-FF are fabricated in a 180nm CMOS process technology. The area overhead by nonvolatility of a bit cell are 74% in NV-SCM and 29% in NV-FF, respectively. We confirmed full functionality of the NV-SCM and NV-FF. The nonvolatile system using proposed NV-SCM and NV-FF can reduce the energy consumption by 24.3% compared to the volatile system when hibernation/normal operation time ratio is 500 as shown in the simulation.

  • Experimental Exploration of the Backside ESD Impacts on an IC Chip in Flip Chip Packaging

    Takuya WADATSUMI  Kohei KAWAI  Rikuu HASEGAWA  Kikuo MURAMATSU  Hiromu HASEGAWA  Takuya SAWADA  Takahito FUKUSHIMA  Hisashi KONDO  Takuji MIKI  Makoto NAGATA  

     
    PAPER

      Pubricized:
    2023/04/13
      Vol:
    E106-C No:10
      Page(s):
    556-564

    This paper presents on-chip characterization of electrostatic discharge (ESD) impacts applied on the Si-substrate backside of a flip-chip mounted integrated circuit (FC-IC) chip. An FC-IC chip has an open backside and there is a threat of reliability problems and malfunctions caused by the backside ESD. We prepared a test FC-IC chip and measured Si-substrate voltage fluctuations on its frontside by an on-chip monitor (OCM) circuit. The voltage surges as large as 200mV were observed on the frontside when a 200-V ESD gun was irradiated through a 5kΩ contact resistor on the backside of a 350μm thick Si substrate. The distribution of voltage heights was experimentally measured at 20 on-chip locations among thinned Si substrates up to 40μm, and also explained in full-system level simulation of backside ESD impacts with the equivalent models of ESD-gun operation and FC-IC chip assembly.

  • Decentralized Incentive Scheme for Peer-to-Peer Video Streaming using Solana Blockchain

    Yunqi MA  Satoshi FUJITA  

     
    PAPER-Information Network

      Pubricized:
    2023/07/13
      Vol:
    E106-D No:10
      Page(s):
    1686-1693

    Peer-to-peer (P2P) technology has gained popularity as a way to enhance system performance. Nodes in a P2P network work together by providing network resources to one another. In this study, we examine the use of P2P technology for video streaming and develop a distributed incentive mechanism to prevent free-riding. Our proposed solution combines WebTorrent and the Solana blockchain and can be accessed through a web browser. To incentivize uploads, some of the received video chunks are encrypted using AES. Smart contracts on the blockchain are used for third-party verification of uploads and for managing access to the video content. Experimental results on a test network showed that our system can encrypt and decrypt chunks in about 1/40th the time it takes using WebRTC, without affecting the quality of video streaming. Smart contracts were also found to quickly verify uploads in about 860 milliseconds. The paper also explores how to effectively reward virtual points for uploads.

  • Visual Inspection Method for Subway Tunnel Cracks Based on Multi-Kernel Convolution Cascade Enhancement Learning

    Baoxian WANG  Zhihao DONG  Yuzhao WANG  Shoupeng QIN  Zhao TAN  Weigang ZHAO  Wei-Xin REN  Junfang WANG  

     
    PAPER-Image Recognition, Computer Vision

      Pubricized:
    2023/06/27
      Vol:
    E106-D No:10
      Page(s):
    1715-1722

    As a typical surface defect of tunnel lining structures, cracking disease affects the durability of tunnel structures and poses hidden dangers to tunnel driving safety. Factors such as interference from the complex service environment of the tunnel and the low signal-to-noise ratio of the crack targets themselves, have led to existing crack recognition methods based on semantic segmentation being unable to meet actual engineering needs. Based on this, this paper uses the Unet network as the basic framework for crack identification and proposes to construct a multi-kernel convolution cascade enhancement (MKCE) model to achieve accurate detection and identification of crack diseases. First of all, to ensure the performance of crack feature extraction, the model modified the main feature extraction network in the basic framework to ResNet-50 residual network. Compared with the VGG-16 network, this modification can extract richer crack detail features while reducing model parameters. Secondly, considering that the Unet network cannot effectively perceive multi-scale crack features in the skip connection stage, a multi-kernel convolution cascade enhancement module is proposed by combining a cascaded connection of multi-kernel convolution groups and multi-expansion rate dilated convolution groups. This module achieves a comprehensive perception of local details and the global content of tunnel lining cracks. In addition, to better weaken the effect of tunnel background clutter interference, a convolutional block attention calculation module is further introduced after the multi-kernel convolution cascade enhancement module, which effectively reduces the false alarm rate of crack recognition. The algorithm is tested on a large number of subway tunnel crack image datasets. The experimental results show that, compared with other crack recognition algorithms based on deep learning, the method in this paper has achieved the best results in terms of accuracy and intersection over union (IoU) indicators, which verifies the method in this paper has better applicability.

  • Multi-Scale Estimation for Omni-Directional Saliency Maps Using Learnable Equator Bias

    Takao YAMANAKA  Tatsuya SUZUKI  Taiki NOBUTSUNE  Chenjunlin WU  

     
    PAPER-Image Recognition, Computer Vision

      Pubricized:
    2023/07/19
      Vol:
    E106-D No:10
      Page(s):
    1723-1731

    Omni-directional images have been used in wide range of applications including virtual/augmented realities, self-driving cars, robotics simulators, and surveillance systems. For these applications, it would be useful to estimate saliency maps representing probability distributions of gazing points with a head-mounted display, to detect important regions in the omni-directional images. This paper proposes a novel saliency-map estimation model for the omni-directional images by extracting overlapping 2-dimensional (2D) plane images from omni-directional images at various directions and angles of view. While 2D saliency maps tend to have high probability at the center of images (center bias), the high-probability region appears at horizontal directions in omni-directional saliency maps when a head-mounted display is used (equator bias). Therefore, the 2D saliency model with a center-bias layer was fine-tuned with an omni-directional dataset by replacing the center-bias layer to an equator-bias layer conditioned on the elevation angle for the extraction of the 2D plane image. The limited availability of omni-directional images in saliency datasets can be compensated by using the well-established 2D saliency model pretrained by a large number of training images with the ground truth of 2D saliency maps. In addition, this paper proposes a multi-scale estimation method by extracting 2D images in multiple angles of view to detect objects of various sizes with variable receptive fields. The saliency maps estimated from the multiple angles of view were integrated by using pixel-wise attention weights calculated in an integration layer for weighting the optimal scale to each object. The proposed method was evaluated using a publicly available dataset with evaluation metrics for omni-directional saliency maps. It was confirmed that the accuracy of the saliency maps was improved by the proposed method.

  • Fault-Tolerant Aggregate Signature Schemes against Bandwidth Consumption Attack

    Kyosuke YAMASHITA  Ryu ISHII  Yusuke SAKAI  Tadanori TERUYA  Takahiro MATSUDA  Goichiro HANAOKA  Kanta MATSUURA  Tsutomu MATSUMOTO  

     
    PAPER-Cryptography and Information Security

      Pubricized:
    2023/04/03
      Vol:
    E106-A No:9
      Page(s):
    1177-1188

    A fault-tolerant aggregate signature (FT-AS) scheme is a variant of an aggregate signature scheme with the additional functionality to trace signers that create invalid signatures in case an aggregate signature is invalid. Several FT-AS schemes have been proposed so far, and some of them trace such rogue signers in multi-rounds, i.e., the setting where the signers repeatedly send their individual signatures. However, it has been overlooked that there exists a potential attack on the efficiency of bandwidth consumption in a multi-round FT-AS scheme. Since one of the merits of aggregate signature schemes is the efficiency of bandwidth consumption, such an attack might be critical for multi-round FT-AS schemes. In this paper, we propose a new multi-round FT-AS scheme that is tolerant of such an attack. We implement our scheme and experimentally show that it is more efficient than the existing multi-round FT-AS scheme if rogue signers randomly create invalid signatures with low probability, which for example captures spontaneous failures of devices in IoT systems.

  • Adaptive Channel Scheduling for Acceleration and Fine Control of RNN-Based Image Compression

    Sang Hoon KIM  Jong Hwan KO  

     
    LETTER-Image

      Pubricized:
    2023/06/13
      Vol:
    E106-A No:9
      Page(s):
    1211-1215

    The existing target-dependent scalable image compression network can control the target of the compressed images between the human visual system and the deep learning based classification task. However, in its RNN based structure controls the bit-rate through the number of iterations, where each iteration generates a fixed size of the bit stream. Therefore, a large number of iterations are required at the high BPP, and fine-grained image quality control is not supported at the low BPP. In this paper, we propose a novel RNN-based image compression model that can schedule the channel size per iteration, to reduce the number of iterations at the high BPP and fine-grained bit-rate control at the low BPP. To further enhance the efficiency, multiple network models for various channel sizes are combined into a single model using the slimmable network architecture. The experimental results show that the proposed method achieves comparable performance to the existing method with finer BPP adjustment, increases parameters by only 0.15% and reduces the average amount of computation by 40.4%.

  • Design and Analysis of Piecewise Nonlinear Oscillators with Circular-Type Limit Cycles

    Tatsuya KAI  Koshi MAEHARA  

     
    PAPER-Nonlinear Problems

      Pubricized:
    2023/03/20
      Vol:
    E106-A No:9
      Page(s):
    1234-1240

    This paper develops a design method and theoretical analysis for piecewise nonlinear oscillators that have desired circular limit cycles. Especially, the mathematical proof on existence, uniqueness, and stability of the limit cycle is shown for the piecewise nonlinear oscillator. In addition, the relationship between parameters in the oscillator and rotational directions and periods of the limit cycle trajectories is investigated. Then, some numerical simulations show that the piecewise nonlinear oscillator has a unique and stable limit cycle and the properties on rotational directions and periods hold.

  • Uplink Postcoding in User-Cluster-Centric Cell-Free Massive MIMO

    Ryo TAKAHASHI  Hidenori MATSUO  Sijie XIA  Qiang CHEN  Fumiyuki ADACHI  

     
    PAPER

      Pubricized:
    2023/03/08
      Vol:
    E106-B No:9
      Page(s):
    748-757

    Cell-free massive MIMO (CF-mMIMO), which cooperatively utilizes a large number of antennas deployed over a communication area, has been attracting great attention as an important technology for realizing 5G-advanced and 6G systems. Recently, to ensure system scalability and mitigate inter-user interference in CF-mMIMO, a user-centric (UC) approach was investigated. In this UC approach, user-centric antenna-sets are formed by selecting appropriate antennas for each user, and postcoding is applied to reduce the strong interference from users whose antenna-sets overlap. However, in very high user density environments, since the number of interfering users increases due to increased overlapping of antenna-sets, the achievable link capacity may degrade. In this paper, we propose a user-cluster-centric (UCC) approach, which groups neighborhood users into a user-cluster and associates the predetermined number of antennas to this user-cluster for spatial multiplexing. We derive the uplink postcoding weights and explain the effectiveness of the proposed UCC approach in terms of the computational complexity of the weight computation. We also compare the uplink user capacities achievable with UC and UCC approaches by computer simulation and clarify situations where the UCC approach is effective. Furthermore, we discuss the impact of the number of interfering users considered in the zero-forcing and minimum mean square error postcoding weight computation on the user capacity.

  • A 2-D Beam Scanning Array Antenna Fed by a Compact 16-Way 2-D Beamforming Network in Broadside Coupled Stripline

    Jean TEMGA  Tomoyuki FURUICHI  Takashi SHIBA  Noriharu SUEMATSU  

     
    PAPER

      Pubricized:
    2023/03/28
      Vol:
    E106-B No:9
      Page(s):
    768-777

    A 2-D beam scanning array antenna fed by a compact 16-way 2-D beamforming network (BFN) designed in Broadside Coupled Stripline (BCS) is addressed. The proposed 16-way 2-D BFN is formed by interconnecting two groups of 4x4 Butler Matrix (BM). Each group is composed of four compact 4x4 BMs. The critical point of the design is to propose a simple and compact 4x4 BM without crossover in BCS to achieve a better transmission coefficient of the 16-way 2-D BFN with reduced size of merely 0.8λ0×0.8λ0×0.04λ0. Moreover, the complexity of the interface connection between the 2-D BFN and the 4x4 patch array antenna is reduced by using probe feeding. The 16-way 2-D BFN is able to produce the phase shift of ±45°, and ±135° in x- and y- directions. The 2-D BFN is easily integrated under the 4x4 patch array to form a 2-D phased array capable of switching 16 beams in both elevation and azimuth directions. The area of the proposed 2-D beam scanning array antenna module has been significantly reduced to 2λ0×2λ0×0.04λ0. A prototype operating in the frequency range of 4-6GHz is fabricated and measured to validate the concept. The measurement results agree well with the simulations.

  • User Scheduling at Base Station Cluster Boundary for Massive MIMO Downlink Transmission

    Masahito YATA  Yukitoshi SANADA  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2023/03/08
      Vol:
    E106-B No:9
      Page(s):
    837-843

    One of the key technologies for the fifth-generation (5G) mobile communication system is massive multiple-input multiple-output (MIMO) that applies beamforming in order to effectively compensate for large propagation losses in high frequency bands and enable the spatial multiplexing of a large number of signal streams over multiple users. To further improve a system throughput, a coordinated cluster system in which a large number of massive MIMO base stations are deployed in high density has been investigated. The dense deployment greatly improves the system capacity by controlling base stations from a centralized base band unit. However, when clusters are closely located in order to serve densely populated areas, inter-beam interference between adjacent clusters becomes more severe. To suppress the interference to adjacent clusters, only a simple beam switch control scheme at a cluster boundary has been investigated as a conventional scheme. In this paper, the scheduling algorithm for massive MIMO downlink transmission near cluster boundaries, which combines two scheduling algorithms, has been proposed. In the proposed scheme, each base station divides its own cell to multiple areas, switches supporting areas sequentially, and serves users in those areas. The numerical results show that the throughputs improve with a little reduction in a fairness index (FI) when the number of users per resource block is one. The FI reaches the highest when the number of users per cell is equal to the number of divided areas. The proposed scheme reduces computational complexity as compared with those of conventional two schemes.

  • A Novel Displacement Sensor Based on a Frequency Delta-Sigma Modulator and its Application to a Stylus Surface Profiler

    Koichi MAEZAWA  Umer FAROOQ  Masayuki MORI  

     
    BRIEF PAPER-Electronic Circuits

      Pubricized:
    2023/03/16
      Vol:
    E106-C No:9
      Page(s):
    486-490

    A novel displacement sensor was proposed based on a frequency delta-sigma modulator (FDSM) employing a microwave oscillator. To demonstrate basic operation, we fabricated a stylus surface profiler using a cylindrical cavity resonator, where one end of the cavity is replaced by a thin metal diaphragm with a stylus probe tip. Good surface profile was successfully obtained with this device. A 10 nm depth trench was clearly observed together with a 10 µm trench in a single scan without gain control. This result clearly demonstrates an extremely wide dynamic range of the FDSM displacement sensors.

  • Compact and Efficient Constant-Time GCD and Modular Inversion with Short-Iteration

    Yaoan JIN  Atsuko MIYAJI  

     
    PAPER

      Pubricized:
    2023/07/13
      Vol:
    E106-D No:9
      Page(s):
    1397-1406

    Theoretically secure cryptosystems, digital signatures may not be secure after being implemented on Internet of Things (IoT) devices and PCs because of side-channel attacks (SCA). Because RSA key generation and ECDSA require GCD computations or modular inversions, which are often computed using the binary Euclidean algorithm (BEA) or binary extended Euclidean algorithm (BEEA), the SCA weaknesses of BEA and BEEA become a serious concern. Constant-time GCD (CT-GCD) and constant-time modular inversion (CTMI) algorithms are effective countermeasures in such situations. Modular inversion based on Fermat's little theorem (FLT) can work in constant time, but it is not efficient for general inputs. Two CTMI algorithms, named BOS and BY in this paper, were proposed by Bos, Bernstein and Yang, respectively. Their algorithms are all based on the concept of BEA. However, one iteration of BOS has complicated computations, and BY requires more iterations. A small number of iterations and simple computations during one iteration are good characteristics of a constant-time algorithm. Based on this view, this study proposes new short-iteration CT-GCD and CTMI algorithms over Fp borrowing a simple concept from BEA. Our algorithms are evaluated from a theoretical perspective. Compared with BOS, BY, and the improved version of BY, our short-iteration algorithms are experimentally demonstrated to be faster.

  • On Gradient Descent Training Under Data Augmentation with On-Line Noisy Copies

    Katsuyuki HAGIWARA  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2023/06/12
      Vol:
    E106-D No:9
      Page(s):
    1537-1545

    In machine learning, data augmentation (DA) is a technique for improving the generalization performance of models. In this paper, we mainly consider gradient descent of linear regression under DA using noisy copies of datasets, in which noise is injected into inputs. We analyze the situation where noisy copies are newly generated and injected into inputs at each epoch, i.e., the case of using on-line noisy copies. Therefore, this article can also be viewed as an analysis on a method using noise injection into a training process by DA. We considered the training process under three training situations which are the full-batch training under the sum of squared errors, and full-batch and mini-batch training under the mean squared error. We showed that, in all cases, training for DA with on-line copies is approximately equivalent to the l2 regularization training for which variance of injected noise is important, whereas the number of copies is not. Moreover, we showed that DA with on-line copies apparently leads to an increase of learning rate in full-batch condition under the sum of squared errors and the mini-batch condition under the mean squared error. The apparent increase in learning rate and regularization effect can be attributed to the original input and additive noise in noisy copies, respectively. These results are confirmed in a numerical experiment in which we found that our result can be applied to usual off-line DA in an under-parameterization scenario and can not in an over-parametrization scenario. Moreover, we experimentally investigated the training process of neural networks under DA with off-line noisy copies and found that our analysis on linear regression can be qualitatively applied to neural networks.

  • LFWS: Long-Operation First Warp Scheduling Algorithm to Effectively Hide the Latency for GPUs

    Song LIU  Jie MA  Chenyu ZHAO  Xinhe WAN  Weiguo WU  

     
    PAPER-Algorithms and Data Structures

      Pubricized:
    2023/02/10
      Vol:
    E106-A No:8
      Page(s):
    1043-1050

    GPUs have become the dominant computing units to meet the need of high performance in various computational fields. But the long operation latency causes the underutilization of on-chip computing resources, resulting in performance degradation when running parallel tasks on GPUs. A good warp scheduling strategy is an effective solution to hide latency and improve resource utilization. However, most current warp scheduling algorithms on GPUs ignore the ability of long operations to hide latency. In this paper, we propose a long-operation-first warp scheduling algorithm, LFWS, for GPU platforms. The LFWS filters warps in the ready state to a ready queue and updates the queue in time according to changes in the status of the warp. The LFWS divides the warps in the ready queue into long and short operation groups based on the type of operations in their instruction buffers, and it gives higher priority to the long-operating warp in the ready queue. This can effectively use the long operations to hide some of the latency from each other and enhance the system's ability to hide the latency. To verify the effectiveness of the LFWS, we implement the LFWS algorithm on a simulation platform GPGPU-Sim. Experiments are conducted over various CUDA applications to evaluate the performance of LFWS algorithm, compared with other five warp scheduling algorithms. The results show that the LFWS algorithm achieves an average performance improvement of 8.01% and 5.09%, respectively, over three traditional and two novel warp scheduling algorithms, effectively improving computational resource utilization on GPU.

  • An Integrated Convolutional Neural Network with a Fusion Attention Mechanism for Acoustic Scene Classification

    Pengxu JIANG  Yue XIE  Cairong ZOU  Li ZHAO  Qingyun WANG  

     
    LETTER-Engineering Acoustics

      Pubricized:
    2023/02/06
      Vol:
    E106-A No:8
      Page(s):
    1057-1061

    In human-computer interaction, acoustic scene classification (ASC) is one of the relevant research domains. In real life, the recorded audio may include a lot of noise and quiet clips, making it hard for earlier ASC-based research to isolate the crucial scene information in sound. Furthermore, scene information may be scattered across numerous audio frames; hence, selecting scene-related frames is crucial for ASC. In this context, an integrated convolutional neural network with a fusion attention mechanism (ICNN-FA) is proposed for ASC. Firstly, segmented mel-spectrograms as the input of ICNN can assist the model in learning the short-term time-frequency correlation information. Then, the designed ICNN model is employed to learn these segment-level features. In addition, the proposed global attention layer may gather global information by integrating these segment features. Finally, the developed fusion attention layer is utilized to fuse all segment-level features while the classifier classifies various situations. Experimental findings using ASC datasets from DCASE 2018 and 2019 indicate the efficacy of the suggested method.

61-80hit(4570hit)