Active Shape Model (ASM) is a powerful statistical tool for image interpretation, especially in face alignment. In the standard ASM, local appearances are described by intensity profiles, and the model parameter estimation is based on the assumption that the profiles follow a Gaussian distribution. It suffers from variations of poses, illumination, expressions and obstacles. In this paper, an improved ASM framework, GentleBoost based SIFT-ASM is proposed. Local appearances of landmarks are originally represented by SIFT (Scale-Invariant Feature Transform) descriptors, which are gradient orientation histograms based representations of image neighborhood. They can provide more robust and accurate guidance for search than grey-level profiles. Moreover, GentleBoost classifiers are applied to model and search the SIFT features instead of the unnecessary assumption of Gaussian distribution. Experimental results show that SIFT-ASM significantly outperforms the original ASM in aligning and localizing facial features.

Multitude parameters in the design process of a reconfigurable instruction-set processor (RISP) may lead to a large design space and remarkable complexity. Quantitative design approach uses the data collected from applications to satisfy design constraints and optimize the design goals while considering the applications' characteristics; however it highly depends on designer observations and analyses. Exploring design space can be considered as an effective technique to find a proper balance among various design parameters. Indeed, this approach would be computationally expensive when the performance evaluation of the design points is accomplished based on the synthesis-and-simulation technique. A combined analytical and simulation-based model (CAnSO**) is proposed and validated for performance evaluation of a typical RISP. The proposed model consists of an analytical core that incorporates statistics collected from cycle-accurate simulation to make a reasonable evaluation and provide a valuable insight. CAnSO has clear speed advantages and therefore it can be used for easing a cumbersome design space exploration of a reconfigurable RISP processor and quick performance evaluation of slightly modified architectures.

As device feature size decreases, interconnection delay becomes the dominating factor of circuit total delay. Distributed-register architectures can reduce the influence of interconnection delay. They may, however, increase circuit area because they require many local registers. Moreover original distributed-register architectures do not consider control signal delay, which may be the bottleneck in a circuit. In this paper, we propose a high-level synthesis method targeting generalized distributed-register architecture in which we introduce shared/local registers and global/local controllers. Our method is based on iterative improvement of scheduling/binding and floorplanning. First, we prepare shared-register groups with global controllers, each of which corresponds to a single functional unit. As iterations proceed, we use local registers and local controllers for functional units on a critical path. Shared-register groups physically located close to each other are merged into a single group. Accordingly, global controllers are merged. Finally, our method obtains a generalized distributed-register architecture where its scheduling/binding as well as floorplanning are simultaneously optimized. Experimental results show that the area is decreased by 4.7% while maintaining the performance of the circuit equal with that using original distributed-register architectures.

Many signal processing systems, particularly in the multimedia and telecommunication domains, are synthesized to execute data-intensive applications: their cost related aspects -- namely power consumption and chip area -- are heavily influenced, if not dominated, by the data access and storage aspects. This paper presents an energy-aware memory allocation methodology. Starting from the high-level behavioral specification of a given application, this framework performs the assignment of the multidimensional signals to the memory layers -- the on-chip scratch-pad memory and the off-chip main memory -- the goal being the reduction of the dynamic energy consumption in the memory subsystem. Based on the assignment results, the framework subsequently performs the mapping of signals into both memory layers such that the overall amount of data storage be reduced. This software system yields a complete allocation solution: the exact storage amount on each memory layer, the mapping functions that determine the exact locations for any array element (scalar signal) in the specification, and an estimation of the dynamic energy consumption in the memory subsystem.

Shorts and opens are two major kind of defects that are most likely to occur in Very Large Scale Integrated Circuits. In modern Integrated Circuit devices these defects must be considered not only at gate-level but also at transistor level. In this paper, we propose a method for generating test vectors that targets both transistor shorts (tr-shorts) and transistor opens (tr-opens). Since two consecutive test vectors need to be applied in order to detect tr-opens, we assume launch on capture (LOC) test application mechanism. This makes it possible to detect delay type defects. Further, the proposed method employs existing stuck-at test generation tools thus requiring no change in the design and development flow and development of no new tools is needed. Experimental results for benchmark circuits demonstrate the effectiveness of the proposed method by providing 100% fault efficiency while the test set size is still moderate.

The researches on predicting and removing of lithographic hot-spots have been prevalent in recent semiconductor industries, and known to be one of the most difficult challenges to achieve high quality detection coverage. To provide physical design implementation with designer's favors on fixing hot-spots, in this paper, we present a noble and accurate hot-spot detection method, so-called "leveling and scoring" algorithm based on weighted combination of image quality parameters (i.e., normalized image log-slope (NILS), mask error enhancement factor (MEEF), and depth of focus (DOF)) from lithography simulation. In our algorithm, firstly, hot-spot scoring function considering severity level is calibrated with process window qualification, and then least-square regression method is used to calibrate weighting coefficients for each image quality parameter. In this way, after we obtain the scoring function with wafer results, our method can be applied to future designs of using the same process. Using this calibrated scoring function, we can successfully generate fixing guidance and rule to detect hot-spot area by locating edge bias value which leads to a hot-spot-free score level. Finally, we integrate the hot-spot fixing guidance information into layout editor to facilitate the user-favorable design environment. Applying our method to memory devices of 60 nm node and below, we could successfully attain sufficient process window margin to yield high mass production.

In this paper, we propose a calculation method of gate delay for SSTA (Statistical Static Timing Analysis) considering MIS (Multiple Input Switching). In SSTA, statistical maximum/minimum operation is necessary to calculate the latest/fastest arrival time of multiple input gate. Most SSTA approaches calculate the distribution in the latest/fastest arrival time under SIS (Single Input Switching assumption), resulting in ignoring the effect of MIS on the gate delay and the output transition time. MIS occurs when multiple inputs of a gate switch nearly simultaneously. Thus, ignoring MIS causes error in the statistical maximum/minimum operation in SSTA. We propose a statistical gate delay model considering MIS. We verify the proposed method by SPICE based Monte Carlo simulations. Experimental results show that the neglect of MIS effect leads to 80% error in worst case. The error of the proposed method is less than 20%.

This paper presents a novel method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the topology library is abstracted from the individual Pareto-fronts of topologies in the library followed by the theorem we proved. The best solution which is defined as the nearest point to specification on the Pareto-front of the topology library is then calculated by the equations derived from collinearity theorem. After the local searching using Nelder-Mead method maps the calculated best solution backs to design variable space, the non-dominated best solution is obtained. Comparing to the traditional optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or variant multi-dimensional specifications.

In deep-submicron technology, several state-of-the-art architectural synthesis flows have already adopted the distributed register architecture to cope with the increasing wire delay by allowing multicycle communication. In this article, we regard communication synthesis targeting a refined regular distributed register architecture, named RDR-GRS, as a problem of simultaneous data transfer routing and scheduling for global interconnect resource minimization. We also present an innovative algorithm with regard of both spatial and temporal perspectives. It features both a concentration-oriented path router gathering wire-sharable data transfers and a channel-based time scheduler resolving contentions for wires in a channel, which are in spatial and temporal domain, respectively. The experimental results show that the proposed algorithm can significantly outperform existing related works.

Carbon nanofibers (CNFs) were fabricated on graphite plates using "Ar+ ion sputtering method" in large amount at room temperature. The morphology of CNFs was controlled by a simultaneous carbon supply during ion sputtering. CNF-tipped cones were formed on graphite plate surfaces without carbon supply whereas those with a simultaneous carbon supply featured mainly needle-like protrusions of large size. The field electron emission (FE) properties, measured using parallel plate configurations in 10-4 Pa range, showed the threshold fields of 4.4 and 5.2 V/µm with a current density of 1 µA/cm2 for CNF-tipped cones and needle-like protrusion, respectively. Reliability test results indicated that CNF-tipped cones were more stable than needle-like protrusion. The morphological change after reliability test showed a so-called "self-regenerative" process and structure damage for CNF-tipped cones and needle-like protrusions, respectively.

Toponyms and other named entities are main issues in unknown word processing problem. Our purpose is to salvage unknown toponyms, not only for avoiding noises but also providing them information of area candidates to where they may belong. Most of previous toponym resolution methods were targeting disambiguation among area candidates, which is caused by the multiple existence of a toponym. These approaches were mostly based on gazetteers and contexts. When it comes to the documents which may contain toponyms worldwide, like newspaper articles, toponym resolution is not just an ambiguity resolution, but an area candidate selection from all the areas on Earth. Thus we propose an automatic toponym resolution method which enables to identify its area candidates based only on their surface statistics, in place of dictionary-lookup approaches. Our method combines two modules, area candidate reduction and area candidate examination which uses block-unit data, to obtain high accuracy without reducing recall rate. Our empirical result showed 85.54% precision rate, 91.92% recall rate and .89 F-measure value on average. This method is a flexible and robust approach for toponym resolution targeting unrestricted number of areas.

One fast inter mode decision algorithm is proposed in this paper. The whole algorithm is divided into two stages. In the pre-stage, by exploiting spatial and temporal information of encoded macrobocks (MBs), a skip mode early detection scheme is proposed. The homogeneity of current MB is also analyzed to filter out small inter modes in this stage. Secondly, during the block matching stage, a motion feature based inter mode decision scheme is introduced by analyzing the motion vector predictor's accuracy, the block overlapping situation and the smoothness of SAD (sum of absolute difference) value. Moreover, the rate distortion cost is checked in an early stage and we set some constraints to speed up the whole decision flow. Experiments show that our algorithm can achieve a speed up factor of up to 53.4% for sequences with different motion type. The overall bit increment and quality degradation is negligible compared with existing works.

In this paper, we propose a novel method for gathering sensing information by using an orthogonal narrowband signal for cooperative sensing in cognitive radio. It is desirable to improve the spectrum sensing performance by countering the locality effect of a wireless channel; cooperative sensing by using multiple inputs of sensing information from the surrounding sensing nodes has attracted attention. Cooperative sensing requires that sensing information be gathered at the master node for determining the existence of a primary signal. If the used information gathering method leads to redundancies, the total capacity of the secondary networks is not improved. In this paper, we propose a novel method for gathering sensing information that maps the sensing information to the orthogonal narrowband signal to achieve simultaneous sensing information gathering at the master node. In this method, the sensing information is mapped to an orthogonal subcarrier signal of an orthogonal frequency division multiplexing (OFDM) structure to reduce the frequency resource required for sensing information gathering. The orthogonal signals are transmitted simultaneously from multiple sensing nodes. This paper evaluates the performance of the proposed information gathering method and confirms its effectiveness.

This paper presents the performance of DSTBC when applied on the downlink transmission of WCDMA cellular systems in fast-varying time-dispersive channels. First, three DSTBC-WCDMA receiver architectures are proposed and they are: (1) the DSTBC Rake receiver for combined-code (D-Rake-C), (2) the DSTBC deterministic receiver for combined-code (D-Det-C), and (3) the DSTBC deterministic de-prefix receiver for combined-code (D-Det-DP-C). Detection can be divided into a correlator that combines descrambling and despreading, and a DSTBC decoder. The correlator is designed to perform signal separation of the multipath-multiuser signal via least-square (LS) estimation. To enable the correlator to perform signal separation at every block period, the long combined spreading and scrambling codes are divided into shorter codes. Then, the proposed receivers are theoretically analyzed in time-dispersive channels and multiple-user environment using the moment generating function (MGF) of fading distributions. For analyzing interference tolerance, the standard Gaussian approximation is employed. Finally, simulations are performed. Theoretical performance well matches simulated results. Among the three receivers, the D-Det-DP-C receiver has the best performance in time-dispersive channels with a maximum excess delay of 4 chips and a maximum Doppler frequency of 250 Hz. Results also show minimal performance degradation for fast fading channels with a maximum Doppler frequency of 1200 Hz. The best performance is obtained when the receiver has the information on the maximum excess delay and all users' spreading codes.

The optimization of polarimetric contrast enhancement (OPCE) is a widely used method for maximizing the received power ratio of a desired target versus an undesired target (clutter). In this letter, a new model of the OPCE is proposed based on the Fisher criterion. By introducing the well known two-class problem of linear discriminant analysis (LDA), the proposed model is to enlarge the normalized distance of mean value between the target and the clutter. In addition, a cross-iterative numerical method is proposed for solving the optimization with a quadratic constraint. Experimental results with the polarimetric SAR (POLSAR) data demonstrate the effectiveness of the proposed method.

This paper reviews applications of fuzzy logic to telecommunications and proposes a novel fuzzy combining scheme for cooperative spectrum sensing in cognitive radio systems. A summary of previous applications of fuzzy logic to telecommunications is given outlining also potential applications of fuzzy logic in future cognitive radio systems. In complex and dynamic operational environments, future cognitive radio systems will need sophisticated decision making and environment awareness techniques that are capable of handling multidimensional, conflicting and usually non-predictable decision making problems where optimal solutions can not be necessarily found. The results indicate that fuzzy logic can be used in cooperative spectrum sensing to provide additional flexibility to existing combining methods.

The synthesis of single- and double-wall carbon nanotubes by gas flow-modified, catalyst-supported chemical vapor deposition (CCVD) is reported. We have investigated the gas flow condition dependence on the synthesis of carbon nanotubes (CNTs) by placing blocks in the CCVD reactor. Carbon nanotubes having large diameters are preferentially grown under turbulent flow conditions. This indicates that the diameter distribution of CNTs can be controlled by modification of the gas flow condition in the CCVD.

Interface state density was estimated from diode factor n of SiC MIS Schottky diode. The interface state density was the order of 1012 cm-2eV-1, and was same order to the value for the sample carefully prepared by oxidation and post oxidation annealing. The interface state density determined from n was consistent to the value calculated from the capacitance voltage curve of SiO2/nitride/SiC MIS diode by Terman method. High temperature nitridation was effective to reduce the interface state density.

Alumina supported cobalt-ferrum catalysts were prepared using wet impregnation method by applying 3 different conditions, namely hotplate (A), sonication (B) and soaking (C). The alumina supported cobalt-ferrum catalysts were applied in the synthesis of multi-walled carbon nanotubes (MWNTs) using catalytic chemical vapour deposition (CCVD) technique. The morphology and particle size of the cobalt-ferrum catalysts and the MWNTs yield were examined by field emission-scanning electron microscopy (FE-SEM) while the surface elemental composition of the samples was obtained by energy dispersive X-ray analysis (EDX). The morphology of catalysts A, B and C were found to be different, the particle sizes were ranged from 20-40 nm. The diameters of the MWNTs yield from samples A, B and C were found to be related to the catalyst particle size, thus the smaller the catalyst particle, the thinner the MWNTs obtained. The MWNTs with smaller diameter were obtained with higher purity and quality becuase the nanotube surface are free from amorphous carbon. Therefore, different catalyst preparation methods resulted in different sizes of the catalyst particle in order to synthesize MWNTs with desired diameter.

In this paper, a novel decentralised dynamic sub-carrier assignment (DSA) algorithm for orthogonal frequency division multiple access (OFDMA)-based adhoc and cellular networks operating in time division duplexing (TDD) mode is proposed to solve the hidden and exposed node problem in media access control (MAC). This method reduces the co-channel interference (CCI), and thus increases the overall throughput of the network. Reduced CCI and increased throughput can be achieved, if time and frequency selectivity of the multi-path fading channel and the channel reciprocity offered by the TDD are fully exploited. The time and frequency selectivity of the channel are usually the main problem in mobile communication. However, in the context of channel assignment for OFDMA-based networks in TDD mode, the time and frequency selectivity of the channel are the key to reduce the interference. In the proposed channel assignment mechanism, several clusters of sub-carriers are assigned for data transmission between a transmitter and a receiver only if the corresponding channels of those sub-carriers linking this transmitter to potential victim receivers are deeply faded. In addition, the proposed algorithm works in a fully decentralised fashion and, therefore, it is able to effectively support ad hoc and multihop communication as well as network self-organisation. Numerical results show that the throughput obtained by the proposed approach for a given quality of service is higher than those of the conventional methods in any precondition of adhoc geographic scenario.