This paper proposes a novel reversible image authentication method that does not memorize the parameters for extracting embedded authentication data from an image. The proposed method once distorts an image to hide data for authentication into the image, it recovers the original image from the distorted image unless tamper is applied to the image, i.e., reversible. By comparing extracted data and data generated from the restored image, this method detects image tampering and further localizes tampered regions by the unit of block. The proposed method extracts hidden data without memorization of parameters used in its algorithm. This feature makes the proposed method practical. Whereas any method memorizing parameters faces severe problems with storage and management of parameters, according to the increase in the number of memorized parameters that is caused by serving accurate tamper localization and/or by applying itself to a huge number of image collection, e.g., video sequences. Simulation results show the effectiveness of the proposed method.

Decision diagrams (DDs) are data structures commonly used for representation of discrete functions with large number of variables. Binary DDs (BDDs) are used for representation and manipulation with Boolean functions. Complexity of a BDD is usually measured by its size, that is defined as the number of non-terminal nodes in the BDD. Minimization of the sizes of DDs is a problem greatly considered in literature and many related algorithms (exact and heuristic) have been proposed. However, there are many functions for which BDDs when minimized are still large and can have even an exponential size in the number of variables. An approach to derive compact decision diagram representations for such functions is transformation of BDDs into Multi-valued DDs (MDDs) and Heterogeneous MDDs (HMDDs). Complexity of MDDs and HMDDs is measured by the cost which is a generalization of the notion of the size by taking into account complexity of nodes in MDDs and HMDDs. This paper presents a method for transformation of BDD into HMDD with minimal cost. The proposed method reduces the time for determination of the type of nodes in HMDDs by introducing a matrix expressing dependency (interconnections) among nodes at different levels. Comparing to other methods for conversion of BDDs into HMDDs, the method reduces the number of traverses of a BDD necessary for collecting enough information to construct an equivalent HMDD. For an experimental verification of its efficiency, the method is applied to construction of HMDDs for some benchmark functions and their arithmetic and Walsh spectra.

In conjunction with a first-order Taylor series approximation of the spatial scanning vector, this letter presents an iterative multiple signal classification (MUSIC) direction-of-arrival (DOA) estimation for code-division multiple access signals. This approach leads to a simple one-dimensional optimization problem to find each iterative optimal search grid. It can not only accurately estimate DOA, but also speed up the estimating process. Computer results demonstrate the effectiveness of the proposed algorithm.

This letter proposes a new retransmission persistence management scheme for selective repeat automatic repeat request (SR-ARQ). By considering the overall traffic load that has to be managed by SR-ARQ, the proposed scheme arbitrates the retransmission persistence to prevent an abrupt delay increment due to excessive link-level local retransmissions. OPNET simulations show that SR-ARQ performs better with the proposed scheme than with a fixed value of retransmission persistence in terms of the throughput of transmission control protocol (TCP).

Scanning packet payload at a high speed has become a crucial task in modern network management due to its wide variety applications on network security and application-specific services. Traditionally, Deterministic finite automatons (DFAs) are used to perform this operation in linear time. However, the memory requirements of DFAs are prohibitively high for patterns used in practical packet scanning, especially when many patterns are compiled into a single DFA. Existing solutions for memory blow-up are making a trade-off between memory requirement and memory access of processing per input character. In this paper we proposed a novel method to drastically reduce the memory requirements of DFAs while still maintain the high matching speed and provide worst-case guarantees. We removed the duplicate transitions between states by dividing all the DFA states into a number of groups and making each group of states share a merged transition table. We also proposed an efficient algorithm for transition sharing between states. The high efficiency in time and space made our approach adapted to frequently updated DFAs. We performed several experiments on real world rule sets. Overall, for all rule sets and approach evaluated, our approach offers the best memory versus run-time trade-offs.

The ratio of two probability densities is called the importance and its estimation has gathered a great deal of attention these days since the importance can be used for various data processing purposes. In this paper, we propose a new importance estimation method using Gaussian mixture models (GMMs). Our method is an extention of the Kullback-Leibler importance estimation procedure (KLIEP), an importance estimation method using linear or kernel models. An advantage of GMMs is that covariance matrices can also be learned through an expectation-maximization procedure, so the proposed method--which we call the Gaussian mixture KLIEP (GM-KLIEP)--is expected to work well when the true importance function has high correlation. Through experiments, we show the validity of the proposed approach.

This paper describes the application techniques of the latency insertion method (LIM) to CMOS circuit simulations. Though the existing LIM algorithm to CMOS circuit performs fast transient analysis, CMOS circuits are not modeled accurately. As a result, they do not provide accurate simulations. We propose a more accurate LIM scheme for the CMOS inverter circuit by adopting a more accurate model of the CMOS inverter characteristics. Moreover, we present the way to expand the LIM algorithm to general CMOS circuit simulations. In order to apply LIM to the general CMOS circuits which consist of CMOS NAND and NOR, we derive the updating formulas of the explicit form of the LIM algorithm. By using the explicit form of the LIM scheme, it becomes easy to take in the characteristics of CMOS NAND and NOR into the LIM simulations. As a result, it is confirmed that our techniques are useful and efficient for the simulations of CMOS circuits.

Higher-order rewrite systems (HRSs) and simply-typed term rewriting systems (STRSs) are computational models of functional programs. We recently proposed an extremely powerful method, the static dependency pair method, which is based on the notion of strong computability, in order to prove termination in STRSs. In this paper, we extend the method to HRSs. Since HRSs include λ-abstraction but STRSs do not, we restructure the static dependency pair method to allow λ-abstraction, and show that the static dependency pair method also works well on HRSs without new restrictions.

The notion of anonymous signatures has recently been formalized by [18], which captures an interesting property that a digital signature can sometimes hide the identity of the signer, if the message is hidden from the verifier. However, in many practical applications, e.g., an anonymous paper review system mentioned in [18], the message for anonymous authentication is actually known to the verifier. This implies that the effectiveness of previous anonymous signatures may be unjustified in these applications. In this paper, we extend the previous models, and develop a related primitive called strong anonymous signatures. For strong anonymous signatures, the identity of the signer remains secret even if the challenge message is chosen by an adversary. We then demonstrate some efficient constructions and prove their security in our model.

Networking technologies have recently been evolving and network applications are now expected to support flexible composition of upper-layer network services, such as security, QoS, or personal firewall. We propose a multi-platform framework called FreeNA* that extends existing applications by incorporating the services based on user definitions. This extension does not require users to modify their systems at all. Therefore, FreeNA is valuable for experimental system usage. We implemented FreeNA on both Linux and Microsoft Windows operating systems, and evaluated their functionality and performance. In this paper, we describe the design and implementation of FreeNA including details on how to insert network services into existing applications and how to create services in a multi-platform environment. We also give an example implementation of a service with SSL, a functionality comparison with relevant systems, and our performance evaluation results. The results show that FreeNA offers finer configurability, composability, and usability than other similar systems. We also show that the throughput degradation of transparent service insertion is 2% at most compared with a method of directly inserting such services into applications.

In this paper, we present a new dependency parsing method for languages which have very small annotated corpus and for which methods of segmentation and morphological analysis producing a unique (automatically disambiguated) result are very unreliable. Our method works on a morphosyntactic lattice factorizing all possible segmentation and part-of-speech tagging results. The quality of the input to syntactic analysis is hence much better than that of an unreliable unique sequence of lemmatized and tagged words. We propose an adaptation of Eisner's algorithm for finding the k-best dependency trees in a morphosyntactic lattice structure encoding multiple results of morphosyntactic analysis. Moreover, we present how to use Dependency Insertion Grammar in order to adjust the scores and filter out invalid trees, the use of language model to rescore the parse trees and the k-best extension of our parsing model. The highest parsing accuracy reported in this paper is 74.32% which represents a 6.31% improvement compared to the model taking the input from the unreliable morphosyntactic analysis tools.

In this paper, an image restoration method using the Wiener filter is proposed. In order to bring the theory of the Wiener filter consistent with images that have spatially varying statistics, the proposed method adopts the locally adaptive Wiener filter (AWF) based on the universal Gaussian mixture distribution model (UNI-GMM) previously proposed for denoising. Applying the UNI-GMM-AWF for deconvolution problem, the proposed method employs the stationary Wiener filter (SWF) as a pre-filter. The SWF in the discrete cosine transform domain shrinks the blur point spread function and facilitates the modeling and filtering at the proceeding AWF. The SWF and UNI-GMM are learned using a generic training image set and the proposed method is tuned toward the image set. Simulation results are presented to demonstrate the effectiveness of the proposed method.

The RFID tag system has received attention as an identification source. Each RFID tag is attached to some object. With the unique ID of the RFID tag, a user identifies the object provided with the RFID tag, and derives appropriate information about the object. One of important applications of the RFID technology is the position estimation of RFID tags. It can be very useful to acquire the location information concerning the RFID tags. It can be applied to navigation systems and positional detection systems for robots etc. In this paper, we propose a new position estimation method of RFID tags by using a probabilistic approach. In this method, mobile objects (person and robot, etc.) with RFID readers estimate the positions of RFID tags with multiple communication ranges. We show the effectiveness of the proposed method by computer simulations.

In PKC 2004, Choi et al. proposed an ID-based authenticated group key agreement (AGKA) protocol using bilinear pairings. Unfortunately, their protocol suffered from an impersonation attack and an insider colluding attack. In 2008, Choi et al. presented an improvement to resist insider attacks. In their modified protocol, they used an ID-based signature scheme on transcripts for binding them in a session to prevent replay of transcripts. In particular, they smartly used the batch verification technique to reduce the computational cost. In this paper, we first show that Choi et al.'s modified AGKA protocol still suffers from an insider colluding attack. Then, we prove that the batch verification of the adopted ID-based signature scheme in their modified protocol suffers from a forgery attack.

Building an experimental network within a testbed has been a tiresome process for experimenters, due to the complexity of the physical resource assignment and the configuration overhead. Also, the process could not be expedited across testbeds, because the syntax of a configuration file varies depending on specific hardware and software. Re-configuration of an experimental topology for each testbed wastes time, an experimenter could not carry out his/her experiments during the limited lease time of a testbed at worst. In this paper, we propose the AnyBed: the experimental network-building system. The conceptual idea of AnyBed is "If experimental network topologies can be portable across any kinds of testbed, then, it would expedite building an experimental network on a testbed while manipulating experiments by each testbed support tool". To achieve this concept, AnyBed divide an experimental network configuration into the logical and physical network topologies. Mapping these two topologies, AnyBed can build intended logical network topology on any PC clusters. We have evaluated the AnyBed implementation using two distinct clusters. The evaluation result shows a BGP topology with 150 nodes can be constructed on a large scale testbed in less than 113 seconds.

This paper presents a gate-block selection algorithm, which can synthesize a proper parameter extractor of the pre-computation-based content-addressable memory (PB-CAM) to enhance power efficiency for specific applications such as embedded systems, microprocessor and SOC, etc. Furthermore, a novel CAM cell design with single bit-line is proposed. The proposed CAM cell design requires only one heavy loading bit-line and merely is constructed with eight transistors. The whole PB-CAM design was described in Spice with TSMC 0.35 µm double-poly quadruple-metal CMOS process. We used Synopsys Nanosim to estimate power consumption. With a 128 words by 32 bits CAM size, the experimental results showed that our proposed PB-CAM effectively reduces 18.21% of comparison operations in the CAM and saves 16.75% in power reduction by synthesizing a proper parameter extractor of the PB-CAM compared with the 1's count PB-CAM. This implies that our proposed PB-CAM is more flexible and adaptive for specific applications.

Location Based Services (LBS) are expected to become one of the major drivers of ubiquitous services due to recent inception of GPS-enabled mobile devices, the development of Web2.0 paradigm, and emergence of 3G broadband networks. Having this vision in mind, Community Context-attribute-oriented Collaborative Information Environment (CCCIE) based Autonomous Decentralized Community System (ADCS) is proposed to enable provision of services to specific users in specific place at specific time considering various context-attributes. This paper presents autonomous community construction technology that share service discovered by one member among others in flexible way to improve timeliness and reduce network cost. In order to meet crucial goal of real-time and context-aware community construction (provision of service/ service information to users with common interests), and defining flexible service area in highly dynamic operating environment of ADCS, proposed progressive ripple based service discovery technique introduces novel idea of snail's pace and steady advancing search followed by swift boundary confining mechanism; while service area construction shares the discovered service among members in defined area to further improve timeliness and reduce network cost. Analysis and empirical results verify the effectiveness of the proposed technique.

An approach to image thresholding based on the plausibility of object and background regions by adopting a co-occurrence matrix and category utility is presented. The effectiveness of the proposed method is shown through the experimental results tested on several images and compared with conventional methods.

In deep submicron designs, predicting gate delays with interconnect load is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept and the Thevenin model that replaces the gate with a linear resistor and a voltage source are usually used to calculate the delay of gate with interconnect load. In conventional methods, it is not considered that the charges transferred into interconnect load and Ceff in the Thevenin model are not equal. The charge difference between interconnect load and Ceff has the large influence to the accuracy of computing Ceff. In this paper, an advanced effective capacitance model is proposed to consider the above problem in the Thevenin model, where the influence of the charge difference is modeled as one part of the effective capacitance to compute the gate delay. Experimental results show a significant improvement in accuracy when the charge difference between interconnect load and Ceff is considered.

An ICI (Inter-Cell Interference) mitigation algorithm for exploiting macroscopic diversity for an up-link OFDMA (Orthogonal Frequency Division Multiple Access) system is proposed. To reduce the influence of carrier collision, the order of resource allocation is coordinated based on the location of each MS (Mobile Station) and the associated carrier group. This consideration significantly reduces ICI and enhances throughput at the boundary region.