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[Keyword] SI(16314hit)

14901-14920hit(16314hit)

  • Throughput Analysis of Slotted Non-persistent and One-persistent CSSS/OD (Carrier Sense Spread Spectrum with Overload Detection) Protocols

    Francis N. MUMBA  Shinji TSUZUKI  Yoshio YAMADA  Saburo TAZAKI  

     
    LETTER

      Vol:
    E78-A No:9
      Page(s):
    1220-1224

    The throughput performance of the non-persistent carrier sense spread spectrum with overload detection (NP-CSSS/OD) protocol is analysed and compared with that of the conventional non-persistent and one-persistent carrier sense multiple access with collision detection (NP-CSMA/CD and 1P-CSMA/CD) and the one-persistent carrier sense spread spectrum with overload detection (1P-CSSS/OD) protocols. We also introduced utilization measurements and did some performance comparisons between these protocols. At high offered loads, the NP-CSSS/OD protocol is found to offer the best throughput and utilization performances amongst them.

  • Reconstructing Data Flow Diagrams from Structure Charts Based on the Input and Output Relationship

    Shuichiro YAMAMOTO  

     
    PAPER-Methodologies

      Vol:
    E78-D No:9
      Page(s):
    1118-1126

    The traceability of data flow diagrams against structure charts is very important for large software development. Specifying if there is a relationship between a data flow diagram and a structure chart is a time consuming task. Existing CASE tools provide a way to maintain traceability. If we can extract the input-output relationship of a system from a structure chart, the corresponding data flow diagram can be automatically generated from the relationship. For example, Benedusi et al. proposed a reverse engineering methodology to reconstruct a data flow diagram from existing code. The methodology develops a hierarchical data flow diagram from dependency relationships between the program variables. The methodology, however, transforms each module in structure charts into a process in data flow diagrams. The reconstructed diagrams may have different processes with the same name. This paper proposes a transformation algorithm that solves these problems. It analyzes the structure charts and extracts the input and ouput relationships, then determines how the set of outputs depends on the set of inputs for the data flow diagram process. After that, it produces a data flow diagram based on the include operation between the sets of output items. The major characteristics of the algorithm are that it is simple, because it only uses the basic operations of sets, it generates data flow diagrams with deterministic steps, and it can generate minimal data flow diagrams. This process will reduce the cost of traceability between data flow diagrams and structure charts.

  • A Modified Spherical Method for Tracing Solution Curves

    Kiyotaka YAMAMURA  Tooru SEKIGUCHI  

     
    PAPER-Numerical Analysis and Optimization

      Vol:
    E78-A No:9
      Page(s):
    1233-1238

    Tracing solution curves of nonlinear equations is an important problem in circuit simulation. In this paper, simple techniques are proposed for improving the computational efficiency of the spherical method, which is a method for tracing solution curves. These techniques are very effective in circuit simulation where solution curves often turn very rapidly. Moreover, they can be easily performed with little computational effort.

  • GaInAsP/InP Square Buried-Heterostructure Surface-Emitting Lasers Regrown by MOCVD

    Seiji UCHIYAMA  Susumu KASHIWA  

     
    LETTER-Opto-Electronics

      Vol:
    E78-C No:9
      Page(s):
    1311-1314

    Mesa structures have been investigated to optimize a buried-heterostructure (BH) for a GaInAsP/InP surface-emitting (SE) laser regrown by metalorganic chemical vapor deposition (MOCVD), and it has been found that a square mesa top pattern of which the sides are at an angle of 45 to the 011 orientation is suitable. A 1.3-µm GaInAsP/InP square buried heterostructure (SBH) SE laser with this mesa structure has been demonstrated and low-threshold CW oscillation (threshold current Ith=0.45 mA) at 77 K and low-threshold room-temperature pulsed oscillation (Ith=12 mA) have been obtained.

  • A 0.1 µm Au/WSiN Gate GaAs MESFET with New BP-LDD Structure and Its Applications

    Masami TOKUMITSU  Kazumi NISHIMURA  Makoto HIRANO  Kimiyoshi YAMASAKI  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1189-1194

    A 0.1-µm gate-length GaAs MESFET technology is reported. A 48.3-GHz dynamic-frequency divider, and an amplifier with 20-dB gain and 17.5-GHz bandwidth are successfully fabricated by integrating over-100-GHz-cut-off frequency MESFETs using a new lightly-doped drain structure with a buried p-layer (BP-LDD) device structure.

  • Evaluation of Fixed Charge and Interface Trap Densities in SIMOX Wafers and Their Effects on Device Characteristics

    Shoichi MASUI  Tatsuo NAKAJIMA  Keisuke KAWAMURA  Takayuki YANO  Isao HAMAGUCHI  Masaharu TACHIMORI  

     
    PAPER-Integrated Electronics

      Vol:
    E78-C No:9
      Page(s):
    1263-1272

    The buried oxide nonintegrities, represented as the equivalent fixed oxide charge and interface trap densities at both the upper and lower interface of buried oxide, are evaluated for low-dose and high-dose SIMOX wafers, and their effects on device characteristics are investigated. The equivalent fixied oxide charge and trap densities at the lower interface, which are measured with buried oxide capacitors, are negligibly small in as-fabricated SIMOX wafers. This result enables us to make an analytical model of the parasitic drain/source-to-substrate capacitance in an SOI MOSFET, in which the effect of the depletion layer under the buried oxide is considered. The influence of thinner buried oxide and process-induced fixed oxide charge on the parasitic capacitance is explored with this model. The equivalent fixed oxide charge and trap densities at the upper interface are evaluated by the threshold voltage measurement in an SOI NMOSFET. The principle of this evaluation as well as the experimental technique are described in detail. The oxide charge and trap densities at the upper interface are higher than those at the lower interface for both SIMOX wafers. With a new model of the subthreshold slope based on a two-dimensional potential analysis the influence of the trap at the upper interface is discussed.

  • SAM: a New Statistical Multiplexer that Regenerates CBR Connections for ATM Networks

    Francis PITCHO  Naoaki YAMANAKA  

     
    LETTER-Switching and Communication Processing

      Vol:
    E78-B No:9
      Page(s):
    1330-1332

    This letter presents SAM, a multiplexer for ATM's circuit emulation services that can precisely control the cell clumping at the connection-level. Compared with a FIFO (First In First Out) multiplexer, it also improves the connection-level diffusion and CDV (Cell Delay Variation) performance. SAM can therefore significantly increase the number of connections accepted by CAC (Call Admission Control) procedures in the subsequent multiplexer.

  • Design of the Basic Cell and Metallized RAM for 0.5 µm CMOS Gate Array

    Yoji NISHIO  Hideo HARA  Masahiro IWAMURA  Yasuo KAMINAGA  Katsunori KOIKE  Kosaku HIROSE  Takayuki NOTO  Satoshi OGUCHI  Yoshihiko YAMAMOTO  Takeshi ONO  

     
    PAPER-Integrated Electronics

      Vol:
    E78-C No:9
      Page(s):
    1255-1262

    A 0.5 µm CMOS embedded function type gate array family with high speed modules was developed. This family has: an effective basic cell; high speed, compiled type metallized and diffused RAMs; PLL (Phase Locked Loop); and GTL (Gunning Transceiver Logic) to realize operation of over 100 MHz at 3.3 V. This paper describes the basic cell architecture and the compiled type metallized RAM. A divided MOS transistor type basic cell is effective for metallized modules such as metallized RAM and internal logic circuits. The appropriate basic cell size (height) can be decided from the viewpoints of the relationship between the number of usable basic cells and the basic cell height, and the logic circuit speed. Propagation delay time of the 2-input NAND is 200 ps at a standard load of fan out=2 and metal length=1.4 mm. For the universal ASIC, the compiled RAM is indispensable. Single port and multi-port metallized RAMs which are structured by using the basic cells are discussed. The new single port memory cell circuit which has a differential write and single end read operating method is introduced. This memory cell circuit can be realized using one basic cell. The diffused layer region of the NMOS transfer gates for the read operation is shared between neighbor memory cells. So, the capacitance of the bit line becomes smaller, and a high speed access time can be achieved. The measured access time of 1 kbits is 4.2 ns. The new multi-port memory cell circuits which have a single end write and single end read operating method are introduced. The read operating method is the same as that of the single port memory cell circuit. The access time shows very high speed operation comparable to that of the single port memory. This 3F (Flexible, Fast, and Friendly) ASIC family can be applied to high speed processors in workstations and graphics equipment.

  • An Accurate FET Model for Microwave Nonlinear Circuit Simulation

    Junko ONOMURA  Shigeru WATANABE  Susumu KAMIHASHI  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1223-1228

    We propose an accurate FET model for microwave nonlinear circuit simulation, which has been modified from the Statz model. We have greatly enhanced the accuracy of both dc and capacitance expressions, especially in the knee voltage region where Ids begins to saturate. In the expression of dc characteristics, our model improves the accuracy by incorporating the drain-source voltage dependence of pinch-off voltage, the gate-source voltage dependence of knee voltage, and the non-square dependence of drain current against the gate-source voltage. The non-square-root voltage dependence of gate capacitances is considered as well. All modifications are simple and the parameter extraction is kept as simple as that of the Statz model. By using this model, good agreement has been obtained between simulated and measured characteristics of a GaAs FET. For the dc characteristics and the S-parameters, each of estimated error is within 5% and 10%. The model accuracy has been verified by comparison of simulated and measured results of power amplifier performances over a wide range of operating conditions.

  • A Software Project Management System Using an Object Oriented Database--Integration of Process Management System and Quality Management System--

    Seiichi KOMIYA  Atsuo HAZEYAMA  

     
    PAPER-Support Systems

      Vol:
    E78-D No:9
      Page(s):
    1142-1149

    There are three viewpoints involved in software project management: process management, quality management and cost management. Software projects must be managed on the basis of these three viewpoints. However, in many cases process management, quality management and cost management systems are built separately as individual systems respectively. Construction of software project management systems which these three functions are integrated has been rare. Therefore, in order to construct a system integrating these functions, the authors clarify the significance of integration of application systems. And then the authors unveil the structure of a software project management system that process management system, quality management system and cost management system are integrated by using an object oriented database.

  • A Constructing Method of Functional Model by Integrated Learning from Examples of Software Modification

    Hiroyuki YAMADA  Tetsuo KOBASHI  Tsunehiro AIBARA  

     
    PAPER-Models

      Vol:
    E78-D No:9
      Page(s):
    1133-1141

    One approach to develop software efficiently is to reuse existing software by modifying a part of it. However, modifying software will often introduce unexpected side effects into other parts of it. As a result, it costs much time and care to modify the software. So, in order to modify software efficiently, we have proposed a functional model to represent information about side effects caused by modification and a model based supporting system for modifying software. So far, however, an expert software developer must describe the entire functional model of the target software through the analysis of practical modifying processes. This will be an unnecessary burden on him. Moreover, the larger target software becomes, the harder the model construction becomes. Therefore, an automatic constructing method of the functional model is needed in order to solve this problem. So, this paper considers a method of acquiring useful interaction information by learning from training examples of modification. However, in our application domain, it seems that it is impossible to make complete domain theory and to prepare a large number or training examples in advance. Therefore, our learning method involves an integration of explanation-based learning (EBL) from positive examples of modification generated by the user and Similarity-based learning (SBL) from positive or negative examples generated by the user and the learning system. As a result, our method can acquire valid knowledge about the interaction from not so many examples under incomplete theory. Then, this paper presents a constructing method, in which our proposed learning method is incorporated, of a functional model. Finally, this paper demonstrates construction of the functional model in the domain of an event-driven queueing simulation program according to our learning method.

  • A Computer Supported System of Meetings Using a Model of Inter-Personal Communication

    Tomofumi UETAKE  Morio NAGATA  

     
    PAPER-Models

      Vol:
    E78-D No:9
      Page(s):
    1127-1132

    Information systems to support cooperative work among people should be first designed to help humam communication. However, there are few systems based on the analysis of human communication. Standing on this situation, we propose a meeting support system for the participants' understandings by indicating the suitable information about the topic of the scene". Our system provides only useful information by monitoring each statement without complex methods. To show something useful multi-media information for members, we propose the following structure of the meeting on the basis of the analysis of communication. Each statement is classified into two levels, either; a statement about the progress" of the meeting (context-level utterances) or, a statement about objects" (content-level utterances). Further, content-level utterances are classified into two types, position utterances and argument utterances. Using this classification of statements, the proceeding of the meeting is represented as the tree model which is called a context-tree". If the structure of meetings is fixed, it is possible to select only useful information from all shared information for members by analyzing each content-level utterance. The system introduced in this paper shows appropriate multi-media information about the topic of the scene" by using the above model. We have implemented a prototype system based on the above ideas. Moreover, we have mode some experiments to show the effectiveness of this system. Those results show that our method is effective to improve the productivity" of meetings.

  • Optical Information Processing by Synthesis of the Coherence Function--Photonic/Video Hybrid System--

    Toru OKUGAWA  Kazuo HOTATE  

     
    PAPER-Opto-Electronics

      Vol:
    E78-C No:9
      Page(s):
    1286-1291

    A photonic/video hybrid system for optical information processing by synthesis of the coherence function is proposed. Optical coherence function can be synthesized to have delta-function-like shape or notch shape by using direct frequency modulation of a laser diode with an appropriate waveform. Therefore, by choosing only the interference component in the interferometer, information processing functions can be obtained. The photonic/video hybrid system proposed provides a novel way to choose the interference component, which can improve the spatial resolution compared with our previous system with holographic technique. Selective extraction two-dimensional (2-D) information from a three-dimensional (3-D) object is successfully performed in basic experiments.

  • Growth, Design and Performance of InP-Based Heterostructure Bipolar Transistors

    Kenji KURISHIMA  Hiroki NAKAJIMA  Shoji YAMAHATA  Takashi KOBAYASHI  Yutaka MATSUOKA  

     
    INVITED PAPER

      Vol:
    E78-C No:9
      Page(s):
    1171-1181

    This paper discusses crystal-growth and device-design issues associated with the development of high-performance InP/InGaAs heretostructure bipolar transistors (HBTs). It is shown that a highly Si-doped n+-subcollector in the HBT structure causes anomalous Zn redistribution during metalorganic vapor phase epitaxial (MOVPE) growth. A thermodynamical model of and a useful solution to this big problem are presented. A novel hybrid structure consisting of an abrupt emitter-base heterojunction and a compositionally-graded base is shown to enhance nonequilibrium base transport and thereby increase current gain and cutoff frequency fT. A double-heterostructure bipolar transistor (DHBT) with a step-graded InGaAsP collector can improve collector breakdown behavior without any speed penalty. We also elucidate the effect of emitter size shrinkage on high-frequency performance. Maximum oscillation frequency fmax in excess of 250 GHz is reported.

  • Case Histories on Knowledge-Based Design Systems for LSI and Software

    Masanobu WATANABE  Toru YAMANOUCHI  Masahiko IWAMOTO  Satoru FUJITA  

     
    PAPER-Applications

      Vol:
    E78-D No:9
      Page(s):
    1164-1170

    This paper describes, from a system architectural viewpoint, how knowledge-based technologies have been utilized in developing EXLOG (an LSI circuit synthesis system) and SOFTEX (a software synthesis system) inside the authors' projects. Although the system architectures for EXLOG and SOFTEX started from the same production systems, consisting of transformation rules in the middle of the 1980's, both branched off in different directions in the 1990's. Based on experiences with EXLOG and SOFTEX, the differences between LSI and software design models are discussed, and the future directions are indicated for the knowledge-based design system architectures.

  • A High Efficiency GaAs Power Amplifier of 4.6 V Operation for 1.5 GHz Digital Cellular Phone Systems

    Akihisa SUGIMURA  Kazuki TATEOKA  Hidetoshi FURUKAWA  Kunihiko KANAZAWA  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1237-1240

    A high efficiency and low voltage operation GaAs power amplifier module has been developed for the application to 1.5 GHz Japanese digital cellular phones. This paper summarizes the design method to increase efficiency and to reduce adjacent channel leakage power. Operated at a low drain bias voltage of 4.6 V, the power amplifier module delivers an output power of 1.5 W with 46% power-added efficiency and -52 dBs adjacent channel leakage power.

  • A 15-Gbit/s Si-Bipolar Gate Array

    Ryuusuke KAWANO  Minoru TOGASHI  Chikara YAMAGUCHI  Yoshiji KOBAYASHI  Masao SUZUKI  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1203-1209

    We have developed a 15-Gbit/s 96-gate Si-bipolar gate array using 0.5-µm Si-bipolar technology, a sophisticated internal cell design, an I/O buffer design suitable for high-speed operation and high-frequency package technology. The decision circuit and 4 : 1 multiplexer fabricated on the gate array operate up to 15-Gbit/s and above 10-Gbit/s respectively. The data input sensitivity and the phase margin of the decision circuit are 53 mVpp and 288 at 10-Gbit/s operation. This gate array promises to be useful in shortening the development period and lowering cost of 10-Gbit/s class IC's.

  • Acceleration Factor for Tarnish Testing of Silver Contact Surface

    Terutaka TAMAI  Yasuhiro KURANAGA  

     
    PAPER-Electronic Circuits

      Vol:
    E78-C No:9
      Page(s):
    1273-1278

    Silver is a fundamental material for electrical contact application. In spite of high electrical conductivity and economical advantage, silver surface is corroded easily by environment contained sulfide. A corrosion product as Ag2S deteriorates the property of contact reliability. In order to examine contact reliability, the acceleration tests have been accepted widely in industries. In the present study, the acceleration factor of the contact reliability for the sulfide film on the surface of silver contact which was subject to the tarnish acceleration test was clarified in comparison with the film grown in a normal office environment. The accelerated environment based on the Japan Electric Industry Development Association (JEIDA) standard No.25 was adopted. This environment is consisted of air contained 3 ppm H2S gas under 40, 85-95% RH. The growth rate of the sulfide film (Ag2S) was evaluated by applying the ellipsometry analysis. In the results, it was found that growth of Ag2S film of 500 in thickness in the normal office environment required corrosion time of 3103 h. This thickness of 500 caused increase in contact resistance of 0.1-1.0 (Ω). However, in the accelerated environment, corrosion time decreased to 1.7 h for same thickness. Therefore, the acceleration factor was obtained by comparison of these time as 1.8103 for the standard test of JEIDA.

  • Bifurcation Analysis of Nonlinear Resistive Circuits by Curve Tracing Method

    Lingge JIANG  Akio USHIDA  

     
    PAPER-Nonlinear Problems

      Vol:
    E78-A No:9
      Page(s):
    1225-1232

    In this paper, we discuss computational methods for obtaining the bifurcation points and the branch directions at branching points of solution curves for the nonlinear resistive circuits. There are many kinds of the bifurcation points such as limit point, branch point and isolated point. At these points, the Jacobian matrix of circuit equation becomes singular so that we cannot directly apply the usual numerical techniques such as Newton-Raphson method. Therefore, we propose a simple modification technique such that the Newton-Raphson method can be also applied to the modified equations. On the other hand, a curve tracing algorithm can continuously trace the solution curves having the limit points and/or branching points. In this case, we can see whether the curve has passed through a bifurcation point or not by checking the sign of determinant of the Jacobian matrix. We also propose two different methods for calculating the directions of branches at branching point. Combining these algorithms, complicated solution curves will be easily traced by the curve tracing method. We show the example of a Hopfield network in Sect.5.

  • On Applicability of Linear Cryptanalysis to DES-like Cryptosystems--LOKI89, LOKI91 and s2 DES--

    Toshio TOKITA  Tohru SORIMACHI  Mitsuru MATSUI  

     
    PAPER

      Vol:
    E78-A No:9
      Page(s):
    1148-1153

    This paper discusses linear cryptanalysis of LOKI89, LOKI91 and s2DES. Our computer program based on Matsui's search algorithm has completely determined their best linear approximate equations, which tell us applicability of linear cryptanalysis to each cryptosystem. As a result, LOKI89 and LOKI91 are resistant to linear cryptanalysis from the viewpoint of the best linear approximate probability, whereas s2DES is breakable by a known-plaintext attack faster than an exhaustive key search. Moreover, our search program, which is also applicable to differential cryptanalysis, has derived their best differential characteristics as well. These values give a complete proof that characteristics found by Knudsen are actully best.

14901-14920hit(16314hit)