The use of existing metallic local line facilities is being studied for the provision of high-speed digital transmission services. Local line characteristics have to be modeled in the form of the objective requirements that should be met by DSL for estimating the feasibility of the service provision in the actual network. This paper presents the results of a study that models the metallic media characteristics of NTT's local network. First, the line lenghts determined by the existing local line deployment rule and the cable types used in the networks are introduced. Second, the values of crosstalk characteristics, the most significant factors in limiting DSL range, are given by classifying essential line conditioning states of each cable. The values of crosstalk characteristics are newly computed by taking into account detailed cable pair-binding (cabling) structures, and the worst case values among all possible combinations of multiple inter-pair interfering-interfered relationships within a cable are given though a previous study approximated cable pair-binding structures. The crosstalk characteristics of NTT's and American local networks are also compared. A modified approximate equation of line propagation characteristics is also proposed for representative local lines, and its precision is verified by comparing simulation results to actual measurements in both frequency and time domains.

This paper describes a new timing circuit design technique for asynchronous burst-mode data transmission such as Fiber-To-The-Home (FTTH). It enables to the handling of asynchronous burst-mode data. Without an external reference clock signal, it can make a quick extraction of clock signal from received data packets using a "gating-timing circuit" and a "burst PLL." The gating-timing circuit employs bit gating for a quick phase response, and the burst PLL employs frame gating for quick frequency adjustment to differences between packets and clock extraction. This circuit has a simple configuration without any external oscillators, which reduces both cost and power. A fabricated 0.5-µm CMOS IC exhibits instantaneous response within one bit for 156 Mb/s asynchronous data packets.

This paper presents a novel approach to a soft-output equalizer, which makes a symbol-by-symbol soft-decision based on a posteriori probabilities (APP's) criterion in the presence of intersymbol interference. The authors propose a soft-output Viterbi equalizer (SOVE) employing expanded memory length in a trellis of the Viterbi algorithm with small arithmetic complexity. The proposed equalizer gives suboptimum soft-decision closer to that of a equalizer with the maximum a posteriori probabilities (MAP) algorithm than the conventional SOVE.

Photovoltaic devices capable of generating more than 200 volts with an area of 1 cm2 have been developed for directly driving microactuators such as piezoelectric or electrostatic actuators. The micro-devices interconnect 285 micro cells (unit cell size: about 0.5 mm 2.0 mm) in series, and have an open circuit voltage (Voc) of 207 volts, a short circuit current (Isc) of 36.6 µA, a maximum output power (Pmax) of 4.65 mW and a fill factor (F.F.) of 0.615 under AM (Air Mass) 1.5 and 100 mW/cm2 illumination. This voltage is the highest in the world for the area of 1 cm2. The series connection is precisely processed by a focused laser beam, thereby significantly reducing the area needed for device connections. It has been confirmed that a piezoelectric polymer can be directly driven by the electrical output in evaluating the potential of the devices to be used as a microactuator's power source.

In the information engineering learning environment, there may be more than one solution to any given problem. We have developed CAMELOT using the Nominal Group Technique for group problem solving. This paper describes the collaborative learning system on the Internet using discussion model, the effectiveness of collaborative learning in modeling the entity-relationship diagram within the field of information engineering, and how to apply AI technologies such as rule-based reasoning and case-based reasoning to the pedagogical strategy. By using CAMELOT, each learner learns how to analyze through case studies and how to collaborate with his or her group in problem solving. As a result. We have found evidence for the effectiveness of collaborative learning, such as getting a deeper understanding by using CAMELOT than by individual learning, because they can reach better solutions through discussion, tips from other learners, examination of one another's individual solutions, and understanding alternative solutions using case-based reasoning.

This paper presents an analog 2-dimensional discrete cosine transform (2-D DCT) processor for focal-plane image compression. The on-chip analog 2-D DCT processor can process directly the analog signal of the CMOS image sensor. The analog-to-digital conversion (ADC) is preformed after the 2-D DCT, and this leads to efficient AD conversion of video signals. Most of the 2-D DCT coefficients can be digitized by a relatively low-resolution ADC or a zero detector. The quantization process after the 2-D DCT can be realized by the ADC at the same time. The 88-point analog 2-D DCT processor is designed by switched-capacitor (SC) coefficient multipliers and an SC analog memory based on 0.35µm CMOS technology. The 2-D DCT processor has sufficient precision, high processing speed, low power dissipation, and small silicon area. The resulting smart image sensor chips with data compression and digital transmission functions are useful for the high-speed image acquisition devices and portable digital video camera systems.

The status of the plastic optical fiber (POF) for high-speed data communication is described. Very recently, the low-loss and high-bandwidth perfluorinated GI POF which has no serious absorption loss from visible to 1.3-µm wavelength was successfully prepared at Keio University. Since the core diameter (300-1000 µm) of the GI POF is much larger than that of the multimode silica fiber (62.5 µm), the serious modal noise in the conventional multimode silica fiber was virtually eliminated, resulting in stable giga bit order data transmission with inexpensive couplers and connectors.

Hankel's asymptotic expansions are frequently used for numerical calculation of cylindrical functions of complex order. We beforehand need to estimate the precisions of the cylindrical functions calculated with Hankel's asymptotic expansions in order to use these expansions. This letter presents comparatively simple expressions for rough estimations of the errors of the cylindrical functions calculated with the asymptotic expansions, and features of the errors are discussed.

This paper proposes a novel VLSI architecture capable of processing the Lempel-Ziv-based data compression algorithm very fast. The architecture is composed of five main blocks, i.e., a PE-based Match Block, a Consecutive Hit Checker, a Pointer Generator, a Length Generator, and a Code Packer. Flexibility of the PE-based structure makes it possible to adapt to various buffer sizes without any loss of speed or additional control overhead. Since it is designed as a VLSI-oriented architecture, it has simple control logic circuitry. It processes exactly one character per clock cycle and the update of a dictionary buffer is automatically done, therefore it does not require additional accumulated shift operations to prepare for the dictionary buffer. The shift operations have been major problems commonly found in most other architectures. When implemented with the currently available 0.5µm CMOS technology, it is proven by critical path analysis that the architecture can achieve over 100 mega samples (characters) per second with a clock frequency of 100 MHz. This is fast enough for real time data compression for many applications.

In this letter, we propose a blind adaptation method for the decision feedback equalizer (DFE). In the proposed scheme, a DFE is divided into two parts: a front-end linear equalizer (LE), and a prediction error filter (PEF) followed by a feedback part. The coefficients of the filters in each part are updated using constant modulus algorithm and decision feedback prediction algorithm, respectively. The front-end LE removes intersymbol interference ISI, and the PEF with feedback part whitens the noise to reduce noise power enhanced by the LE. Pre-processing by the LE enables the DFE to equalize nonminimum phase channels. Simulation results show that the proposed scheme provides reliable convergence, and the resulting symbol error rate is much less than that of the conventional LE and very close to that of the DFE using a training sequence.

This paper presents the performance of a proposed GaAs MESFET photodetector with wide drain-to-gate distances for improving the optical coupling efficiency in subcarrier optical transmission. Principle and design parameters of the proposed MESFET are described. Link gain, CNR, and BER, are experimentally investigated as functions of the drain-to-gate distance. It is experimentally found that the proposed MESFET improves the link gain by 8.5 dB compared to the conventional structure at the subcarrier frequency of 140 MHz. Discussions are also included compared to PIN-PD.

In this paper we propose a method of formal verification of totally self-checking (TSC) properties of combinational circuits using logic function manipulation. We show that the problem of verification of TSC properties can be transformed to a satisfiability problem of decision functions formed from characteristic functions of a circuit's output code words. Then the problem can be solved using binary decision diagrams (BDD). Experimental results show the effectiveness of the proposed method.

This paper is concened with the design and implementation of a 2-channel, 2-dimensional filter bank using rectangular (analog/digital) and quincunx (digital/digital) sampling. The associated analog low-pass filters are separable where as the digital low-pass filters are non-separable for a minimum sampling density requirement. The digital low-pass filters are Butterworth type filters, N = 9, realized as LWDFs. They, when itterated, approximate a valid scaling function (raised-consine scaling function). The obtained system can be used to compute a discrete wavelet transform.

This paper describes a novel quasi-transmission-line variable-reactance circuit that extends the variable-phase range of phase shifters. It consists of a transmission line and two shunt varactors. By appropriately choosing the characteristic impedance and electrical length of the transmission line, the variable-phase range can be significantly increased. Since the proposed circuit can be fabricated by the conventional MESFET process, a phase shifter can be integrated with other functional circuits. This enables fully monolithic integration of RF circuits as a one-chip multi-functional MMIC in radio communication systems. The variable-phase range of the prototype X-band monolithic phase shifter is 208 degrees, which is approximately four times as large as that of conventional one.

A novel CDMA multi-user detection scheme, orthogonal decision-feedback detector (ODFD), is proposed for a synchronous CDMA system in this paper. It is robust for its near-far resistance and high multi-user detection efficiency with a performance similar to that of decorrelating decision-feedback detector (DDFD) but with a reduced complexity. The ODFD scheme employs a match-filter bank that matches a set of ortho-normal sequences. The ortho-normal sequences are generated by the Gram-Schmidt orthogonalisation procedure based on the spreading codes. The ODFD algorithm involves only with the ortho-normal coefficient-matrix which requires no frequent recalculations even when system parameters change. Successive decision-feedback detection is carried out immediately at the output of the ODFD match-filter bank without matrix inversion operations, resulting in a much simplified structure.

New interference cancellation technique using time division reference signal is proposed for optical synchronous code-division multiple-access (CDMA) systems with modified prime sequence codes. In the proposed system one user in each group is not allowed to access the network at each time, and this unallowable user's channel is used as a reference signal for other users in the same group at the time. The performance of the proposed system using an avalanche photodiode (APD) is analyzed where the Gaussian approximation of the APD output is employed and the effects of APD noise, thermal noise, and interference for the receiver are included. The proposed cancellation techniqus is shown to be effective to improve the bit error probability performance and to alleviate the error floor when the number of users and the received optical power are not appreciably small.

Research and standardization activities on FPLMTS are under way throughout the world. This paper shows recent study results on radio transmission technologies in ARIB (Association of Radio Industries and Businesses), which in the standardization organization in Japan. On-going study shows two TDMA based and four CDMA based radio transmission technologies under study. These technologies need to be further studied in detail. The proposal from ARIB is expected to be summarized around the end of the year 1996.

Recently, various efficient algorithms for solving combinatorial optimization problems using BDD-based set manipulation techniques have been developed. Minato proposed O-suppressed BDDs (ZBDDs) which is suitable for set manipulation, and it is utilized for various search problems. In terms of practical limits of space, however, there are still many search problems which are solved much better by using conventional branch-and-bound techniques than by using BDDs or ZBDDs, while the ability of conventional branch-and-bound approaches is limited by computation time. In this paper, an extension of APPLY operation, named APPRUNE (APply + PRUNE) operation, is proposed, which performs APPLY operation (ZBDD construction) and pruning simultaneously in order to reduce the required space for intermediate ZBDDs. As a prototype, a specific algorithm of APPRUNE operation is shown by assuming that the given condition for pruning is a threshold function, although it is expected that APPRUNE operation will be more effective if more sophisticated condition are considered. To reduce size of ZBDDs in intermediate steps, this paper also pay attention to the number of cared variables. As an application, an exact-minimization algorithm for generalized Reed-Muller expressions (GRMs) is implemented. From experimental results, it is shown that time and memory usage improved 8.8 and 3.4 times, respectively, in the best case using APPRUNE operation. Results on generating GRMs of exact-minimum number of not only product terms but also literals is also shown.

A digital filter is one of the fundamental elements in the digital video transmission, and a multiplier acts as the key factor that determines the operation speed and silicon area of the filter. In terms of the digital video transmission, the required performance of a multiplier is to operate at the speed of 20-100 MHz but with the precision of 8-10 bits. In the case of implementing such an FIR filter with more than a certain number of taps, the same number of multipliers are necessary to realize the speed. Moreover, even though the coefficients to the filter are desired to be programmable, it is possible to change coefficients in the vertical fly-back interval of television receivers. This allows the preloadability of coefficients to the filter such that each coefficient can be treated as a constant during the filtering operation. Motivated by these requirements and functionalities, a novel multiplier and FIR filter architecture is described, which is to be synthesized with the use of a high level synthesis tool of COMPASS Design Navigator, partly with the aid of the manual design by means of a 0.8µm CMOS library.

In this paper, an exact-minimization method for an AND-EXOR expression (ESOP) using O-suppressed binary decision diagrams (ZBDDs) is considered. The proposed method is an improvement of Sasao's MRCF-based method. From experimental results, it is shown that required ZBDD size is reduced to 1/3 in the best case compared with the MRCF-based method.