The advent of high-speed networks with quality of service guarantees, will enable the deployment of data-server distributed systems over wide-area networks. Most implementations of data-server systems have been over local area networks. Thus it is important, in this context, to study the performance of existing distributed data management protocols in the new networking environment, identify the performance bottlenecks and develop protocols that are capable of taking advantage of the high speed networking technology. In this paper, we examine and compare the scalability of the server-based two-phase locking protocol (s-2PL), and the group two-phase locking protocol (g-2PL). The s-2PL protocol is the most widely used concurrency control protocol, while the g-2PL protocol is an optimized version of the s-2PL protocol, tailored for high-speed wide-area network environments. The g-2PL protocol reduces the effect of the network latency by message grouping, client-end caching and data migration. Detailed simulation results indicate that g-2PL indeed scales better than s-2PL. For example, upto 28% improvement in response time is reported.

This paper introduces a material management system for newspapers that was developed for The Yomiuri Shimbun. Material transferred to the system is stored in a material database and sent to terminals located in the related sections. The material can be processed effectively just by checking information on the terminals. Special requirements for this system will be discussed first in the paper, then problem-solving will be explored.

There is increasing demand for corporate information systems that have a simple human interface and are easy to access via WWW browsers. This paper proposes WebBASE, which integrates the WWW and relational databases. Experimental evaluation shows that WebBASE offers superior performance compared to existing products. Field studies of actual WebBASE applications show that it can improve the productivity of software developers for intranet application development.

Development of large-scale software is usually conducted through a project to unite a work force. In addition, no matter what kind of life cycle model is employed, a development plan is required for a software development project in order for the united work force to function effectively. For the project to be successful, it is also necessary to set management objectives based on this plan and confirm that they are achieved. This method is considered to be effective, but actually making a software development project and following the achievement of the management objectives at each step is not easy because predicting the necessary work amount and risks that the project involves is difficult in software development. Therefore, it is necessary to develop a system to support software project management so that the project manager can manage the entire project and the work load is reduced. This paper proposes a meta-model of work structure of software development projects for project management by using an object-oriented database with constraints as well as a framework for software project management systems based on this meta-model. Also proven, through an example of a system that analyzes repercussions on progress of a software development project, is that the meta-model and framework are effective in software project management.

The datapath width of a core processor has a strong effect on cost, power consumption, and performance of an embedded system integrated with memories into a single-chip. However, it is difficult for designers to appropriately determine the datapath width for each application because of the limited reusability of software and the lack of compilation techniques. The purpose of this paper is to clarify supports required from software for the optimal datapath width determination. As a solution, an embedded programming language, called Valen-C, and a retargetable Valen-C compiler are proposed. In this paper, the syntax and semantics of Valen-C along with the mechanism of the Valen-C retargetable compiler and how to preserve the accuracy of computation of programs in relation to various datapath widths are also described. Experiments with practical applications show that the total cost of the system including a core processor, ROM, and RAM is drastically reduced with little performance loss by reducing the datapath width.

This paper presents a new binding algorithm for a retargetable compiler which can deal with diverse architectures of application specific embedded processors. The architectural diversity includes a "non-orthogonal" datapath configuration where all the registers are not equally accessible by all the functional units. Under this assumption, binding becomes a hard task because inadvertent assignment of an operation to a functional unit may rule out possible assignment of other operations due to unreachability among datapath resources. We propose a new BDD-based algorithm to solve this problem. While most of the conventional methods are based on the covering of expression trees obtained by decomposing DFGs, our algorithm works directly on the DFGs so as to avoid infeasible bindings. In the experiments, a feasible binding which satisfies the reachability is found or the deficiency of datapath is detected within a few seconds.

This paper presents a new efficient method for finding an "optimal" bi-decomposition form of a logic function. A bi-decomposition form of a logic function is the form: f(X) = α(g1(X1), g2(X2)). We call a bi-decomposition form optimal when the total number of variables in X1 and X2 is the smallest among all bi-decomposition forms of f. This meaning of optimal is adequate especially for the synthesis of LUT (Look-Up Table) networks where the number of function inputs is important for the implementation. In our method, we consider only two bi-decomposition forms; (g1 g2) and (g1 g2). We can easily find all the other types of bi-decomposition forms from the above two decomposition forms. Our method efficiently finds one of the existing optimal bi-decomposition forms based on a branch-and-bound algorithm. Moreover, our method can also decompose incompletely specified functions. Experimental results show that we can construct better networks by using optimal bi-decompositions than by using conventional decompositions.

In this paper, we propose a new register transfer level (RT level) testability analysis method. Controllability and observability measures are defined for signal vectors based on the numbers of values they can take. The control part and the datapath part are automatically identified in the given RT level model and distinctive analysis methods are applied. We also describe a DFT point selection method based on our testability measures. In a experiment on a signal processing circuit whose gate count is 7690 including 578 FFs, almost the same fault coverage is achieved with fewer scan FFs than a conventional method based on gate level testability analysis.

The maximum order complexity (MOC) of a sequence is a very natural generalization of the well-known linear complexity (LC) by allowing nonlinear feedback functions for the feedback shift register which generates a given sequence. It is expected that MOC is effective to reduce such an instability of LC as an extreme increase caused by the minimum changes of a periodic sequence, i. e. , one-symbol substitution, one-symbol insertion or one-symbol deletion per each period. In this paper we will give the bounds (lower and upper bounds) of MOC for the minimum changes of an m-sequence over GF(q) with period qn-1, which shows that MOC is much more natural than LC as a measure for the randomness of sequences in this case.

The stability of slotted ALOHA systems with various types of capture phenomena and multiple packet reception capability is discussed in conjunction with the cusp catastrophe. The slotted ALOHA systems considered are classified into; 1) single packet reception with geometric capture, 2) independent multiple packet reception with geometric capture, 3) single packet reception with M-out-of-N capture (M N), 4) multiple packet reception with M-out-of-N capture, and 5) single packet reception with perfect capture. First, general expressions for the cusp points and the bifurcation sets are derived. Then, we present explicit formula for the stability of slotted ALOHA systems for the five types of capture and multi-packet reception capability and demonstrate how the bistable behavior is mitigated due to capture effect and multi-packet reception capability.

Many object-oriented database systems have used the notion of implicit authorization to avoid the overhead caused by explicitly storing all authorizations for each object. In implicit authorization, it is very important to detect efficiently conflicts between existing authorizations and new authorizations to be added. In this article we propose a conflict detection mechanism in the OODBMSs using implicit authorization with the notion of intention type authorization. When we grant an authorization on a node n in the database granularity hierarchy, the existing method is inefficient in determining the conflicts since it needs to examine all authorizations on the descendants of the node n. In contrast, our mechanism has the advantage of detecting the conflicts at the node n where an explicit authorization is to be granted without examining any authorizations below the node n. Thus, the proposed mechanism can detect a conflict with the average time complexity of O(d), which is smaller than O(md) of existing methods, where m is the number of children nodes at an arbitrary level and d is the difference of levels between the node with an existing explicit authorization and the higher node where an explicit authorization is to be granted. We also show that the additional storage overhead of storing all authorizations is negligible when compared with the total number of all explicit authorizations.

Complex rule conditions are commonly required to describe complicated business semantics. In these cases, efficient condition evaluation is crucial for high performance of active database systems. Most previous works used the incremental evaluation techniques, whose operations are relatively expensive due to the processing based on the exact calculation of the condition expression. In this paper we propose a new filtering technique that effectively identifies false condition in an early stage of condition monitoring. Since the results of condition evaluation tend to be false in most practical cases, an efficient filtering method can highly facilitate fast condition evaluation. The proposed filtering technique is developed based on the new perspective of database state and database operations, i. e. , a vector space model. We first present vector representations of database states, database operations, and complex condition expressions. Then, we propose a filtering method based on the properties of a vector space, called the sphere containment test. Our proposed method determines the truth value of the rule conditions only with the delta vectors maintained in main memory. We compare our method with a typical incremental evaluation method and show that the proposed method can give a significant performance enhancement.

In this paper, a novel method is proposed for designing two channel biorthogonal filter banks with general IIR filters, which satisfy both the perfect reconstruction and causal stable conditions. Since the proposed filter banks are structurally perfect reconstruction implementation, the perfect reconstruction property is still preserved even when all filter coefficients are quantized. The proposed design method is based on the formulation of a generalized eigenvalue problem by using Remez multiple exchange algorithm. Then, the filter coefficients can be computed by solving the eigenvalue problem, and the optimal solution is easily obtained through a few iterations. One design example is presented to demonstrate the effectiveness of the proposed method.

In this paper, we study the optimal allocation of multimedia files in distributed network systems. In these systems, the files are shared by users connected with different servers geographically separated, and each file must be stored in at least one of servers. Users can access any files stored in any servers connected with high-speed communication networks. Copies of the files accessed frequently are to be stored in several servers that have databases. So, it is one of the most important problems how to assign the files to servers in view of costs and delays. Considering these problems in heterogeneous network environments, we present a new system model that covers wide range of multimedia network applications like VOD, CALS, and so on. In these systems, it is obvious that there is trading-off relationship between costs and delays. Our objective is to find the optimal file allocation such that the total cost is minimized subject to the total delay. We introduce a 0-1 integer programming formulation for the optimization problem, and find the optimal file allocation by solving these formulae.

This paper presents an acceleration of test points selection for circuits designed by a full-scan based BIST scheme. In order to accelerate the test points selection based on cost minimization, and reflecting random pattern testability, we introduce three techniques, the simultaneous selection of plural test points, the simplified selection of test points by the cost reduction factor, and the reduction of the number of test point candidates. We implement a program based on the proposed techniques and evaluate its efficiency experimentally using large scale circuits (26 k-420 k gates).

The advantage of random testing is that test application can be performed at a low cost in the BIST scheme. However, not all circuits are random pattern testable due to the existence of random pattern resistant faults. In this paper, we present a method for improving the random pattern testability of logic circuits by partial circuit duplication approach. The basic idea is to detect random pattern resistant faults by using the difference between the duplicated part of a circuit and the original part. Experimental results on benchmark circuits show that high fault coverage can be achieved with a very small amount of hardware overhead.

We present a high-level synthesis scheme that considers weak testability of generated register-transfer level (RTL) data paths, as well as their area and performance. The weak testability, proposed in our previous work, is a testability measure of RTL data paths for non-scan design. In our scheme, we first extract a condition on resource sharing sufficient for weak testability from a data flow graph before synthesis, and treat the condition as design objectives in the following synthesis tasks. We propose heuristic synthesis algorithms which optimize area and the design objectives under the performance constraint.

We will present a partial scan design method based on n-fold line-up structures in order to achieve high fault efficiency and reduce test pattern generation time for practical LSIs. We will also present a partial scan design method based on the state justification of pure load/hold FFs in order to achieve high fault efficiency and reduce the number of scan FFs for practical LSIs with lots of load/hold FFs. Experimental results for practical LSIs show that our presented methods can achieve high fault efficiency (more than 99%) and reduce the number of scan FFs for the LSI with lots of load/hold FFs.

Error performance as well as ATM cell transfer characteristics in a new category of wireless access systems is discussed. Relocatable wireless access with neutral feature between the fixed and mobile systems can convey Mbit/s-order capacity with fairly high quality under line-of-sight propagation. It is an important question for such wireless access systems whether they are able to form a part of wired networks satisfying performance objectives specified in ITU-T Recommendations. This paper analyzes the characteristics of relocatable systems under Gamma-distribution fading environments, and clarifies quantitative relations between Bit Error Rate (BER), Severely Errored Second (SES), Errored Second (ES) and Cell Loss Ratio (CLR) in a calculation model employing QPSK and typical HEC (Header Error Control). Thus it is demonstrated for the first time that in most cases the dominant parameter is the SES objective. Also it will be possible for a relocatable system with appropriate fade margin to meet the ITU-T performance specifications.

For a real Schur polynomial, estimates are derived for a Schur stability margin in terms of matrix entries or tableau entries in some stability test methods. An average size of the zeros of the polynomial is also estimated. These estimates enable us to obtain more information than stability once a polynomial is tested to be stable via the established Schur stability criterion for real polynomials.