In this paper, the efficient structure of an LUT (look-up table) for an asynchronous reconfigurable PCA (Plastic Cell Architecture) device is investigated. A total of 15 types of implementation alternatives for LUTs are evaluated and compared in an empirical manner in which full custom layout design is developed and simulated. The evaluation results show that by introducing transmission gates in memory cells in an LUT, read time can be improved by 14.3% at the cost of 13.6% area increase compared to a conventional speed oriented implementation. It is also shown that use of transmission gates reduces 6.4% of area and 19.2% of read time against a conventional area oriented LUT implementation.

To sample a band-limited analog signal directly from the high frequency down to the baseband for the digital signal processing with significantly reduced computation, several concepts of the bandpass sampling are introduced. In this paper, a robust bandpass sampling scheme when there exist frequency deviations due to the channel effect and hardware instability is proposed for practical use, and the effects of the frequency deviations are discussed to select a proper sampling frequency.

This paper describes a new special purpose Variable Gain Amplifier (VGA) using 0.5µm digital CMOS process. The new architecture allows the gain to be varied more than 20dB, and does not trade bandwidth for gain. Despite low power consumption (22mW) from a 3.3 Volt supply, the circuit has 310MHz -3dB bandwidth and shows low THD (-45dB) over its full frequency range. The new VGA architecture does not use any capacitor or resistor array for gain adjustment, thus it is very compact (0.14mm 0.26mm) and requires less power than conventional designs.

As an enhancement mechanism for the end-to-end congestion control, AQM (Active Queue Management) can keep smaller queuing delay and higher throughput by purposefully dropping the packets at the intermediate nodes. Comparing with RED algorithm, although the PI (Proportional-Integral) controller for AQM designed by C. Hollot improves the stability, it seems unscientific to tune the controller parameters through trial-error, moreover the transient performance of the PI controller is not perfect, such as the regulating time is too long. In order to overcome this drawback, in this paper, the PID (Proportional-Integral-Differential) controller is proposed to speed up the responsiveness of AQM system. The controller parameters are tuned based on the determined gain and phase margins. The simulation results show that the integrated performance of the PID controller is obviously superior to that of the PI controller.

This paper describes a highly-portable multilingual question answering system on multiple relational databases. We apply techniques which were verified on open-domain text-based question answering, such as semantic category and pattern-based grammars, into natural language interfaces to relational databases. Lexico-semantic pattern (LSP) and multi-level grammars achieve portability of languages, domains, and DB management systems. The LSP-based linguistic processing does not require deep analysis that sacrifices robustness and flexibility, but can handle delicate natural language questions. To maximize portability, we drive three dependency factors into the following two parts: language-dependent part into front linguistic analysis, and domain-dependent and database-dependent parts into backend SQL query generation. We also support session-based dialog by preserving SQL queries created from previous user's question, and then re-generating new SQL query for the successive questions. Experiments with 779 queries generate only constraint-missing errors, which can be easily corrected by adding new terms, of 2.25% for English and 5.67% for Korean.

We introduce a PLL (Phase Locked Loop) for low-power and a low supply voltage applications. Because the PLL is a key device of the system LSIs used in mobile terminals, it is very important that PLLs operate under a low supply voltage to reduce power consumption. We investigate the limitations of the conventional VCO that we proposed in Ref.[5] and propose a modified VCO that uses common load transistors. Furthermore, we propose a charge pump that uses a dynamic output stage op-amp and a stability technique for the CMOS process, and it does not contain any special resistors. The results of an evaluation of a device fabricated using a standard logic 0.18-µm CMOS process demonstrated that the proposed PLL operated above 1.0 GHz with a 1.2-V supply voltage and it produced only a small amount of jitter that was lower than 78 psp-p.

Traditionally, UNIX has been weak in data sharing. By data sharing, we mean that multiple cooperative processes concurrently access and update the same set of data. As the degree of sharing (the number of cooperative processes) increases, the existing UNIX virtual memory systems run into page table thrashing, which causes a major performance bottleneck. Once page table thrashing occurs, UNIX performs miserably regardless of the hardware platforms it is running on. This is a critical problem because UNIX is increasingly used in environments such as banking that require intensive data sharing. We consider several alternatives to avoid page table thrashing, and propose a solution of which the main idea is to share page tables in virtual memory. Extensive experiments have been carried out with real workloads, and the results show that the shared page table solution avoids the page table thrashing and improves the performance of UNIX by an order of magnitude.

A blind equalizer which uses the differential constant modulus algorithm (DCMA) is introduced. An anchored FIR equalizer applied to a first-order autoregressive channel and updated according to the DCMA is shown to converge to the inverse of that channel regardless of the initial tap-weights and the gain along the direct path.

The purpose of a testability analysis program is to estimate the difficulty of testing a fault. A good measurement can give an early warning about the testing problem so as to provide guidance in improving the testability of a circuit. There have been researches attempting to efficiently compute the testability analysis. Among those, the Controllability and Observability Procedure COP can calculate the testability value of a stuck-at fault efficiently in a tree-structured circuit but may be very inaccurate for a general circuit. The inaccuracy in COP is due to the ignorance of signal correlations. Recently, the algorithm of TAIR in [5] proposes a testability analysis algorithm, which starts from the result of COP and then gradually improves the result by applying a set of rules. The set of rules in TAIR can capture some signal correlations and therefore the results of TAIR are more accurate than COP. In this paper, we first prove that the rules in TAIR can be replaced by a closed-form formulation. Then, based on the closed-form formulation, we proposed two novel techniques to further improve the testability analysis results. Our experimental results have shown improvement over the results of TAIR.

We suggest a new probe message structure and an efficient probe-based deadlock detection and recovery algorithm that can be used in distributed database systems. We determine the characteristics of the probe messages and suggest an algorithm that can reduce the communication cost required for deadlock detection and recovery.

As demonstrated by many studies, measured wide-area network traffic exhibits fractal properties, such as self-similarity, burstiness, and long-range dependence (LRD). In order to describe long-range dependent network traffic and to emphasize the performance aspects of descriptive traffic models with additive and multiplicative structures, the multifractal wavelet model (MWM), which is based on the binomial cascade, has been shown to match the behavior of network traffic over small and large time scales. In this paper, using appropriate mathematical and statistical analyses, we develop the MWM proposed in [14], which provides a complete description of long-range dependent network traffic. First, we present accurate parameters of the MWM over different time scales. Next, a marginal stable distribution of MWM network traffic data is analyzed. The accuracy of the proposed MWM compared to actual data measurements is confirmed by queuing behavior performance through computer simulations.

We present the effects of N2O plasma treatment for hot carrier reliability and gate oxide stability in excimer-laser annealed poly-Si TFTs. N2O plasma treatment between SiO2 and poly-Si suppresses both the reduction in mobility caused by hot carrier stress and the Vth shift caused by gate bias stress. The results of XPS spectra and the energy distribution of the trap state density of stressed TFTs show that the introduction of Si-N bonds plays an important role in poly-Si TFT reliability.

This paper presents an architecture for a table-lookup (TLU) engine that allows the real-time operation of complicated TLU for telecommunications, such as the longest prefix match (LPM) and the long-bit match in packet classification. The engine consists of many CAM (Content Addressable Memory) chips, which are classified into several groups. When actual TLU is performed, the entries in each CAM group are searched simultaneously, and the best entry candidate in each group is selected by an intra-group arbiter. The final output, the entry desired, is decided by an inter group arbiter that selects one group. This hierarchical structure of arbitration is the key to the scalability of the engine. To accelerate the operation speed of the engine, we introduce a novel mechanism called "hit-flag look-ahead" that sends a hit-flag signal from each matched CAM chip to the inter group arbiter before each intra group arbiter calculates the best CAM output in the group. We show that a TLU engine based on the above architecture achieves significantly fast performance compared to engines based on conventional techniques, especially in the case of a large number of entries with long-bit matching. Furthermore, our architecture can realize an 33.3 Mlps (lookups per second) within a 128 bit 300,000-entry table at wire speed.

A procedure to remove redundancies in sequential circuits is proposed using strongly unreachable states, which are the states with no incoming transitions. Test generation is used to find undetectable faults related to two or more strongly unreachable states. Experimental results show the new procedure can find more redundancies of sequential circuits.

This paper proposes a test generation method using a compacted test table and a test generation method using a compacted test plan table for RTL data path circuits with DFT where hierarchical test generations are applicable. Moreover, a heuristic algorithm for a compacted test plan table generation is proposed. The proposed methods could shorten test lengths for some RTL data path circuits compared with the conventional hierarchical test generation method.

In this paper we analyze an asymptotic stability of nonlinear singularly perturbed systems and propose a composite control with gain scheduling where the fast controller is the gain scheduled controller and the slow state plays a role of slowly varying parameters in gain scheduling. Specifically, the slow controller is designed by the slow manifold to stabilize the reduced slow system. As a result, the slow manifold of the system is the same as the designed manifold.

This paper investigates the behavior of one-dimensional discrete-time binary cellular neural networks with both the A- and B-templates and gives the necessary and sufficient conditions for the above network to be stable for unspecified fixed boundaries.

Cellular Neural Networks (CNNs) have been developed as a high-speed parallel signal-processing platform. In this paper, a generalized two-layer cellular neural network model is proposed for image processing, in which two templates are introduced between the two layers. We found from the simulations that the two-layer CNNs efficiently behave compared to the single-layer CNNs for the many applications of image processing. For examples, simulation problems such as linearly non-separable task--logic XOR, center point detection and object separation, etc. can be efficiently solved with the two-layer CNNs. The stability problems of the two-layer CNNs with symmetric and/or special coupling templates are also discussed based on the Lyapunov function technique. Its equilibrium points are found from the trajectories in a phase plane, whose results agree with those from simulations.

This paper gives a new sufficient condition for cellular neural networks with delay (DCNNs) to be completely stable. The result is a generalization of two existing stability conditions for DCNNs, and also contains a complete stability condition for standard CNNs as a special case. Our new sufficient condition does not require the uniqueness of equilibrium point of DCNNs and is independent of the length of delay.

A new type of triple-band antenna is introduced by combing a tab monopole antenna (TMA) and a planar inverted F antenna (PIFA). The antenna configuration is shown to operate at three discrete frequencies: GSM 900, GSM 1800 (DCS) and GSM 1900 (PCS). The performance of an antenna is presented as well as the results of the computer simulations with a software package based on the Finite Element Method. The simulated results with the real antenna's experimental results. The advantage of the design suggested in this paper is its simplicity of manufacturing and low cost.