Toward the age of ultra-high-density digital ULSI systems, the development of new integrated circuits suitable for an ultimately fine geometry feature size will be an important issue. Resonant-tunneling (RT) diodes and transistors based on quantum effects in deep submicron geometry are such kinds of key devices in the next-generation ULSI systems. From this point of view, there has been considerable interests in RT diodes and transistors as functional devices for circuit applications. Especially, it has been recognized that RT functional devices with multiple peaks in the current-voltage (I-V) characteristic are inherently suitable for implementing multiple-valued circuits such as a multiple-state memory cell. However, very few types of the other multiple-valued logic circuits have been reported so far using RT devices. In this paper, a new multiple-valued programmable logic array (MVPLA) based on RT devices is proposed for the next-generation ULSI-oriented hardware implementation. The proposed MVPLA consists of 3 basic building blocks: a universal literal circuit, an AND circuit and a linear summation circuit. The universal literal circuit can be directly designed by the combination of the RT diodes with one peak in the I-V characteristic, which is programmable by adjusting the width of quantum well in each RT device. The other basic building blocks can be also designed easily using the wired logic or current-mode wired summation. As a result, a highdensity RT-diode-based MVPLA superior to the corresponding binary implementation can be realized. The device-model-based design method proposed in this paper is discussed using static characteristics of typical RT diode models.

We observed a ship as a radar target embedded in sea clutter using a millimeter wave radar. The shape of the ship and sea clutter were discriminated by using texture analysis in image processing. As a discriminator, a nonlinear transformation of a local pattern was defined to deal with high order statistics.

An automatic tap assignment method in sub-band adaptive filter is proposed in this letter. The number of taps of the adaptive filter in each band is controlled by the mean-squared error. The numbers of taps increase in the bands which have large errors, while they decrease in the bands having small errors, until residual errors in all the bands become the same. In this way, the number of taps in a band is roughly proportional to the length of the impulse response of the unknown system in this band. The convergence rate and the residual error are improved, in comparison with existing uniform tap assignment. Effectiveness of the proposed method has been confirmed through computer simulation.

In a two-layer self-diplexing antenna fed at two ports, theoretical analysis has already shown that the isolation characteristics can be improved by adjusting the angle between the feed locations of the transmitting and receiving antennas. In this letter, we experimentally investigate the isolation characteristics of the self-diplexing array antenna. First, calculated and experimental results for each feed location of the element antenna are compared and good agreement is found. Second, experimental results with a 19-element planar array indicate that a self-diplexing antenna with suitably chosen feed configuration is effective in improving the isolation in a phased array antenna.

This paper describes the architecture and simulated performance of a proposed Integrated Memory Array Processor (IMAP). The IMAP is an LSI which integrates a large capacity memory and a one dimensional SIMD processor array on a single chip. The IMAP holds, in its on-chip memory, data which at the same time can be processed using a one dimensional SIMD processor integrated on the same chip. All processors can access their individual parts of memory columns at the same time. Thus, it has very high processor-memory data transfer bandwidth, and has no memory access bottleneck. Data stored in the memory can be accessed from outside of the IMAP via a conventional memory interface same as a VRAM. Since the SIMD processors on the IMAP are configured in a one dimensional array, multiple IMAPs could easily be connected in series to create a larger processor and memory configuration. To estimate the performance of such an IMAP, a system architecture and instruction set were first defined, and on the basis of those two, a simulator and an assembly language were then developed. In this paper, simulation results are presented which indicate the performance of an IMAP in both image processing and artificial neural network calculations.

The main propagation effect on interference between a satellite system and an adjacent microwave terrestrial path is the differential rain attenuation. In the present paper, a prediction method for the differential rain attenuation statistics is proposed which is based on a model convective rain-cell structure of the rainfall medium. The assumption that the point rainfall statistics follows a lognormal form is also adopted. The results of the predictive procedure are compared with the only available set of experimental data taken from Yokosuka, Japan. The agreement has been found to be quite reasonable.

This paper's main objective is to analyze several procedures which select the model g among a set G of stochastic models to minimize the value of an information criterion in the form of L(g)H[g](zn)+(k(g)/2)c(n), where zn is the n observed data emitted by an information source θ which consists of the model gθ∈G and k(gθ) mutually independent stochastic parameters in the model gθ∈G, H[g](zn) is (-1) (the maximum log likelihood value of the data zn with respect to a model g∈G), and c(n) is a predetermined function (penalty function) of n which controls the amount of penalty for increasing the model size. The result is focused on specific performances when the information criteria are applied to the framework of so-called state decomposition. Especially, upper bounds are derived of the following two performance measures for each penalty function c(n): the error probability of the model selection, and the average Kullback-Leibler information between the true information source and the estimated information source.

It is known that the resolution conversion based on orthogonal transform has a problem that is difference of luminance between the converted image and the original. In this paper, the scale factor of the system employing various orthogonal transforms is generally formulated by considering the DC gain, and the condition of alias free for DC component is indicated. If the condition is satisfied, then the scale factor is determined by only the basis functions.

In this paper we discuss a neural network model that can recognize patterns rotated at various angles. The model employs copy learning, a learning method entirely different from those used in conventional models. Copy-Learning is an effective learning method to attain the desired objective in a short period of time by making a copy of the result of basic learning through the application of certain rules. Our model using this method is capable of recognizing patterns rotated at various angles without requiring mathematical preprocessing. It involves two processes: first, it learns only the standard patterns by using part of the network. Then, it copies the result of the learning to the unused part of the network and thereby recognizes unknown input patterns by using all parts of the network. The model has merits over the conventional models in that it substantially reduces the time required for learning and recognition and can also recognize the rotation angle of the input pattern.

This paper proposes a multi-layer cellular network in which a self-organizing method is implemented. The network is developed for the purpose of data clustering and recognition. A multi-layer structure is presented to realize the sophisticated combination of several sub-spaces which are spanned by given input characteristic data. A self-organizing method is useful for evaluating the set of clusters for input data without a supervisor. Thus, using these techniques this network can provide good clustering ability as an example for image/pattern data which have complicated and structured characteristics. In addition to the development of this algorithm, this paper also presents a parallel VLSI architecture for realizing the mechanism with high efficiency. Since the locality can be kept among all processing elements on every layer, the system is easily designed without large global data communication.

In order to describe the flow passing through the glottis, we constructed a dynamic three-dimensional finite element model of the human larynx. The transient flow fields in the laryngeal model were calculated to examine the dynamic effects generated by the vocal fold vibration. A phase difference between the upper and lower edges of the vocal folds was included in the model to investigate the effect of the glottal shapes on pressure-flow relationships in the larynx during the vocal fold vibration. Using STAR-CD thermofluids analysis system, which is capable of treating the transient flow in moving-boundary situations with finite volume method, we solved the viscous incompressible Navier-Stokes equations to investigate the glottal flows and transglottal pressures as a function of the vocal fold vibration. The results were compared to the uniform glottis model and the theoretical model proposed by Ishizaka and Matsudaira, respectively. The effects of dynamic factors on the pressure distributions and flow patterns in the larynx resulting from the vocal-fold vibration were also discussed.

This letter reports a high-sensitivity GaAs decision IC for ultra-high-speed optical transmission systems. The IC was designed using LSCFL (Low-power Source Coupled FET Logic) and fabricated with 0.2-µm-gate-length MESFETs with a cut-off frequency of 50GHz. The input voltage sensitivity was 35mV at 10Gbit/s. This is the highest sensitivity ever reported for a MESFET decision IC.

The test pattern generation for sequential circuits is more difficult than that for combinational circuits due to the presence of memory elements. Therefore we proposed a method for synthesizing sequential circuits with testability in the level of state transition table. The state transition table is augmented by adding extra two inputs so that it possesses a distinguishing sequence, a synchronizing sequence, and transfer sequences of short length. In this case the checking sequence which do a complete verification of the circuit can be test pattern. The checking sequence have been impractical due to the longer checking sequence required. However, in this paper, we have discussed the condition to reduce the length of checking sequence, then by using suitable state assignment codes sequential circuits with much shorter checking sequences can be realized. A heuristic algorithm of the state assignment which reduce the length of checking sequence is proposed and the algorithm and reduced checking sequence are presented with simple example. The state assignment is very simple with the state matrix which represents the state transition. Furthermore some experimental results of automated synthesis for the MCNC Logic Synthesis Workshop finite state machine benchmark set have shown that the state assignment procedure is efficient for reducing checking sequences.

In our recent work, a forward test generation method for sequential circuits by using a single time frame was proposed. In order to improve the effectiveness of the method, we introduced an extended mode which can handle the two time frames for a hard-to-test fault and a state escaping phase which can detect a sequence of unsuitable states for test generation. The experimental results show that the improved method is effective in generating higher coverage tests with a small number of tests.

To improve measurement accuracy and speed, a switched-capacitor capacitance measurement circuit with the vernier scale is developed. Its process consists of a coarse measurement by charge-balancing A-D conversion and a fine measurement by single-slope A-D conversion. a prototype using discrete components confirms the principles of operation.

We developed programmable high-performance and high-speed neurocomputer for a large neural network using ASIC neurocomputing chips made by CMOS VLSI technology. The neurocomputer consists of one master node and multiple slave nodes which are connected by two data paths, a broadcast bus and a ring bus. The nodes are made by ASIC chips and each chip has plural nodes in it. The node has four types of computation hardware that can be cascaded in series forming a pipeline. Processing speed is proportional to the number of nodes. The neurocomputer is built on one printed circuit board having 65 VLSI chips that offers 1.5 billion connections/sec. The neurocomputer uses SIMD for easy programming and simple hardware. It can execute complicated computations, memory access and memory address control, and data paths control in a single instruction and in a single time step using the pipeline. The neurocomputer processes forward and backward calculations of multilayer perceptron type neural networks, LVQ, feedback type neural networks such as Hopfield model, and any other types by programming. To compute neural computation effectively and simply in a SIMD type neurocomputer, new processing methods are proposed for parallel computation such as delayed instruction execution, and reconfiguration.

In this paper, we present an efficient method for the fault simulation of the reconvergent fan-out stem. Our method minimizes the fault propagating region by analyzing the topology of the circuit, whose region is smaller than that of Tulip's. The efficiency of our method is illustrated by experimental results for a set of benchmark circuits.

In this letter, a new structure of adaptive IIR notch filter is presented. The structure is based on direct form realization and uses the similar adaptation algorithm given in Ref. (4). A quantitative analysis for convergence properties is developed. It is shown that the proposed structure shows superior performance comparing with previously proposed designs. The results of computer simulations are presented to substantiate the analysis.

The matrix whose eigenvectors are the basis vectors of the DCT is introduced. This matrix leads to a convolution-product property using the DCT. Based on the property, the parameter of uniform blur, such as motion blur or out-of-focus blur, is estimated from the local minima of the DCT energy spectrum of a blurred image. Computer experiments confirmed that the DCT is superior to the DFT for estimating the parameter.

This letter proposes an LSP quantizing method which uses interframe correlation of the parameters. The quantized parameters are represented as a moving average of code vectors. Using this method, LSP parameters are quantized efficiently and the degradation of decoded parameters caused by bit errors affects only a few following frames.