Although many companies have developed robots that assist humans in the activities of daily living, safety requirements and test methods for such robots have not been established. Given the risk associated with a robot malfunctioning in the human living space, from the viewpoints of safety and EMC, it is necessary that the robot does not create a hazardous situation even when exposed to possibly severe electromagnetic disturbances in the operating environment. Thus, in immunity tests for personal care robots, the safety functions should be more rigorously tested than the other functions, and be repeatedly activated in order to ascertain that the safety functions are not lost in the presence of electromagnetic disturbances. In this paper, immunity test procedures for personal care robots are proposed that take into account functional safety requirements. A variety of test apparatuses are presented, which were built for activating the safety functions of robots, and detecting whether they were in a safe state. The practicality of the developed immunity test system is demonstrated using actual robots.

High Efficiency Video Coding (HEVC) is the latest video coding standard that is supported by JCT-VC. In this letter, an encoding algorithm for early termination of Coding Unit (CU) and Prediction Unit (PU) based on the texture direction is proposed for the HEVC intra prediction. Experimental results show that the proposed algorithm provides an average 40% total encoding time reduction with the negligible loss of rate-distortion.

The authors have evaluated a method of expanding the bit depth of image signals called SGRAD, which requires fewer calculations, while degrading the sharpness of images less. Where noise is superimposed on image signals, the conventional method for obtaining high bit depth sometimes incorrectly detects the contours of images, making it unable to sufficiently correct the gradation. Requiring many line memories is also an issue with the conventional method when applying the process to vertical gradation. As a solution to this particular issue, SGRAD improves the method of detecting contours with transiting gradation to effectively correct the gradation of image signals which noise is superimposed on. In addition, the use of a prediction algorithm for detecting gradation reduces the scale of the circuit with less correction of the vertical gradation.

Recently, the wavelet-based estimation method has gradually been becoming popular as a new tool for software reliability assessment. The wavelet transform possesses both spatial and temporal resolution which makes the wavelet-based estimation method powerful in extracting necessary information from observed software fault data, in global and local points of view at the same time. This enables us to estimate the software reliability measures in higher accuracy. However, in the existing works, only the point estimation of the wavelet-based approach was focused, where the underlying stochastic process to describe the software-fault detection phenomena was modeled by a non-homogeneous Poisson process. In this paper, we propose an interval estimation method for the wavelet-based approach, aiming at taking account of uncertainty which was left out of consideration in point estimation. More specifically, we employ the simulation-based bootstrap method, and derive the confidence intervals of software reliability measures such as the software intensity function and the expected cumulative number of software faults. To this end, we extend the well-known thinning algorithm for the purpose of generating multiple sample data from one set of software-fault count data. The results of numerical analysis with real software fault data make it clear that, our proposal is a decision support method which enables the practitioners to do flexible decision making in software development project management.

Mobile IPv6 is an IETF (Internet Engineering Task Force) standard which permits node mobility in IPv6. To manage mobility, it establishes a centralized mediator, Home Agent (HA), which inevitably introduces several penalties like triangular routing, single point of failure and limited scalability. Some later extensions such as Global HAHA, which employed multiple HAs, made to alleviate above shortcomings by introducing Distributed Mobility Management (DMM) approach. However, Multiple HA model will not be beneficial, unless the HAs are located finely. But, no major research paper has focused on locating HAs. This paper examines impact of single and multiple HA placements in data plane, by using an Autonomous System (AS) level topology consisting of 30,000 nodes with several evaluation criteria. All possible placements of HA(s) are analysed on a fair, random set of 30,000 node pairs of Mobile Nodes (MN) and Correspondent Nodes (CN). Ultimate result provides a concise account of different HA placements: i.e. cost centrality interprets performance variation better than degree centrality or betweenness. 30,000 ASs are classified into three groups in terms of Freeman's closeness index and betweenness centrality: 1) high range group, 2) mid range group, and 3) low range group. Considering dual HA placement, if one HA is placed in an AS in the high range group, then any subsequent HA placement gives worse results, thus single HA placement is adequate. With the mid range group, similar results are demonstrated by the upper portion of the group, but the rest yields better results when combined with another HA. Finally, from the perspective of low range group, if the subsequent HA is placed in the high range group, it gives better result. On the other hand, betweenness based grouping yields varying results. Consequently, this study reveals that the Freeman's closeness index is most appropriate in determining impacts of HA placements among considered indices.

Available bandwidth, along with latency and packet loss rate, is an essential metric for the efficient operation of overlay network applications. However, the measurement of available bandwidth creates a larger traffic overhead than other metrics. Measurement conflicts on route-overlapping paths can also seriously degrade measurement accuracy and cause a non-negligible increase in the network load. In this paper, we propose a distributed method for measuring the available bandwidth in overlay networks that can reduce measurement conflicts while maintaining high measurement accuracy at low cost. Our main idea is that neighboring overlay nodes exchange route information to detect overlapping paths and share the measurement results of overlapping paths to configure parameter settings for available bandwidth measurements. Our simulation results show that the relative errors in the measurement results of our method are approximately only 65% of those of the existing method. The measurement accuracy of our method remains better than that of the existing method when the total measurement traffic loads of both methods are equal.

In this paper, we investigate a combination scheme of subcarrier intensity-modulation (SIM) with spatial modulation (SM) for optical wireless communication. Using computer simulation, the performances of the proposed SIM/SM scheme are investigated and compared with those of the conventional SIM scheme in the additive white gaussian noise (AWGN) as well as in outdoor environment with turbulence induced fading characteristics. Numerical results show that the proposed SIM/SM scheme can outperform the conventional SIM in an environment with different spectral efficiencies. When the spectral efficiency is varied from 2bits/s/Hz to 4bits/s/Hz, an Eb/N0 gain of 2dB to 5dB is achieved, when the bit error rate of 10-5 is maintained. It shows that the employment of SM may further improve the power efficiency of SIM, when the number of subcarriers increases according to the spectral efficiency. When the spectral efficiency is 4bits/s/Hz, the SIM/SM scheme for 0.5 of log-irradiance variance in the log-normal turbulence channel shows the same performance as SIM with variance of 0.3. This means that the SIM/SM can be an alternative choice in even worse environments.

Hassoune and O'Connor proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) that generates Boolean functions by using double-gate (DG) carbon nanotube (CNT) FETs, which have an ambipolar property. O'Connor et al. proposed a DRDLC that generates 14 Boolean functions asing two Boolean inputs with seven transistors. Furthermore, DRDLCs that generates all 16 Boolean functions have been proposed. In this paper, we focus on the design of a dynamic logic circuit with n Boolean inputs. First, we show a DRDLC that generates the monomial Boolean functions. Next, we propose a DRDLC that generates the whole set of Boolean functions consisting of t terms or less. Finally, we report the number of Boolean functions generated by the proposed DRDLC.

Distance bounding protocols permit a verifier to compute the distance to a prover by measuring the execution time of n rounds of challenge-response authentication. Many protocols have been proposed to reduce the false acceptance rate of the challenge-response procedure. Until now, it has been widely believed that the lowest bound of the false acceptance rate is (1/2)n when n is the number of rounds and the prover can send only one response bit for each round. In this paper, we propose a new distance bounding protocol whose false acceptance rate is (1/3)n against the distance fraud attacks and the mafia fraud attacks. To reduce the false acceptance rate, we use two challenge bits for each iteration and introduce a way of expressing three cases with the use of only one response bit, the same bit length as existing protocols. Our protocol is the first distance bounding protocol whose false acceptance rate is lower than the currently believed minimal bound without increasing the number of response bits for each round.

To realize usability in software, GUI (Graphical User Interface) layouts must be consistent because consistency allows end users to operate software based on previous experiences. Often consistency can be achieved by user interface guidelines, which realize consistency in a software package as well as between various software packages within a platform. Because end users have different experiences and perceptions, GUIs based on guidelines are not always usable for end users. Thus, it is necessary to realize consistency without guidelines. Herein we propose a method to realize consistent GUIs where existing software packages are surveyed and common patterns for window layouts, which we call layout rules, are specified. Our method uses these layout rules to arrange the windows of GUIs. Concretely, source programs of developed GUIs are analyzed to identify the layout rules, and then these rules are used to extract parameters to generate source programs of undeveloped GUIs. To evaluate our method, we applied it to existing GUIs in software packages to extract the layout rules from several windows and to generate other windows. The evaluation confirms that our method easily realizes layout consistency.

Collaborative business has been increasingly developing with the environment of globalization and advanced information technologies. In a collaboration environment with multiple organizations, participants from different organizations always have different views about modeling the overall business process due to different knowledge and cultural backgrounds. Moreover, flexible support, privacy preservation and process reuse are important issues that should be considered in business process management across organizational boundaries. This paper presents a novel approach of modeling interorganizational business process for collaboration. Our approach allows for modeling loosely coupled interorganizational business process considering different views of organizations. In the proposed model, organizations have their own local process views of modeling business process instead of sharing pre-defined global processes. During process cooperation, local process of an organization can be invisible to other organizations. Further, we propose the coordination mechanisms for different local process views to detect incompatibilities among organizations. We illustrate our proposed approach by a case study of interorganizational software development collaboration.

Due to the recent technical advances, GPUs are used for general applications as well as screen display. Many research results have been proposed to the performance of previous CPU-based algorithms by a few hundred times using the GPUs. In this paper, we propose a density-based clustering algorithm called GSCAN, which reduces the number of unnecessary distance computations using a grid structure. As a result of our experiments, GSCAN outperformed CUDA-DClust [2] and DBSCAN [3] by up to 13.9 and 32.6 times, respectively.

Toward the actualization of an automatic navigation system for fetoscopic tracheal occlusion (FETO) surgery, this paper proposes a 3D ultrasound (US) calibration-based approach that can locate the fetal facial surface, oral cavity, and airways by a registration between a 3D fetal model and 3D US images. The proposed approach consists of an offline process and online process. The offline process first reconstructs the 3D fetal model with the anatomies of the oral cavity and airways. Then, a point-based 3D US calibration system based on real-time 3D US images, an electromagnetic (EM) tracking device, and a novel cones' phantom, computes the matrix that transforms the 3D US image space into the world coordinate system. In the online process, by scanning the mother's body with a 3D US probe, 3D US images containing the fetus are obtained. The fetal facial surface extracted from the 3D US images is registered to the 3D fetal model using an ICP-based (iterative closest point) algorithm and the calibration matrices, so that the fetal facial surface as well as the oral cavity and airways are located. The results indicate that the 3D US calibration system achieves an FRE (fiducial registration error) of 1.49±0.44mm and a TRE (target registration error) of 1.81±0.56mm by using 24 fiducial points from two US volumes. A mean TRE of 1.55±0.46 mm is also achieved for measuring location accuracy of the 3D fetal facial surface extracted from 3D US images by 14 target markers, and mean location errors of 2.51±0.47 mm and 3.04±0.59 mm are achieved for indirectly measuring location accuracy of the pharynx and the entrance of the trachea, respectively, which satisfy the requirement of the FETO surgery.

The transfer of prior knowledge from source domains can improve the performance of learning when the training data in a target domain are insufficient. In this paper we propose a new strategy to transfer deformable part models (DPMs) for object detection, using offline-trained auxiliary DPMs of similar categories as source models to improve the performance of the target object detector. A DPM presents an object by using a root filter and several part filters. We use these filters of the auxiliary DPMs as prior knowledge and adapt the filters to the target object. With a latent transfer learning method, appropriate local features are extracted for the transfer of part filters. Our experiments demonstrate that this strategy can lead to a detector superior to some state-of-the-art methods.

To improve metal oxide semiconductor field effect transistors (MOSFET) performance, flat interface between gate insulator and silicon (Si) should be realized. In this paper, the influence of Si surface roughness on electrical characteristics of MOSFET with hafnium oxynitride (HfON) gate insulator formed by electron cyclotron resonance (ECR) plasma sputtering was investigated for the first time. The surface roughness of Si substrate was reduced by Ar/4.9%H2 annealing utilizing conventional rapid thermal annealing (RTA) system. The obtained root-mean-square (RMS) roughness was 0.07nm (without annealed: 0.18nm). The HfON was formed by 2nm-thick HfN deposition followed by the Ar/O2 plasma oxidation. The electrical properties of HfON gate insulator were improved by reducing Si surface roughness. It was found that the current drivability of fabricated nMOSFETs was remarkably increased by reducing Si surface roughness. Furthermore, the reduction of Si surface roughness also leads to decrease of the 1/f noise.

In this letter, we exploit a new framework for detecting the non-specific object via combing the top-down and bottom-up cues. Specifically, a novel supervised discriminative dictionaries learning method is proposed to learn the coupled dictionaries for the object and non-object feature spaces in terms of the top-down cue. Different from previous dictionary learning methods, the new data reconstruction residual terms of coupled feature spaces, the sparsity penalty measures on the representations and an inconsistent regularizer for the learned dictionaries are all incorporated in a unitized objective function. Then we derive an iterative algorithm to alternatively optimize all the variables efficiently. Considering the bottom-up cue, the proposed discriminative dictionaries learning is then integrated with an unsupervised dictionary learning to capture the objectness windows in an image. Experimental results show that the non-specific object detection problem can be effectively solved by the proposed dictionary leaning framework and outperforms some established methods.

With the scaling of CMOS technology into the nanometer regime, the overshooting effect is more and more obvious and has a significant influence to gate delay and power consumption. Recently, researchers have already proposed the overshooting effect models for an inverter. However, the accurate overshooting effect model for multiple-input gates is seldom presented and the existing technology to reduce a multiple-input gate to an inverter is not useful when modeling the overshooting effect for multiple-input gates. Therefore, modeling the overshooting effect for multiple-input gates is proposed in this paper. Firstly, a formula-based model is presented for the overshooting time of 2-input NOR gate. Then, more complicated methods are given to calculate the overshooting time of 3-input NOR gate and other multiple-input gates. The proposed model is verified to have a good agreement, within 3.4% error margin, compared with SPICE simulation results using CMOS 32nm PTM model.

Computational fluid dynamics (CFD) is an important tool for designing aircraft components. FaSTAR (Fast Aerodynamics Routines) is one of the most recent CFD packages and has various subroutines. However, its irregular and complicated data structure makes it difficult to execute FaSTAR on parallel machines due to memory access problem. The use of a reconfigurable platform based on field programmable gate arrays (FPGAs) is a promising approach to accelerating memory-bottlenecked applications like FaSTAR. However, even with hardware execution, a large number of pipeline stalls can occur due to read-after-write (RAW) data hazards. Moreover, it is difficult to predict when such stalls will occur because of the unstructured mesh used in FaSTAR. To eliminate this problem, we developed an out-of-order mechanism for permuting the data order so as to prevent RAW hazards. It uses an execution monitor and a wait buffer. The former identifies the state of the computation units, and the latter temporarily stores data to be processed in the computation units. This out-of-order mechanism can be applied to various types of computations with data dependency by changing the number of execution monitors and wait buffers in accordance with the equations used in the target computation. An out-of-order system can be reconfigured by automatic changing of the parameters. Application of the proposed mechanism to five subroutines in FaSTAR showed that its use reduces the number of stalls to less than 1% compared to without the mechanism. In-order execution was speeded up 2.6-fold and software execution was speeded up 2.9-fold using an Intel Core 2 Duo processor with a reasonable amount of overhead.

Pseudo-random sequences with high linear complexity play important roles in many domains. We give linear complexity of generalized cyclotomic quaternary sequences with period pq over Z4 via the weights of its Fourier spectral sequence. The results show that such sequences have high linear complexity.

Turbo mode, which accelerates many applications without major change of existing systems, is widely used in commercial processors. Since time duration or powerfulness of turbo mode depends on peak temperature of a processor chip, reducing the peak temperature can reinforce turbo mode. This paper presents that adding small amount of hardware allows microprocessors to reduce the peak temperature drastically and then to reinforce turbo mode successfully. Our approach is to find out a few small units that become heat sources in a processor and to appropriately duplicate them for reduction of their power density. By duplicating the limited units and using the copies evenly, the processor can show significant performance improvement while achieving area-efficiency. The experimental result shows that the proposed method achieves up to 14.5% of performance improvement in exchange for 2.8% of area increase.