In this paper, we propose a hybrid fuzzy geometric active contour method, which embeds the spatial fuzzy clustering into the evolution of geometric active contour. In every iteration, the evolving curve works as a spatial constraint on the fuzzy clustering, and the clustering result is utilized to construct the fuzzy region force. On one hand, the fuzzy region force provides a powerful capability to avoid the leakages at weak boundaries and enhances the robustness to various noises. On the other hand, the local information obtained from the gradient feature map contributes to locating the object boundaries accurately and improves the performance on the images with heterogeneous foreground or background. Experimental results on synthetic and real images have shown that our model can precisely extract object boundaries and perform better than the existing representative hybrid active contour approaches.

In this paper, we present a real-time hand pose recognition method to provide an intuitive user interface through hand poses or gestures without a keyboard and a mouse. For this, the areas of right and left hands are segmented from the depth camera image, and noise compensation is performed. Then, the rotation angle and the centroid point of each hand area are calculated. Subsequently, joint points and end points of a finger are detected by expanding a circle at regular intervals from a centroid point of the hand. Lastly, the hand pose is recognized by matching between the current hand information and the hand model of previous frame and the hand model is updated for the next frame. This method enables users to predict the hidden fingers through the hand model information of the previous frame using temporal coherence in consecutive frames. As a result of the experiment on various hand poses with the hidden fingers using both hands, the accuracy showed over 95% and the performance indicated over 32fps. The proposed method can be used as a contactless input interface in presentation, advertisement, education, and game applications.

Based on sample-pair refinement and local optimization, this paper proposes a high-accuracy and quick matting algorithm. First, in order to gather foreground/background samples effectively, we shoot rays in hybrid (gradient and uniform) directions. This strategy utilizes the prior knowledge to adjust the directions for effective searching. Second, we refine sample-pairs of pixels by taking into account neighbors'. Both high confidence sample-pairs and usable foreground/background components are utilized and thus more accurate and smoother matting results are achieved. Third, to reduce the computational cost of sample-pair selection in coarse matting, this paper proposes an adaptive sample clustering approach. Most redundant samples are eliminated adaptively, where the computational cost decreases significantly. Finally, we convert fine matting into a de-noising problem, which is optimized by minimizing the observation and state errors iteratively and locally. This leads to less space and time complexity compared with global optimization. Experiments demonstrate that we outperform other state-of-the-art methods in local matting both on accuracy and efficiency.

A CAM-based matching system for fast exact pattern matching is implemented on a hardware system with FPGA and ASIC. The system has a simple structure, and does not employ any Central Processor Unit (CPU) as well as complicated computations. We take advantage of Content Addressable Memory (CAM) which has an ability of parallel multi-match mode for designing the system. The system is applied to fast pattern matching with various required search patterns without using search principles. In this paper, the authors present a CAM-based system for fast exact pattern matching on 2-D data.

In this paper, a method is introduced that can detect the number of incident signals (NIS) even there are fewer antennas than NIS. Previous works on NIS detection methods assumed that the number of antennas always exceeded NIS. In the DOA estimation field, the DOA estimation is possible, even if NIS exceeds the number of antennas, by extending the degrees of freedom of array (DOFA) using a modified array configuration, such as a nested array (NA). The information of NIS is required in advance to accurately estimate DOA, however, it has not been investigated deeply when NIS is larger than the number of antennas. In this paper, a NIS detection method based on the DOFA extending process using NA is proposed. One of the important issues in NIS detection is the detection metric. As one of the simple metrics, the ratio of adjacent eigenvalues (RAE) has been used. However, the direct application of RAE may not achieve adequate NIS detection performance. Therefore, we propose a metric based on the modified ratio of adjacent eigenvalues (MRAE) avoids the issue of RAE. Numerical results show that the metric based on MRAE can achieve proper NIS detection performance even if NIS is larger than the number of antennas.

Reducing the time complexity of character matching is critical to the development of efficient Japanese Optical Character Recognition (OCR) systems. To shorten the processing time, recognition is usually split into separate pre-classification and precise recognition stages. For high overall recognition performance, the pre-classification stage must both have very high classification accuracy and return only a small number of putative character categories for further processing. Furthermore, for any practical system, the speed of the pre-classification stage is also critical. The associative matching (AM) method has often been used for fast pre-classification because of its use of a hash table and reliance on just logical bit operations to select categories, both of which make it highly efficient. However, a certain level of redundancy exists in the hash table because it is constructed using only the minimum and maximum values of the data on each axis and therefore does not take account of the distribution of the data. We propose a novel method based on the AM method that satisfies the performance criteria described above but in a fraction of the time by modifying the hash table to reduce the range of each category of training characters. Furthermore, we show that our approach outperforms pre-classification by VQ clustering, ANN, LSH and AM in terms of classification accuracy, reducing the number of candidate categories and total processing time across an evaluation test set comprising 116,528 Japanese character images.

In this paper, we point out that Yoon et al.'s gateway-oriented password-based authenticated key exchange (GPAKE) protocol is inefficiently and incorrectly designed to overcome the undetectable on-line dictionary attack. To remedy these problems, we propose a new GPAKE protocol and prove its security in the random oracle model. Performance analysis demonstrates that our protocol is more secure and efficient than previous protocols.

Break arcs are generated between carbon contacts in a DC48V and 10A resistive circuit. The external transverse magnetic field formed by a permanent magnet is applied to break arcs. The position of the cathode spot region of the break arcs occurring between carbon contacts is investigated and the following results are shown. The cathode and anode spot regions moves together with and without the magnetic field. The position of the break arcs just before arc extinction tends to shift upward with increase of the magnetic flux density of the transverse magnetic field.

The multiple-input-multiple-output (MIMO) Gaussian wireless network with K users and an intermediate relay is investigated. In this network, each user with available local channel state information (CSI) intends to convey a multicast message to all other users while receiving all messages from other users via the relay. This model is termed the MIMO K-way relay channel with distributed CSI. For this channel, the sum capacity is shown as MK/(K-1)log(SNR)+o(SNR) where each user and the relay is equipped with M antennas. Achievability is based on the signal space alignment strategy with a K-1 time slot extension. A most general case is then considered, in which each user intends to recover all messages required within T time slots. We provide an improved scheme called fractional signal space alignment which achieves MK/(K-1) degrees of freedom in the general case and the feasibility condition is also explored.

In this paper we propose a novel method to reduce power consumption during scan testing caused by test responses at scan-out operation for logic BIST. The proposed method overwrites some flip-flops (FFs) values before starting scan-shift so as to reduce the switching activity at scan-out operation. In order to relax the fault coverage loss caused by filling new FF values before observing the capture values at the FFs, the method employs multi-cycle scan test with partial observation. For deriving larger scan-out power reduction with less fault coverage loss and preventing hardware overhead increase, the FFs to be filled are selected in a predetermined ratio. For overwriting values, we prepare three value filling methods so as to achieve larger scan-out power reduction. Experiment for ITC99 benchmark circuits shows the effectiveness of the methods. Nearly 51% reduction of scan-out power and 57% reduction of peak scan-out power are achieved with little fault coverage loss for 20% FFs selection, while hardware overhead is little that only 0.05%.

This paper introduces a radio frequency identification (RFID) tag for urination detection. The proposed tag is embedded into paper diapers in order to detect the patient's urination immediately. For this tag, we designed an RFID tag antenna at 950MHz, which matches the impedance of the associated integrated circuit (IC) chip. In addition, we calculate the antenna characteristics and measure the reflection coefficient (S11) and radiation pattern of the antenna. The results show that this system can be used to detect urination.

Regular on-site testing is an elementary means to obtain real-time data and state of Electromagnetic Compatibility (EMC) of electronics systems. Nowadays, there is a lot of measured EMC data while the application of the data is insufficient. So we put forward the concept of EMC model synthesis. To carry out EMC data mining with measured electromagnetic data, we can build or modify models and synthesize variation rules of electromagnetic parameters of equipment and EMC performance of systems and platforms, then realize the information synthesis and state prediction. The concept of EMC reliability is brought forward together with the definition and description of parameters such as invalidation rate and EMC lifetime. We studied the application of statistical algorithms and Artificial Neural Network (ANN) in model synthesis. Operating flows and simulation results as well as measured data are presented. Relative research can support special measurement, active management and predictive maintenance and replenishment in the area of EMC.

This paper reports an advanced millimeter-wave radar system to enable detection of vehicles and pedestrians in wide areas around the radar site such as an intersection. We focus on a pulse coding scheme using complementary codes to reduce range sidelobe for discriminating vehicles from pedestrians with high accuracy. In order to suppress sidelobe increase created by RF circuit imperfections, a π/2 shift pulse modulation method with a complementary code pair cycle is presented. Moreover, in order to improve the angular resolution, a high-resolution direction of arrival estimation involving Tx beam scanning is presented. Experiments on a prototype confirm its range sidelobe suppression exceeds 40dB and its angular resolution is 5° for two human's separation at the distance of about 10m in an anechoic chamber. In a trial intersection experiment, a pedestrian detection rate of 95% was achieved at the false alarm rate of 10% in the range from 5m to 40m. The results prove the system's feasibility for future automotive safety application.

This paper investigates potential to improve fault-detection coverage by means of on-chip redundancy. The international standard on functional safety, namely, IEC61508 Ed. 2.0 Part 2 Annex E.3 prescribes the upper bound of βIC (common cause failure (CCF) ratio to all failures) is 0.25 to satisfy frequency upper bound of dangerous failure in the safety function for SIL (Safety Integrated Level) 3. On the other hand, this paper argues that the βIC does not necessarily have to be less than 0.25 for SIL 3, and that the upper bound of βIC can be determined depending on failure rate λ and CCF detection coverage. In other words, the frequency upper bound of dangerous failure for SIL3 can also be satisfied with βIC higher than 0.25 if the failure rate λ is lower than 400[fit]. Moreover, the paper shows that on-chip redundancy has potential to satisfy SIL 4 requirement; the frequency upper bound of dangerous failure for SIL4 can be satisfied with feasible ranges of βIC, λ and CCF coverage which can be realized by redundant code.

Natural language (NL) requirements are usually human-centric and therefore error-prone and inaccurate. In order to improve the 3Cs of natural language requirements, namely Consistency, Correctness and Completeness, in this paper we propose a systematic pattern matching approach supporting both NL requirements modeling and inconsistency, incorrectness and incompleteness analysis among requirements. We first use business process modeling language to model NL requirements and then develop a formal language — Workflow Patterns-based Process Language (WPPL) — to formalize NL requirements. We leverage workflow patterns to perform two-level 3Cs checking on the formal representation based on a coherent set of checking rules. Our approach is illustrated through a real world financial service example — Global Equity Trading System (GETS).

This paper proposes a coarse-fine Time-to-Digital Converter (TDC), based on a Ring-Tapped Delay Line (RTDL). The TDC achieves the picosecond's level timing resolution and microsecond's level dynamic range at low cost. The TDC is composed of two coarse time measurement blocks, a time residue generator, and a fine time measurement block. In the coarse blocks, RTDL is constructed by redesigning the conventional Tapped Delay Line (TDL) in a ring structure. A 12-bit counter is employed in one of the two coarse blocks to count the cycle times of the signal traveling in the RTDL. In this way, the input range is increased up to 20.3µs without use of an external reference clock. Besides, the setup time of soft-edged D-flip-flops (SDFFs) adopted in RTDL is set to zero. The adjustable time residue generator picks up the time residue of the coarse block and propagates the residue to the fine block. In the fine block, we use a Vernier Ring Oscillator (VRO) with MOS capacitors to achieve a scalable timing resolution of 11.8ps (1 LSB). Experimental results show that the measured characteristic curve has high-level linearity; the measured DNL and INL are within ± 0.6 LSB and ± 1.5 LSB, respectively. When stimulated by constant interval input, the standard deviation of the system is below 0.35 LSB. The dead time of the proposed TDC is less than 650ps. When operating at 5 MSPS at 3.3V power supply, the power consumption of the chip is 21.5mW. Owing to the use of RTDL and VRO structures, the chip core area is only 0.35mm × 0.28mm in a 0.35µm CMOS process.

The reliability of a connector depends on the contact force generated by the spring in the terminal of a connector. The springs are commonly formed by stamping from a strip of spring material. Therefore, the prediction of the force — displacement relation by the finite element (FE) method is very important for the design of terminals. For simulation, an accurate model of stress-strain (s-s) responses of the materials is required. When the materials are deformed in the forward and then the reverse directions, almost all spring materials show different s-s responses between the two directions, due to the Bauschinger effect. This phenomenon makes simulation difficult because the s-s response depends on the prior deformation of the material. Hence, the measurement of the s-s response is the elementary process, by cyclic tension and compression testing in which materials deform elastically and plastically. Then, the s-s responses should be described accurately by mathematical models for FE simulation. In this paper, the authors compare the experimental s-s responses of copper-based materials with conventional mathematical models and the Yoshida-Uemori model, which is a constitutive model having high capability of describing the elastic and plastic behavior of cyclic deformation. The calculated s-s responses only by Yoshida-Uemori model were in very good agreement with the corresponding experimental results. Therefore, the use of this model for FE simulation would be recommended for a more accurate prediction of force-displacement relation of the spring.

In this letter, we propose a partial impedance-matching method using a two-strip resonator for noncontact Passive Intermodulation (PIM) measurements using a coaxial tube. It is shown that the strip closer to the inner tube of the coaxial tube is dominant in the observed PIM characteristics while both strips are excited equally. The ideal efficiency of power to each strip is 50%, which is a significant improvement in comparison with conventional methods.

Silver electrical contacts are separated at a constant speed and break arcs are generated in a DC300V-450V/10A resistive circuit. The transverse magnetic field formed by a permanent magnet is applied to the break arcs. Alumina pipes are placed around the contacts to restrict the motion of break arcs. The dependences of the arc lengthening time and arc length just before arc extinction L on the strength of the magnetic field and supply voltage are investigated. It was found that the arc lengthening time increases with increasing supply voltage E and tends to decrease when the magnetic flux density Bx is increased. The arc length just before arc extinction L increases with increasing E and decreasing Bx. It also increases linearly with increasing arc lengthening time tm when no reignitions occur.

Chip multiprocessors (CMPs) improve performance by simultaneously executing multiple threads using integrated multiple cores. However, since these cores commonly share one cache, inter-thread cache conflicts often limit the performance improvement by multi-threading. This paper focuses on two causes of inter-thread cache conflicts. In shared caches of CMPs, cached data fetched by one thread are frequently evicted by another thread. Such an eviction, called inter-thread kickout (ITKO), is one of the major causes of inter-thread cache conflicts. The other cause is capacity shortage that occurs when one cache is shared by threads demanding large cache capacities. If the total capacity demanded by the threads exceeds the actual cache capacity, the threads compete to use the limited cache capacity, resulting in capacity shortage. To address inter-thread cache conflicts, we must take into account both ITKOs and capacity shortage. Therefore, this paper proposes a capacity-aware thread scheduling method combined with cache partitioning. In the proposed method, inter-thread cache conflicts due to ITKOs and capacity shortage are decreased by cache partitioning and thread scheduling, respectively. The proposed scheduling method estimates the capacity demand of each thread with an estimation method used in the cache partitioning mechanism. Based on the estimation used for cache partitioning, the thread scheduler decides thread combinations sharing one cache so as to avoid capacity shortage. Evaluation results suggest that the proposed method can improve overall performance by up to 8.1%, and the performance of individual threads by up to 12%. The results also show that both cache partitioning and thread scheduling are indispensable to avoid both ITKOs and capacity shortage simultaneously. Accordingly, the proposed method can significantly reduce the inter-thread cache conflicts and hence improve performance.