In this paper, we address adaptive link switching over heterogeneous wireless access networks including IEEE 802.11. When an IEEE 802.11 link is congested, the transmission link of a terminal with multi-RATs (radio access technologies) is switched to another radio access systems. To this end, we propose link-level metrics of LC (link cost) and AC (access cost) for quantifying TCP congestion over IEEE 802.11 networks. The proposed metric can be easily measured at a local wireless terminal, and that enables each multi-RAT terminal to work in a distributed way. Through various indoor and outdoor experiments using a test-bed system, we verify that the proposed link level metrics are good indicators of TCP traffic congestion. Experimental results show that the proposed metrics can detect congestion occurrence quickly, and avoid the TCP throughput degradation of other neighboring terminals, when they are used for transmission link switching.

This paper creates a new hybrid Space-Time Adaptive Processing (STAP) algorithm that combines Direct Data Domain (D3) method and Space-Time Multiple-Beam (STMB) algorithm, which can effectively suppress discrete interference in the nonhomogeneous clutter environment. In the proposed hybrid algorithm, the D3 method is applied to process the discrete interference in the primary range cell, and the residual clutter is suppressed by the STMB algorithm. The performance of the proposed hybrid STAP algorithm is demonstrated in a simulation.

In this letter, we propose an efficient signal detection method for uplink multiuser systems based on collaborative spatial multiplexing (CSM). The proposed method achieves near-optimal performance and shows only 0.8 dB loss at the target frame error rate (FER) of 10-2. Moreover, the error performance of each user is almost the same in the proposed method, which is an important property in a multiuser MIMO system where each user's error performance must satisfy some fixed error rate criteria.

A novel circularly polarized antenna with square slot for broadband characteristics is proposed in this paper. The horizontal and vertical components of the L-shaped probe, which is a key element to generate circular polarization, are separated in the structure, contrary to the concept of joined probes. Another novelty, placing stubs in the slot, which are attached to the ground plane, is proposed to improve the axial ratio (AR) characteristics of the antenna by around 10%. Placing a reflector at a distance of λ0/4 from the antenna to obtain unidirectional patterns is effective when no stubs are placed in the slot. The antenna attains a < 10 dB return loss bandwidth of 47.5% (2.76-4.48 GHz) and < 3 dB axial ratio (AR) bandwidth of 42.47% (2.67-4.11 GHz) in measurement. Parametric studies on key parameters and measured results are also presented.

On uniformly convex real Banach spaces, a fixed point theorem in weak topology for successively recurrent system of fuzzy-set-valued nonlinear mapping equations and its application to ring nonlinear network systems are theoretically discussed in detail. An arbitrarily-level likelihood signal estimation is then established.

Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage shift in a PMOS transistor. When the PMOS transistor is biased to negative voltage, threshold voltage shifts to negatively. On the other hand, the threshold voltage recovers if the PMOS transistor is positively biased. In an SRAM cell, due to NBTI, threshold voltage degrades in the load PMOS transistors. The degradation has the impact on Static Noise Margin (SNM), which is a measure of read stability of a 6-T SRAM cell. In this paper, we discuss the relationship between NBTI degradation in an SRAM cell and the dynamic stress and recovery condition. There are two important characteristics. One is a stress probability, which is defined as the rate that the PMOS transistor is negatively biased. The other is a stress and recovery cycle, which is defined as the switching interval of an SRAM value. In our observations, in order to mitigate the NBTI degradation, the stress probability should be small and the stress and recovery cycle should be shorter than 10 msec. Based on the observations, we propose a novel cell-flipping technique, which makes the stress probability close to 50%. In addition, we show results of the case studies, which apply the cell-flipping technique to register file and cache memories.

Multi-site MIMO (Multiple Input Multiple Output) is a key technology that will enable next generation cellular networks to achieve high throughput in cell edge areas. However, a multi-site single-user MIMO system is subject to performance degradation in terms of cell throughput due to the expense of additional assignments of radio resources to cell edge user equipment. This paper presents a BS-cooperation scheduling scheme for a multi-site single-user MIMO cellular system. The proposed BS-cooperation scheduling scheme aims to maintain cell throughput while improving cell edge user throughput. The proposed scheme employs two policies with respect to the assignment of radio resource to the user equipment with multi-site connection. One is to control the opportunities for radio resource assignment to user equipment with a multi-site connection to avoid the excessive assignment of radio resources and to maintain cell throughput. The other policy governs the decision as to whether the user equipment operates with a multi-site connection or not, making it possible for the multi-site connection to contribute to the improvement in user throughput in the cell edge areas. The simulation results show that the proposed scheme is effective from the perspective of both cell throughput and cell edge user throughput.

In this paper, two constructions of mutually orthogonal zero correlation zone polyphase sequence sets are presented. The first one is based on DFT matrices and interleaving iteration. After each recursive step, the period of sequence and the length of zero-correlation zone are two times larger than that in the last step. The second method, based on DFT matrices and orthogonal matrices, can generate numbers of mutually orthogonal optimal ZCZ sequence sets whose parameters reach the theoretical bounds by using interleaving and shifting techniques. As a result, the algorithms proposed can provide more sequences for the QS-CDMA (quasi-synchronous CDMA) systems.

In order to realize multi-service in TDS-OFDM system, a novel multiplexing scheme based on space time block code is proposed along with the corresponding demultiplexing method with low complexity. Simulations show the presented scheme can not only achieve full diversity gain, but also effectively improve the system capacity.

This paper presents an adaptive magnification transformation based particle swarm optimizer (AMT-PSO) that provides an adaptive search strategy for each particle along the search process. Magnification transformation is a simple but very powerful mechanism, which is inspired by using a convex lens to see things much clearer. The essence of this transformation is to set a magnifier around an area we are interested in, so that we could inspect the area of interest more carefully and precisely. An evolutionary factor, which utilizes the information of population distribution in particle swarm, is used as an index to adaptively tune the magnification scale factor for each particle in each dimension. Furthermore, a perturbation-based elitist learning strategy is utilized to help the swarm's best particle to escape the local optimum and explore the potential better space. The AMT-PSO is evaluated on 15 unimodal and multimodal benchmark functions. The effects of the adaptive magnification transformation mechanism and the elitist learning strategy in AMT-PSO are studied. Results show that the adaptive magnification transformation mechanism provides the main contribution to the proposed AMT-PSO in terms of convergence speed and solution accuracy on four categories of benchmark test functions.

This paper presents a resistor-compensation technique for a CMOS bandgap and current reference, which utilizes various high positive temperature coefficient (TC) resistors, a two-stage operational transconductance amplifier (OTA) and a simplified start-up circuit in the 0.35-µm CMOS process. In the proposed bandgap and current reference, numerous compensated resistors, which have a high positive temperature coefficient (TC), are added to the parasitic n-p-n and p-n-p bipolar junction transistor devices, to generate a temperature-independent voltage reference and current reference. The measurements verify a current reference of 735.6 nA, the voltage reference of 888.1 mV, and the power consumption of 91.28 µW at a supply voltage of 3.3 V. The voltage TC is 49 ppm/ in the temperature range from 0 to 100 and 12.8 ppm/ from 30 to 100. The current TC is 119.2 ppm/ at temperatures of 0 to 100. Measurement results also demonstrate a stable voltage reference at high temperature (> 30), and a constant current reference at low temperature (< 70).

A small broadband omni-directional printed antenna comprising symmetrically arranged trapezoid elements is investigated for broadband Voltage Standing Wave Ratio (VSWR) and low center frequency characteristics. Two symmetrical trapezoid elements are printed on the bottom side of the substrate and are connected to a small ground plane printed on the same side over two strips. The trapezoid elements and the strips are excited in an electromagnetically coupled manner by the monopole element set between the trapezoid elements. Two resonance characteristics arise because the resonance part changes depending on the frequency, and a broad bandwidth becomes possible. The center frequency can be lowered by changing the shapes of the trapezoid elements. The monopole element length is a very important parameter for impedance matching. The space between the monopole element and the trapezoid elements is an important parameter for the optimization of two resonance characteristics. The proposed antenna is shown to achieve a VSWR bandwidth (≤2) of 28.9%, a low profile, and omni-directional pattern features. The measured and numerical results are in good agreement.

One high profile intra predictor generation engine is proposed in this paper. Firstly, hardware level algorithm optimization for intra 88 (I8MB) mode is introduced. The original candidate pixels for generating prediction samples of I8MB are replaced with boundary pixels of intra 44 (I4MB) blocks. Based on this adoption, full data reuse between predictors of I4MB and filtered samples of I8MB can be achieved with almost no quality loss. Secondly, one lossless two-44-block based parallel predictor generation flow is proposed. The original predictor generation flow is optimized from 16 stages to 10 stages for I4MB and Intra 1616 (I16MB), which saves 37.5% processing cycles. For I8MB, similar methodology with different processing order of 44 scaled blocks is introduced. Thirdly, fully utilized hardwired engines for I4MB, I16MB and I8MB are proposed in this paper. Except DC (direct current) and plane modes, full data reuse among all intra modes of high profile can be achieved. Fourthly, for DC mode, one combined predictor generation process is introduced and predictor generation of I16MB's DC mode is merged into the process of I4MB's DC mode. Moreover, by configuring proposed hardwired engines, predictor generation of I16MB's plane mode and chrominance plane mode can be accomplished with only 50% cycles of original design. Totally, when compared with original full-mode design and latest dynamic mode reused design, the proposed predictor generation engine can achieve 89.5% and 73.2% saving of processing cycles, respectively. Synthesized by TSMC 0.18 µm technology under worst work conditions (1.62 V, 125°C), with 380 MHz and 37.2 k gates, the proposed design can handle real-time high profile intra predictor generation of Super Hi-Vision 4 k4 k@60 fps. The maximum work frequency of our design under worst condition is 468 MHz.

We built a 12.4 mm12.4 mm, 45-nm CMOS, chip that integrates eight 648-MHz general purpose cores, two matrix processor (MX-2) cores, four flexible engine (FE) cores and media IP (VPU5) to establish heterogeneous multi-core chip architecture. The general purpose core had its IPC (instructions per cycle) performance enhanced by adding 32-bit instructions to the existing 16-bit fixed-length instruction set and executing up to two 32-bit instructions per cycle. Considering these five-to-seven years of embedded LSI and increasing trend of access-master within LSI, we predict that the memory usage of single core will not exceed 32-bit physical area (i.e. 4 GB), but chip-total memory usage will exceed 4 GB. Based on this prediction, the physical address was expanded from 32-bit to 40-bit. The fabricated chip was tested and a parallel operation of eight general purpose cores and four FE cores and eight data transfer units (DTU) is obtained on AAC (Advanced Audio Coding) encode processing.

Device modeling techniques for high-frequency circuits operating at over 100 GHz are presented. We have proposed the bond-based design as an accurate high-frequency circuit design method. Because layout parasitic extractions (LPE) are not required in the bond-based design, it can be applied high-frequency circuit design at over 100 GHz. However, customized device models are indispensable for the bond-based design. In this paper, device modeling techniques for high-frequency circuit design using the bond-based design are proposed. The customized device model for MOSFETs, transmission lines and pads are introduced. By using customized device models, the difference between the simulated and measured gains of an amplifier is improved to less than 0.6 dB at 120 GHz.

This paper proposes a region-of-interest (ROI) based H.264 encoder and the VLSI architecture of the ROI detection algorithm. In ROI based video coding system, pre-processing unit to detect ROI should only introduce low computational complexity overhead due to the low power requirement. The Macroblocks (MBs) in ROIs are detected sequentially in the same order of H.264 encoding to satisfy the MB level pipelining of ROI detector and H.264 encoder. ROI detection is performed in a novel estimation-and-verification process with an ROI contour template. Proposed architecture can be configured to detect either single ROI or multiple ROIs in each frame and the throughput of single detection mode is 5.5 times of multiple detection mode. 98.01% and 97.89% of MBs in ROIs can be detected in single and multiple detection modes respectively. Hardware cost of proposed architecture is only 4.68 k gates. Detection speed is 753 fps for CIF format video at the operation frequency of 200 MHz in multiple detection mode with power consumption of 0.47 mW. Compared with previous fast ROI detection algorithms for video coding application, the proposed architecture obtains more accurate and smaller ROI. Therefore, more efficient ROI based computation complexity and compression efficiency optimization can be implemented in H.264 encoder.

A resource allocation scheme for multi-access MIMO-OFDM systems in uplink was developed to improve power and spectrum efficiency in the frequency and the space domains [1]. The scheme requires a multi-user detector in the receiver and assumes identical spatial crosscorrelation across all subcarriers for any pair of spatially separable users. However, the multi-user detection device may not exist in the receiver and the identical spatial crosscorrelation assumption may not be valid in some operational scenarios. The paper develops a scheme to remedy these problems for multi-access MIMO-OFDM systems without using multi-user detection techniques and the assumption. The proposed scheme aims at minimizing the total user transmit power while satisfying the required data rate, the maximum transmit power constraint, and the bit error rate of each user. The simulation results are presented to demonstrate the efficacy of the proposed algorithm.

Duobinary signaling has been introduced into asymmetric multi-chip communications such as DRAM or display interfaces, which allows a controlled amount of ISI to reduce signaling bandwidth by 2/3. A × 2 oversampled equalization has been developed to realize Duobinary signaling. Symbol-rate clock recovery form Duobinary signal has been developed to reduce power consumption for receivers. A Duobinary transmitter test chip was fabricated with 90-nm CMOS process. A 3.5 dB increase in eye height and a 1.5 times increase in eye width was observed.

A low-loss ultra-wide band (UWB) filter is presented, which uses miniaturized parallel coupled line along with an standard printed circuit board (PCB) technology. By analyzing even- and odd-mode impedances (in comparison with conventional parallel coupled lines) of miniaturized parallel coupled line, this structure provides tight coupling, thus, relaxing the requirements on physical dimensions width and spacing when designing broadband filters. A bandpass filter for Mode 1 (the first 3 sub-bands) in the 3.1-5 GHz band for Multi-Band Orthogonal Frequency Division Multiplexing (MB-OFDM) UWB is realized and compared with a conventional parallel coupled line filter. The experimental results show as much as 0.9 dB insertion loss improvement over the conventional counterpart.

In this paper, we present a new frequency identification technique using the recent methodology of compressive sensing and discrete prolate spheroidal sequences with optimal energy concentration. Using the bandpass form of discrete prolate spheroidal sequences as basis matrix in compressive sensing, compressive frequency sensing algorithm is presented. Simulation results are given to present the effectiveness of the proposed technique for application to detection of carrier-frequency type signal and recognition of wideband signal in communication.