Hiroyuki ITO Kenichi OKADA Kazuya MASU
The present paper proposes differential transmission line structures on Si ULSI. Interconnect structures are examined using numerical results from a two-dimensional electromagnetic simulation (Ansoft, 2D Extractor). The co-planar and diagonal-pair lines are found to have superior characteristics for gigahertz signal propagation through long interconnects. The proposed diagonal-pair line can reduce the crosstalk noise and interconnect resource concurrently.
Makoto YAMAGUCHI Akira HYOGO Keitaro SEKINE
A compact low-voltage CMOS exponential current-to-voltage converter free from transconductance parameter matching between NMOS and PMOS is proposed. The circuit is composed of level shift circuits and current mirrors. The SPICE simulation results show a 27 dB linear range with a linearity error of less than 1 dB.
Shoko YONEZAWA Goichiro HANAOKA Junji SHIKATA Hideki IMAI
Illegal distribution of signed documents can be considered as one of serious problems of digital signatures. In this paper, to solve the problem, we propose three protocols concerning signature schemes. These schemes achieve not only traceability of an illegal user but also universal verifiability. The first scheme is a basic scheme which can trace an illegal receiver, and the generation and tracing of a signed document are simple and efficient. However, in this scheme, it is assumed that a signer is honest. The second scheme gives another tracing method which does not always assume that a signer is honest. Furthermore, in the method, an illegal user can be traced by an authority itself, hence, it is efficient in terms of communication costs. However, in this scheme it is assumed that there exists only a legal verification algorithm. Thus, in general, this scheme cannot trace a modified signed document which is accepted by a modified verification algorithm. The third one is a scheme which requires no trusted signer and allows a modified verification algorithm. It can trace an illegal receiver or even a signer in such a situation. All of our schemes are constructed by simple combinations of standard signature schemes, consequently, one can flexibly choose suitable building blocks for satisfying requirements for a system.
Naoki KITA Wataru YAMADA Akio SATO Shuta UWANO
The suitability of a complex MIMO channel matrix for spatial multiplexing is verified experimentally in terms of the Demmel condition number. The instantaneous 2 2 MIMO-OFDM channel measurements in several indoor environments indicate the location dependency of the condition number. Wideband frequency characteristics are also analyzed to evaluate the applicability of spatial multiplexing.
In this paper, we study an effective video-on-demand traffic control algorithm using the metadata over the network supporting bandwidth-renegotiations. The proposed algorithm includes bandwidth smoothing, bandwidth-burstiness estimation and rate adaptation algorithms. The proposed video-on-demand server has not only video database but also metadata database that includes coding information of the compressed video in video database and the traffic burst characteristics with respect to control parameters of the bandwidth smoothing algorithm. Thus, we can predict the traffic properties accurately with a low computational complexity by using the stored metadata, and then determine the efficient bandwidth renegotiating variables such as the renegotiating instants and the required bandwidth in terms of network utilization and video-on-demand service quality. In addition, we present a rate adaptation algorithm that pursues an effective trade-off between spatial and temporal qualities of the decoded video to improve the perceptual video quality when the bandwidth request is rejected.
Hot spot service based on wireless LANs is expected to play an important role in the beyond 3G wireless networks. Although spatial coverage is very limited, a comfortable and higher speed compared with a cellular system is available there. However, there might exist nodes that cannot communicate directly with an Access Point (AP) because of the distant location or the shadowing due to obstacles. Accordingly, the introduction of two-hop relaying to the hot spot is useful to extend the coverage and avoid the dead spot. However, the throughput per node is getting decreased as the hot spot coverage area increases. Therefore, in this paper, we propose a scheme to reuse the same channel spatially wherever possible and apply it to the HiperLAN/2 based wireless LAN hot spot with two-hop relaying to compensate for the decrease of the throughput per node. Namely, we modify the HiperLAN/2 protocol in such a way that a time slot is reused at the nodes spatially separated far enough not to cause packet collision. Thus, the throughput is expected to be improved and confirmed by a theoretical analysis and computer simulations.
Fractional calculus is the generalization of the operators of differential and integration to non-integer order, and a differential equation involving the fractional calculus operators such as d1/2/dt1/2 and d-1/2/dt-1/2 is called the fractional differential equation. They have many applications in science and engineering. But not only its analytical solutions exist only for a limited number of cases, but also, the numerical methods are difficult to solve. In this paper we propose a new numerical method based on the operational matrices of the orthogonal functions for solving the fractional calculus and fractional differential equations. Two classical fractional differential equation examples are included for demonstration. They show that the new approach is simper and more feasible than conventional methods. Advantages of the proposed method include (1) the computation is simple and computer oriented; (2) the scope of application is wide; and (3) the numerically unstable problem never occurs in our method.
Takashi KURAFUJI Yasunobu NAKASE Hidehiro TAKATA Yukinaga IMAMURA Rei AKIYAMA Tadao YAMANAKA Atsushi IWABU Shutarou YASUDA Toshitsugu MIWA Yasuhiro NUNOMURA Niichi ITOH Tetsuya KAGEMOTO Nobuharu YOSHIOKA Takeshi SHIBAGAKI Hiroyuki KONDO Masayuki KOYAMA Takahiko ARAKAWA Shuhei IWADE
We apply a selective-sets resizable cache and a complete hierarchy SRAM for the high-performance and low-power RISC CPU core. The selective-sets resizable cache can change the cache memory size by varying the number of cache sets. It reduces the leakage current by 23% with slight degradation of the worst case operating speed from 213 MHz to 210 MHz. The complete hierarchy SRAM enables the partial swing operation not only in the bit lines, but also in the global signal lines. It reduces the current consumption of the memory by 4.6%, and attains the high-speed access of 1.4 ns in the typical case.
Akira MOCHIZUKI Takahiro HANYU
A new multiple-valued current-mode (MVCM) logic circuit using substrate bias control is proposed for low-power VLSI systems at higher clock frequency. Since a multi-level threshold value is represented as a threshold voltage of an MOS transistor, a voltage comparator is realized by a single MOS transistor. As a result, two basic components, a comparator and an output generator in the MVCM logic circuit can be merged into a single MOS differential-pair circuit where the threshold voltages of MOS transistors are controlled by substrate biasing. Moreover, the leakage current is also reduced using substrate bias control. As a typical example of an arithmetic circuit, a radix-2 signed-digit full adder using the proposed circuit is implemented in a 0.18- µm CMOS technology. Its dynamic and static power dissipations are reduced to about 79 percent and 14 percent, respectively, in comparison with those of the corresponding binary CMOS implementation at the supply voltage of 1.8 V and the clock frequency of 500 MHz.
The issue of scalable Differentiated Services (DiffServ) admission control now is still an open research problem. We propose a new admission control model that can not only provide coarse grain Quality of Services (QoS), but also guarantee end-to-end QoS for assured service without per-flow state management at core routers within DiffServ domain. Associated with flow aggregation model, a hybrid signaling protocol is proposed to select the route satisfying the end-to-end QoS requirements. Simulation result shows that the proposed model can accurately manage resource, leading to much better performance when compared to other schemes.
Hyun-Chul SHIN Jin-Aeon LEE Lee-Sup KIM
In texture mapping, anisotropic filtering methods, which require more texels, have been proposed for high-quality images. Memory bandwidth, however, is still limited by a bottleneck in the texture-filtering hardware. In this paper, we propose anisotropic texture filtering based on edge function. In generating the weight that plays a key role in filtering texels loaded from memory, the edge function gives accurate contribution of texels to the pixel intensity. The quality of images is superior to other methods. For images of the same quality, our method requires less than half the texels of other methods. In other words, the improvement in performance is more than twice that of other methods.
Yasuaki INOUE Saeko KUSANOBU Kiyotaka YAMAMURA Makoto ANDO
Finding DC operating points of transistor circuits is an important and difficult task. The Newton-Raphson method adopted in SPICE-like simulators often fails to converge to a solution. To overcome this convergence problem, homotopy methods have been studied from various viewpoints. For efficiency of globally convergent homotopy methods, it is important to give an appropriate initial solution as a starting point. However, there are few studies concerning such initial solution algorithms. In this paper, initial solution problems in homotopy methods are discussed, and an effective initial solution algorithm is proposed for globally convergent homotopy methods, which finds DC operating points of transistor circuits efficiently. Numerical examples using practical transistor circuits show the effectiveness of the proposed algorithm.
Behrouz Homayoun FAR Wei WU Mohsen AFSHARCHI
Software agents are knowledgeable, autonomous, situated and interactive software entities. Agents' interactions are of special importance when a group of agents interact with each other to solve a problem that is beyond the capability and knowledge of each individual. Efficiency, performance and overall quality of the multi-agent applications depend mainly on how the agents interact with each other effectively. In this paper, we suggest an agent model by which we can clearly distinguish different agent's interaction scenarios. The model has five attributes: goal, control, interface, identity and knowledge base. Using the model, we analyze and describe possible scenarios; devise the appropriate reasoning and decision making techniques for each scenario; and build a library of reasoning and decision making modules that can be used readily in the design and implementation of multiagent systems.
A compact, low voltage, low power and wide output operating range CMOS exponential-control variable-gain amplifier has been presented. The gain control range of the proposed variable-gain amplifier can be about 50.7 dB while the maximum linearity error is about -1.09%. For the case of supply voltage VDD = 2 V, the maximum power dissipation is only 1.6 µW. The proposed circuit has been fabricated in a 0.5 µm 2p2m N-well CMOS process. Experimental results are given to confirm the feasibility of the proposed variable gain amplifier. The proposed circuit is expected to be useful in analog signal processing applications.
In this paper, we analyze behaviors of bridging faults in CMOS synchronous sequential circuits based on transient analysis. From analysis results, we expose dynamic and analog behaviors of the circuit caused by the bridging faults, which are oscillation, asynchronous sequential behavior, IDDT failure and IDDQ failure as well as logic error. In order to detect this kind of fault, we show that not only IDDQ testing but also IDDT testing and logic testing which guarantees correct state transitions are required.
Yoshinobu HIGAMI Shin-ya KOBAYASHI Yuzo TAKAMATSU
When LSIs that are designed and manufactured for low power dissipation are tested, test vectors that make the power dissipation low should be applied. If test vectors that cause high power dissipation are applied, incorrect test results are obtained or circuits under test are permanently damaged. In this paper, we propose a method to generate test sequences with low power dissipation for sequential circuits. We assume test sequences generated by an ATPG tool are given, and modify them while keeping the original stuck-at fault coverages. The test sequence is modified by inverting the values of primary inputs of every test vector one by one. In order to keep the original fault coverage, fault simulation is conducted whenever one value of primary inputs is inverted. We introduce heuristics that perform fault simulation for a subset of faults during the modification of test vectors. This helps reduce the power dissipation of the modified test sequence. If the fault coverage by the modified test sequence is lower than that by the original test sequence, we generate a new short test sequence and add it to the modified test sequence.
In this paper, we propose a DOA (Direction Of Arrival) estimation method of speech signal using three microphones. The angular resolution of the method is almost uniform with respect to DOA. Our previous DOA estimation method using the frequency-domain array data for a pair of microphones achieves high precision estimation. However, its resolution degrades as the propagating direction being apart from the array broadside. In the method presented here, we utilize three microphones located at vertices of equilateral triangle and integrate the frequency-domain array data for three pairs of microphones. For the estimation scheme, the subspace analysis for the integrated frequency array data is proposed. Through both computer simulations and experiments in a real acoustical environment, we show the efficiency of the proposed method.
Kenichi ICHINO Ko-ichi WATANABE Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI
The partially rotational scan (PRS) technique greatly reduces the amount of data needed for n-detection testing. It also enables at-speed testing using low-speed testers. We designed tester intellectual properties (tester IP) with PRS for Viper and COMET II processors. When PRS was applied to a Viper processor, we obtained test data that provided the same fault coverage as with a set of automatic test pattern generation (ATPG) test vectors, although the amount of test data was 16% that of the ATPG. When the PRS technique was applied to a COMET II processor with full-scan design, we obtained test data that provided the same fault coverage as with a set of ATPG test vectors, although the amount of test data was 10% that of the ATPG. We also estimated hardware overhead and test time.
Takaaki MANAKA Hajime HIGA Dai NAKAMURA Dai TAGUCHI Mitsumasa IWAMOTO
The formation of single monolayer of liquid crystalline molecules, 4-n-pentyl-4-cyanobiphenyl (5CB), deposited by the evaporation method in the air, was confirmed with the surface potential measurement. The surface potential increased with the time of evaporation, and the 3- or 4-minute evaporation at a source temperature of 110 gave the saturated potential, indicating the formation of single monolayer. Single monolayer formation was also supported by the comparison of the UV-visible absorption for evaporated film with LB monolayer. Positive potentials were built at the surface, indicating that CN group faces the substrate.
Keiichi KANETO Wataru TAKASHIMA
Electrical properties of contacts between head-tail coupled poly(3-hexylthiophene), PHT and Al (and Au) in planer type and sandwich type diodes of Al/PHT/Au have been studied. The contact resistances are directly evaluated by probing the potential profile of PHT between the metal electrodes using micromanipulators installed in scanning electron microscope. In the potential profile of planer type diode, a large potential cliff is observed at Al/PHT interface and some appreciable potential step is also found at PHT/Au interface. The contact resistance at the Al/PHT interface deduced from the potential profile shows the bias and its polarity dependence, indicating the existing of the Schottky like junction. At forward bias, it is found that the residual resistance at Al/PHT interface limits the diode performance. The residual resistance is supposed to be insulating layer of Al oxide. At larger reversed bias, the contact resistance at Al/PHT decreased abruptly due to the Zener breakdown. The potential profile of sandwich type diode is similar to that of planer type diode. It is found that even the PHT/Au contact shows the ohmic behavior, the contact resistance is significant as to limit the maximum current of the cells.