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29961-29980hit(30728hit)

  • Comparison of Erasure-and-Error Threshold Decoding Schemes

    Takeshi HASHIMOTO  

     
    PAPER-Information Theory and Coding Theory

      Vol:
    E76-A No:5
      Page(s):
    820-827

    Erasure-and-error decoding is a general form of channel decoding and is a basis of important coding schemes, such as the concatenated coding scheme and coded ARQ. However, there do not exist enough discussions on the interrelationship between erasure-and-error decoding schemes. In this paper, threshold decoding schemes are discussed in a systematic manner and compared with Forney's optimal scheme. Some confusions in known results are pointed out and new results on threshold decoding are shown.

  • A Mathematical Theory of System Fluctuations Using Fuzzy Mapping

    Kazuo HORIUCHI  Yasunori ENDO  

     
    PAPER-Mathematical Theory

      Vol:
    E76-A No:5
      Page(s):
    678-682

    In the direct product space of a complete metric linear space X and its related space Y, a fuzzy mapping G is introduced as an operator by which we can define a projective fuzzy set G(x,y) for any xX and yY. An original system is represented by a completely continuous operator f(x)Y, e.g., in the form x=λ(f(x)), (λ is a linear operator), and a nondeterministic or fuzzy fluctuation induced into the original system is represented by a generalized form of system equation xβG(x,f(x)). By establishing a new fixed point theorem for the fuzzy mapping G, the existence and evaluation problems of solution are discussed for this generalized equation. The analysis developed here for the fluctuation problem goes beyond the scope of the perturbation theory.

  • Abrupt Variations of Attractors Caused by Argumental Discreteness in Non-Hermitian Associative Memories

    Akira HIROSE  

     
    LETTER-Neural Nets--Theory and Applications--

      Vol:
    E76-A No:5
      Page(s):
    777-779

    Abrupt variations of attractors caused by argumental discreteness in non-Hermitian complex-valued neural networks are reported. When we apply the complex-valued associative memories to dynamical processing, the weighting matrices are constructed as non-Hermitian in general so that they have motive force to the signal vectors. It is observed that competitions between argumental rotation force and noise-suppression ability of associative memories lead to trajectory distortions and abrupt variations of the attractors.

  • The Efficient GMD Decoders for BCH Codes

    Kiyomichi ARAKI  Masayuki TAKADA  Masakatsu MORII  

     
    PAPER-Error Correcting Codes

      Vol:
    E76-D No:5
      Page(s):
    594-604

    In this paper, we provide an efficient algorithm for GMD (Generalized Minimum Distance) decoding of BCH codes over q-valued logic, when q is pl (p: prime number, l: positive integer). An algebraic errors-and-erasures decoding procedure is required to execute only one time, whereas in a conventional GMD decoding at mostd/2algebraic decodings are necessary, where d is the design distance of the code. In our algorithm, Welch-Berlekamp's iterative method is efficiently employed to reduce the number of algebraic decoding procedures. We also show a method for hardware implementation of this GMD decoding based on q-valued logic.

  • A Suitable Combination of Modulation and FEC Schemes for Satellite Digital Video Communication Networks

    Shuji KUBOTA  Masahiro MORIKURA  Kiyoshi ENOMOTO  Shuzo KATO  

     
    PAPER

      Vol:
    E76-B No:5
      Page(s):
    497-507

    This paper proposes a suitable combination of the digital modulation schemes and the coding-rate of forward error correction (FEC) schemes for satellite digital video communication networks. The comparative study is carried out by computer simulation considering non-linearly amplified, narrow bandwidth satellite channels with adjacent channel interference signals. The proposed system employs an offset QPSK modulation scheme supported by the coding-rate of 7/8 convolutional encoding and Viterbi decoding to realize high-quality and compact spectrum characteristics in non-linear channels. By employing a 32Mbps DPCM video codec, the developed prototype system achieves a post demodulated S/N ratio of higher than 52dB. Moreover, it achieves high protection ratio against co-channel interference than conventional analog FM systems. The optimized digital video transmission system makes it possible to transmit high-quality NTSC video signals over non-linearly amplified narrow bandwidth satellite channels, for example 27MHz or 36MHz bandwidth transponders, with high-security digital encryption.

  • A 10-b 300-MHz Interpolated-Parallel A/D Converter

    Hiroshi KIMURA  Akira MATSUZAWA  Takashi NAKAMURA  Shigeki SAWADA  

     
    PAPER

      Vol:
    E76-C No:5
      Page(s):
    778-786

    This paper describes a monolithic 10-b A/D converter that realized a maximum conversion frequency of 300 MHz. Through the development of the interpolated-parallel scheme, the severe requirement for the transistor Vbe matching can be alleviated drastically, which improves differential nonlinearity (DNL) significantly to within 0.4 LSB. Furthermore, an extremely small input capacitance of 8 pF can be attained, which translates into better dynamic performance such as SNR of 56 dB and THD of 59 dB for an input frequency of 10 MHz. Additionally, the folded differential logic circuit has been developed to reduce the number of elements, power dissipation, and die area drastically. Consequently, the A/D converter has been implemented as a 9.0 4.2-mm2 chip integrating 36K elements, which consumes 4.0 W using a 1.0-µm-rule, 25-GHz ft, double-polysilicon self-aligned bipolar technology.

  • A Modified Newton Method with Guaranteed Accuracy Based on Rational Arithmetic

    Akira INOUE  Masahide KASHIWAGI  Shin'ichi OISHI  Mitsunori MAKINO  

     
    PAPER-Numerical Homotopy Method and Self-Validating Numerics

      Vol:
    E76-A No:5
      Page(s):
    795-807

    In this paper, we are concerned with a problem of obtaining an approximate solution of a finite-dimensional nonlinear equation with guaranteed accuracy. Assuming that an approximate solution of a nonlinear equation is already calculated by a certain numerical method, we present computable conditions to validate whether there exists an exact solution in a neighborhood of this approximate solution or not. In order to check such conditions by computers, we present a method using rational arithmetic. In this method, both the effects of the truncation errors and the rounding errors of numerical computation are taken into consideration. Moreover, based on rational arithmetic we propose a new modified Newton interation to obtain an improved approximate solution with desired accuracy.

  • Intermittency of Recurrent Neuron and Its Network Dynamics

    Toshihide TSUBATA  Hiroaki KAWABATA  Yoshiaki SHIRAO  Masaya HIRATA  Toshikuni NAGAHARA  Yoshio INAGAKI  

     
    PAPER-Chaos and Related Topics

      Vol:
    E76-A No:5
      Page(s):
    695-703

    Various models of a neuron have been proposed and many studies about them and their networks have been reported. Among these neurons, this paper describes a study about the model of a neuron providing its own feedback input and possesing a chaotic dynamics. Using a return map or a histogram of laminar length, type-I intermittency is recognized in a recurrent neuron and its network. A posibility of controlling dynamics in recurrent neural networks is also mentioned a little in this paper.

  • A Frequency Utilization Ffficiency Improvement on Superposed SSMA-QPSK Signal Transmission over High Speed QPSK Signals in Nonlinear Channels

    Takatoshi SUGIYAMA  Hiroshi KAZAMA  Masahiro MORIKURA  Shuji KUBOTA  Shuzo KATO  

     
    PAPER

      Vol:
    E76-B No:5
      Page(s):
    480-487

    This paper proposes a superposed SSMA (Spread Spectrum Multiple Access)-QPSK (Quadrature Phase Shift Keying) signal transmission scheme over high speed QPSK signals to achieve higher frequency utilization efficiency and to facilitate lower power transmitters for SSMA-QPSK signal transmission. Experimental results show that the proposed scheme which employs the coding-rate of one-half FEC (Forward Error Correction) and a newly proposed co-channel interference cancellation scheme for SSMA-QPSK signals can transmit twenty SSMA-QPSK channels simultaneously over a nonlinearly amplified high speed QPSK signal transmission channel and achieve as ten times SSMA channels transmission as that without co-channel interference cancellation when the SSMA-QPSK signal power to the high speed QPSK signal power ratio equals -30dB. Moreover, cancellation feasibility generation of the interference signals replica through practical hardware implementation is clarified.

  • Standardization of Telemetry Signal Transmission by CCSDS and an Experiment Using a Satellite in a Highly Elliptical Orbit

    Tadashi TAKANO  Takahiro YAMADA  Koshiro SHUTO  Toshiyuki TANAKA  Katherine I. MOYD  

     
    REVIEW PAPER

      Vol:
    E76-B No:5
      Page(s):
    466-472

    The Consultative Committee of Space Data Systems (CCSDS) proposes a packetized telemetry scheme for the convenience of data exchange and networking in space activity. This paper describes the outline of the telemetry scheme and the on-orbit experiment which was carried out to show the applicability of the proposed CCSDS packet telemetry scheme using the Japan's satellite "Hiten" in a highly elliptical orbit. The telemetry data which are generated by the onboard instruments are packetized in Hiten, and reformed to the original data in earth stations successfully. The experimental results show that the standardized scheme is helpful for tracking cross-support between organizations, and that the concatenated code is quite effective to transmit data in a low C/N condition.

  • Code Assignment Algorithm for Highly Parallel Multiple-Valued Combinational Circuits Based on Partition Theory

    Saneaki TAMAKI  Michitaka KAMEYAMA  Tatsuo HIGUCHI  

     
    PAPER-Logic Design

      Vol:
    E76-D No:5
      Page(s):
    548-554

    Design of locally computable combinational circuits is a very important subject to implement high-speed compact arithmetic and logic circuits in VLSI systems. This paper describes a multiple-valued code assignment algorithm for the locally computable combinational circuits, when a functional specification for a unary operation is given by the mapping relationship between input and output symbols. Partition theory usually used in the design of sequential circuits is effectively employed for the fast search for the code assignment problem. Based on the partition theory, mathematical foundation is derived for the locally computable circuit design. Moreover, for permutation operations, we propose an efficient code assignment algorithm based on closed chain sets to reduce the number of combinations in search procedure. Some examples are shown to demonstrate the usefulness of the algorithm.

  • Fundametal Properties of Multiple-Valued Logic Functions Monotonic with Respect to Ambiguity

    Kyoichi NAKASHIMA  Noboru TAKAGI  

     
    PAPER-Logic and Logic Functions

      Vol:
    E76-D No:5
      Page(s):
    540-547

    The paper considers multiple-valued logic systems having the property that the ambiguity of the system increases as the ambiguity of each component increases. The partial-ordering relation with respect to ambiguity with the greatest element 1/2 and minimal elements 0, 1 or simply the ambiguity relation is introduced in the set of truth values V {0, 1/ (p1), , 1/2, , (p2) / (p1), 1}. A-monotonic p-valued logic functions are defined as p-valued logic functions monotonic with respect to the ambiguity relation. A necessary and sufficient condition for A-monotonic p-valued logic functions is presented along with the proofs, and their logic formulae using unary operators defined in the ambiguity relation are given. Some discussions on the extension of theories to other partial-ordering relations are also given.

  • An Implementation of Multiple-Valued Logic and Fuzzy Logic Circuits Using 1.5 V Bi-CMOS Current-Mode Circuit

    Mamoru SASAKI  Kazutaka TANIGUCHI  Yutaka OGATA  Fumio UENO  Takahiro INOUE  

     
    PAPER-Circuits

      Vol:
    E76-D No:5
      Page(s):
    571-576

    This paper presents Bi-CMOS current-mode multiple valued logic circuit with 1.5 V supply voltage. This circuit is composed of current mirror, threshold detector and current source. This circuit has advantages such as high accuracy, high speed, high density and low supply voltage. So, it is possible to realize high-radix multiple valued logic circuit. As an other application of the proposed circuit, a processing unit of fuzzy inference is given. This circuit operates with high speed and high accuracy. The circuit simulation of the proposed circuit has been performed using SPICE2 program.

  • Output Permutation and the Maximum Number of Implicants Needed to Cover the Multiple-Valued Logic Functions

    Yutaka HATA  Kazuharu YAMATO  

     
    PAPER-Logic Design

      Vol:
    E76-D No:5
      Page(s):
    555-561

    An idea of optimal output permutation of multiple-valued sum-of-products expressions is presented. The sum-of-products involve the TSUM operator on the MIN of window literal functions. Some bounds on the maximum number of implicants needed to cover an output permuted function are clarified. One-variable output permuted functions require at most p1 implicants in their minimal sum-of-products expressions, where p is the radix. Two-variable functions with radix between three and six are analyzed. Some speculations of maximum number of the implicants could be established for functions with higher radix and more than 2-variables. The result of computer simulation shows that we can have a saving of approximately 15% on the average using permuting output values. Moreover, we demonstrate the output permutation based on the output density as a simpler method. For the permutation, some speculation is shown and the computer simulation shows a saving of approximately 10% on the average.

  • A Differential-Geometrical Theory of Sensory System --Relations between the Psychophysical, the DL and the JND Functions

    Ryuzo TAKIYAMA  

     
    PAPER-Mathematical Theory

      Vol:
    E76-A No:5
      Page(s):
    683-688

    This paper discusses psychophysical aspects of human sensory system through a differential-geometrical formulation. The discussions reveal relationships among three fundamental functions--the psychophysical, the DL and the JND functions, which characterize sensory system.

  • A Link Study of a Low-Earth Orbit Satellite Communications System Using Optical Intersatellite Links

    Mitsuo NOHARA  Yoshinori ARIMOTO  Wataru CHUJO  Masayuki FUJISE  

     
    PAPER

      Vol:
    E76-B No:5
      Page(s):
    536-543

    Link conditions of a low-earth orbit (LEO) satellite communications system were evaluated, to provide the information necessary for designing a broadband LEO-SAT communications system. The study was made both for optical intersatellite and user/satellite links. For the optical intersatellite link (ISL), we examined several ISL configurations in a circular polar orbit, and found that when the satellites are in the same orbital plane, the link parameters are quite stable, that is, the link between adjacent satellites can be regarded as fixed and, therefore, suitable for broadband transmission via an optical link. However, the link conditions between adjacent orbits change very quickly and over a wide range. To overcome this and extend the network path between satellites in adjacent orbital planes, we proposed intermittent use of the link between satellites in co-rotating adjacent orbital planes at the low latitude region, i.e., only during the period of stable conditions. The optical intersatellite link budget also sets link parameters that are realistic, given present optoelectronic technologies. From quantitative evaluations of the user/satellite link, we believe that both the satellite altitude and minimum elevation angle are critical, both in defining the quality of the service of the LEO-SAT system and in their impact on the other transmission parameters. The link loss, the visible period and the required number of satellites vs. satellite altitude and elevation angle are also indicated. These are important considerations for future system design.

  • Optical Multiplex Computing Based on Set-Valued Logic and Its Application to Parallel Sorting Networks

    Shuichi MAEDA  Takafumi AOKI  Tatsuo HIGUCHI  

     
    PAPER-Optical Logic

      Vol:
    E76-D No:5
      Page(s):
    605-615

    A new computer architecture using multiwavelength optoelectronic integrated circuits (OEICs) is proposed to attack the problems caused by interconnection complexity. Multiwavelength-OEIC architecures, where various wavelengths are employed as information carriers, provide the wavelength as an extra dimension of freedom for parallel processing, so that we can perform several independent computations in parallel in a single optical module using the wavelength space. This multiplex computing" enables us to reduce the wiring area required by a network and improve their complexity. In this paper, we discuss the efficient multiplexing of Batcher's bitonic sorting networks, highly parallel computing architectures that require global interconnections inherently. A systematic multiplexing of interconnection topology is presented using a binary representation of the connectivities of interconnection paths. It is shown that the wiring area can be reduced by a factor of 1/r2 using r kinds of wavelength components.

  • A Proposal on Satellite Hitchhiker Payload for Pan-Pacific Information Network

    Takashi IIDA  Naoto KADOWAKI  Hisashi MORIKAWA  Kimio KONDO  Ryutaro SUZUKI  Yoshiaki NEMOTO  

     
    REVIEW PAPER

      Vol:
    E76-B No:5
      Page(s):
    457-465

    A non-profit satellite communication network is desired to be configured by using low cost earth stations in the field of education, research and health in the Pacific region. This paper proposes the following concept as one of the tools to realize such a network: (a) A hitchhiker transponder dedicated to the network, and (b) The volunteer group prepares earth stations. A preliminary system design shows that the S band hitchhiker payload is most appropriate and has the weight of about 3kg. The feasibility of manufacturing earth stations by a volunteer group is examined through the experiment using ETS-V satellite. The parameters of the hitchhiker payload are re-examined on the basis of the experience of the experiment.

  • On a Logic Based on Graded Modalities

    Akira NAKAMURA  

     
    PAPER-Logic and Logic Functions

      Vol:
    E76-D No:5
      Page(s):
    527-532

    The purpose of this paper is to offer a modal logic which enables us symbolic reasoning about data, especially, fuzzy relations. For such a purpose, the present author provided some systems of modal fuzzy logic. As a continuous one of those previous works, a logic based on the graded modalities is proposed. After showing some properties of this logic, the decision procedure for this logic is given in the rectangle method.

  • Safety Control of Power Press by Using Fail-Safe Multiple-Valued Logic

    Masayoshi SAKAI  Masakazu KATO  Koichi FUTSUHARA  Masao MUKAIDONO  

     
    PAPER-Fail-Safe/Fault Tolerant

      Vol:
    E76-D No:5
      Page(s):
    577-585

    This paper first clarifies the logic construction of safety control for the operation of a power press and then describes fail-safe dual two-rail system signal processing and fail-safe multiple-valued logic operations as methods for achieving this control as a fail-safe system. It finally shows a circuit for generating fail-safe two-rail run button signals based on ternary logic for concrete operation of the power press and an operation control circuit for confirming brake performance for each cycle of slide operation by using the run button signals. The control circuit uses such multiple-valued logic operations that binary logic signals that do not erroneously go logic 1 are added to a multiple-valued logic signal and the multiple-valued logic signal is converted to a binary logic signal that does not erroneously go logic 1 by a threshold operation.

29961-29980hit(30728hit)