In this letter, we obtain the absolute exponential stability result of neural networks with globally Lipschitz continuous, increasing and bounded activation functions under a sufficient condition which can unify some relevant sufficient ones for absolute stability in the literature. The obtained absolute exponential stability result generalizes the existing ones about absolute stability of neural networks. Moreover, it is demonstrated, by a mathematically rigorous proof, that the network time constant is inversely proportional to the global exponential convergence rate of the network trajectories to the unique equilibrium. A numerical simulation example is also presented to illustrate the analysis results.
Hikaru SUZUKI Narumi TAKAHASHI
This paper discribes the ISDN PROtocol Testing system (I-PROT). The system consists of translation & distribution function block, layer-2 fault surveillance function block, layer-3 fault surveillance function block, cause detection function block, and HMI. The system receives data from protocol monitors and detects the error recovery sequences, (we call "quasi-normal sequences"), as well as the sequences that do not follow the protocol specifications, (we call "abnormal sequences"). In the layer-3 fault surveillance function block, we use the protocol specification database whose records are converted from the state transition rules and added the judgment which classify the rules into the "normal" and "quasi-normal." We also show the classification method which is applicable to all connection-oriented protocol specifications. In the layer-2 fault surveillance function block, we explain the another easy detecting method. In the cause function block, we describe the partial pattern matching method to relate the protocol fault to the real cause of the fault. We built the prototype of the I-PROT and examine the turn around time (TAT) performance. As a result of the examination, we find the TAT of the I-PROT is directly proportional to the number of the frames analyzed by the system, and the system can reduce the load of the conventional manual analysis by the maintenance personnel.
Tadahiro SASAKI Shoji OTAKA Tadahiko MAEDA Toshiyuki UMEDA Kazuya NISHIHORI Atsushi KAMEYAMA Mayumi HIROSE Yoshiaki KITAURA Naotaka UCHITOMI
We have developed a GaAs direct-conversion π/4 shifted QPSK modulator IC equipped with variable attenuators for controlling the output power level of the 1.9 GHz Personal Handy Phone system in Japan (PHS). The IC was successfully demonstrated showing state-of-the-art performance with the image rejection ratio of more than 36 dBc at a low input power of -10 dBm in 1.9 GHz frequency range. By using the "Gate Current Control method by Pull-down FET's" (GCCPF), the equipped attenuators vary the output power from 0 dB to -28 dB by 4 dB step. The IC operates at a 2.7 V supply with power dissipation of 259 mW. The 2.64.6 mm2 chip with about 400 elements was fabricated by a 0.5 µm WNx-gate BPLDD GaAs MESFET process.
Atsushi KAMEYAMA Katsue K.KAWAKYU Yoshiko IKEDA Masami NAGAOKA Kenji ISHIDA Tomohiro NITTA Misao YOSHIMURA Yoshiaki KITAURA Naotaka UCHITOMI
A GaAs SPDT switch IC operating at a low power supply voltage of 2.7 V has been developed for use in 1.9 GHz band personal handy phone system (PHS). In combination with MESFETs with low on-resistance and high breakdown voltage, the switch IC adopts parallel-LC resonant circuits and utilizes both stacked FETs and an additional shunt capacitor at the receiver side in order to realize low insertion loss, high isolation and low distortion characteristics. An insertion loss of 0.55 dB and an isolation of 35.8 dB were obtained at 1.9 GHz. The IC also achieved an output power of 25.0 dBm at 1 dB gain compression point, a second order distortion of -54.3 dBc and an adjacent channel leakage power of -66 dBc at 600 kHz apart from 1.9 GHz at 19 dBm output power.
Noritaka SHIGEI Hiromi MIYAJIMA Sadayuki MURASHIMA
This paper describes the relation between the structure and the capability on mesh-connected computers with orthogonal broadcasting. It is shown that algorithms of maximum finding for the two-way communication model can be performed on the one-way communication model without increasing the time complexity.
Hyeok Gi PARK Hong-ju MOON Wook Hyun KWON
In this paper a cyclic place-timed controlled marked graph (PTCMG), which is an extended class of a cyclic controlled marked graph (CMG), is presented as a model of discrete event systems (DESs). In a PTCMG, time constraints are attached to places instead of transitions. The time required for a marked place to be marked again is represented in terms of time constraints attached to places. The times required for an unmarked place to be marked under various controls, are calculated. The necessary and sufficient condition for a current marking to be in the admissible marking set with respect to the given forbidden condition is provided, as is the necessary and sufficient condition for a current marking to be out of the admissible marking set with respect to the forbidden condition in one transition. A maximally permissive state feedback control is synthesized in a PTCMG to guarantee a larger admissible marking set than a CMG for most forbidden state problems. Practical applications are illustrated for a railroad crossing problem and an automated guided vehicle (AGV) coordination problem in a flexible manufacturing facility.
Rodney WEBSTER Masaki NAKAGAWA
This paper presents a character recognition method based on a dynamic model, which can be applied to character patterns from both on-line and off-line input. Other similar attempts simply treat on-line patterns as off-line input, while this method makes use of the on-line input's characteristics by representing the time information of handwriting in the character pattern representations. Experiments were carried out on the Hiragana character set. Without non-linear normalization, this method achieved recognition rates of 92.3% for on-line input and 89.1% for off-line input. When non-linear normalization is used, there is an increase in performance for both types of input with on-line input achieving 94.5% and off-line input achieving 94.1%. The reason for the difference in the effectiveness of non-linear normalization on off-line and on-line patterns could be that while the method used for off-line input was an established and proved one, we used our own initial attempt at non-linear normalization for the on-line patterns. If the same level of effectiveness of non-linear normalization as off-line input is achieved on the on-line input, however, the recognition rate for on-line input again improves becoming 96.3%. Since only one standard pattern was used per category for the dictionary patterns, the above results show the promise of this method. This result shows the compatibility of this method to both on-line and off-line input, as well as its effective use of on-line input's characteristics. The effectiveness of this use of the time information is shown by using an actual example. The data also shows the need for a method of non-linear normalization which is more suitable for on-line input.
Hyeong-Woo CHA Satomi OGAWA Kenzo WATANABE
A clock-feedthrough (CFT) compensation technique using a dummy cell is valid when the CFT current from a switched-current (SI) memory cell is signal-independent. Based on this idea, a SI dummy cell appropriate for the S2I cell is developed. Simulations show that the CFT rejection ratio as high as 60dB is attainable over the temperature range from -30 to 80 with this architecture. The CFT-compensated SI cell proposed here is, therefore, quite usuful for high-accuracy, current-mode signal processing.
Constantin and Rao have given a method for constructing single asymmetric error correcting (SAEC) codes based on the theory of the Abelian group, This paper uses the method of generating function in combinatorics to solve the implementation problems of the SAEC group theoretic codes. The encoding and decoding algorithms of the coding scheme perform simple arithmetic operations recursively. The idea of generating function can also be applied to t symmetric errors and simultaneously detect all unidirectional errors (t-syEC/AUED) codes for 1t3.
Hiroshi TOHJO Tetsuya YAMAMURA
We have studied the flowthrough operation to simplify operation processes and to promote the efficiency of operation flows. In this paper, we introduce the Construction Manager System (CMS) that cooperates with the ATM Transport Network Operation System (ATMOS). This system directs the construction processes using the construction tickets newly defined by the GDMO (Guidelines for the Definitions of Managed Objects); these tickets and action scenarios are prepared inside the SMS (Scenario Management System). We confirm that CMS can perform construction management using the construction tickets instead of the traditional off-line communications such as the telephone and the facsimile. Furthermore, because CMS cooperates with ATMOS, it is able to manage actual network elements (NEs) and conduct board costruction processes by using construction tickets. Moreover, CMS can confirm that the construction processes of the actual NEs have actually been executed through the Q3 interface. As a result, we verify the basic technique for flowthrough operation for configuration management.
Takashi HISAKADO Kohshi OKUMURA
This paper presents the several bifurcation phenomena of harmonic oscillations occurred in nonlinear three-phase circuit. The circuit consists of delta-connected nonlinear inductors, capacitors and three-phase symmetrical voltage sources. We analyze the bifurcations of the oscillations by the homotopy method. Additionally, we confirm the bifurcation phenomena by real experiments. Furthermore, we reveal the effect of nonlinear couplings of inductors by the comparison of harmonic oscillations in a single-phase circuit.
Masahiro MAEDA Morio NAKAMURA Shigeru MORIMOTO Hiroyuki MASATO Yorito OTA
A small-sized three-stage GaAs power module has been developed for portable digital radios using M-16QAM modulation. This module has exhibited typical P1dB of 10 W with PAE of 48% and a power gain of 35 dB at a low supply voltage of 6.5 V in 1.453-1.477 GHz band. The volume of the module is only 1.5 cc, which is one of the smallest value in 10 W class modules ever reported. In order to realize the reduced size and the high power performances simultaneously, the module has employed new power divider/combiner circuits with significant features of the reduced occupation area, the improved isolation properties and the function of second-harmonic control.
From a sequence {ai}i0 over GF(p) with period pn-1 we can obtain another periodic sequence {i}i0 with period pn-2 by deleting one symbol at the end of each period. We will give the bounds (upper bound and lower bound) of linear complexity of {i}i0 as a typical example of instability of linear complexity. Derivation of the bounds are performed by using the relation of characteristic polynomials between {ai}i0 and {ai(j)}i0={ai+j}i0, jGF(p){0}. For a binary m-sequence {ai}i0 with period 2n-1, n-1 a prime, we will give the explicit formula for the characteristic polynomial of {i}i0.
Microwave power transistors for high efficiency applications are surveyed briefly. Methodologies for microwave transistor power amplifier circuit design are discussed. Microwave transistor power amplifiers are categorized according to their operation into classes A, AB, B, C, and F, and some preliminary results on output power, power efficiency, and power gain for the amplifiers in various classes are provided by an analysis using an ideal transistor model. Circuit conditions controlling the voltage and current waveforms and device parameters such as the knee voltage in the device current-voltage characteristics are discussed for viewpoint of realizing high-efficiency power amplifier operation. A practical power amplifier design is considered with respect to the device characteristics and circuit conditions.
There is now a world-wide trend towards the downsizing of information systems using a number techniques, such as clientserver architecture. Consequently, enterprise networks are fast growing in terms of size and functionality. These networks need to be managed effectively. Researchers have been working on the development of management solutions for enterprise networks, using recent advances in software engineering, communication protocols, and artificial intelligence techniques. However, not much work has been published on the role of human factors in the integrated management of networks and systems. This paper presents a new Cooperative management Methodology for Enterprise Networks (CoMEN), based on Computer Supported Cooperative Work (CSCW) techniques.
Kyung-Sik JANG Tsuyoshi ISSHIKI Hiroaki KUNIEDA
In this paper, a systematic method which generates the micro-architecture of Application Specific Instruction Processor (ASIP) is proposed. Different from previous works, the data path and control path are generated from the instruction sequence which is generated by translating the compiled assembly code. A graphical representation method called Register Transfer Graph (RTG) is introduced to describe the micro-operations of instruction sequence. To achieve high performance, we perform micro-operation level scheduling which dynamically assigns the micro-operations of instruction sequence to the control steps. By transforming the architecture using synthesis parameters, design space is explored more extensively. Connection cost is minimized by removing the inefficient data transfer paths.
Hideki KINJO Morikazu NAKAMURA Kenji ONAGA
The stable marriage problem is one of the basic problems proposed in 1962. In this paper, we consider a distributed stable marriage problem. This problem is applicable to cooperative works of autonomous robots in distributed environments. We show a Gale-Shapley based protocol to obtain stable matching and introduce autonomous mechanism for exchanging partners, called divorce process, in distributed environments. We report some interesting results of matching games by computer simulation.
Hiroyuki YAMAMOTO Takeshi NAKAYAMA Hiroshi NINOMIYA Hideki ASAI
This paper describes a neuro-based optimization algorithm for three dimensional (3-D) cylindric puzzles which are problems to arrange the irregular-shaped slices so that they perfectly fit into a fixed three dimensional cylindric shape. First, the idea to expand the 2-dimensional tiling technique to 3-dimensional puzzles is described. Next, to energy function with the fitting function of each polyomino is introduced, which is available for 3-D cylindric puzzles. Furthermore our algorithm is applied to several examples using the analog neural array. Finally, it is shown that our algorithm is useful for solving 3-D cylindric puzzles.
We consider the problem of designing a physically diverse network that can support any two simultaneous node-to-node traffic flow requirements as called for by special events such as communication link failures or surges in network traffic. The design objective is to obtain a network with the minimum level of network capacity, yet robust enough to handle any two simultaneous traffic flow requirements between any nodes. To arrive at the minimum necessary network capacity,we introduce the concept of nodal requirement. Based on nodal requirements, we can build what may be called uniform protection subnetworks for equal nodal requirements. Successive uniform protection subnetworks can be built for incremental nodal requirements. This direct approach supersedes the extant work on building fully connected networks or loops from maximum spanning trees that can cope with only one traffic flow requirement. Our nodal requirements approach generalizes well to multiple simultaneous traffic flow requirements. Hub subnetworks are introduced to provide protection for networks with a unique node that has the largest nodal requirement. Further, a heuristic is considered and analyzed that assigns edge capacities of the protection network directly based on the largest two traffic flow requirements incident on the end nodes of an edge. The heuristic is attractive in being simple to implement.
Toshiyuki TANAKA Hideki KURIYAMA Yoshiko OCHIAI Masao TAKI
Neural networks can be used as associative memories which can learn problems of acquiring input-output relations presented by examples. The learning time problem addresses how long it takes for a neural network to learn a given problem by a learning algorithm. As a solvable model to this problem we analyze the learning dynamics of the linear associative memoty with the least-mean-square algorithm. Our result shows that the learning time τ of the linear associative memory diverges in τ (1-ρ)-2 as the memory rate ρ approaches 1. It also shows that the learning time exhibits the exponential dependence on ρ when ρ is small.