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19961-19980hit(22683hit)

  • A New State Space-Based Approach for the Estimation of Two-Dimensional Frequencies and Its Parallel Implementations

    Yi CHU  Wen-Hsien FANG  Shun-Hsyung CHANG  

     
    PAPER-Digital Signal Processing

      Vol:
    E80-A No:6
      Page(s):
    1099-1108

    In this paper, we present a new state space-based approach for the two-dimensional (2-D) frequency estimation problem which occurs in various areas of signal processing and communication problems. The proposed method begins with the construction of a state space model associated with the noiseless data which contains a summation of 2-D harmonics. Two auxiliary Hankel-block-Hankel-like matrices are then introduced and from which the two frequency components can be derived via matrix factorizations along with frequency shifting properties. Although the algorithm can render high resolution frequency estimates, it also calls for lots of computations. To alleviate the high computational overhead required, a highly parallelizable implementation of it via the principle subband component (PSC) of some appropriately chosen transforms have been addressed as well. Such a PSC-based transform domain implementation not only reduces the size of data needed to be processed, but it also suppresses the contaminated noise outside the subband of interest. To reduce the computational complexity induced in the transformation process, we also suggest that either the transform of the discrete Fourier transform (DFT) or the Haar wavelet transform (HWT) be employed. As a consequence, such an approach of implementation can achieve substantial computational savings; meanwhile, as demonstrated by the provided simulation results, it still retains roughly the same performance as that of the original algorithm.

  • A Low Distortion and High Efficiency Paralleled Power Amplifier without an Isolator in Wide Range of Load Impedances

    Hikaru IKEDA  Hiroaki KOSUGI  Tomoki UWANO  

     
    PAPER

      Vol:
    E80-C No:6
      Page(s):
    763-767

    Characteristics of a distortion, gain and efficiency of a power amplifier grow worse extremely by different phases of the load reflection coefficient when load impedances of the power amplifier are far from 50 Ω. It was found that the value of the distortion, gain and efficiency showed the tradeoff behavior when the phase of the reflection coefficient was different in 180 degrees. Therefore we have proposed new two- and four-parallel unit power amplifiers combined in 90 degree and 45 degree different phases each in order to accomplish low distortion and high efficiency in wide range of load impedances without an isolator. We studied the power amplifiers by simulation based on experiments and realized an amplifier in that adjacent channel leakage power of π/4-DQPSK modulation (for Japan's digital cellular system) is less than -45 dBc and efficiency is over 45% in range of load VSWR less than 3.

  • High Efficient Spatial Power Combining Utilizing Active Integrated Antenna Technique

    Shigeo KAWASAKI  

     
    PAPER

      Vol:
    E80-C No:6
      Page(s):
    800-805

    This paper describes a concept of the quasioptical spatial power combining technique and its demonstration of active integrated antenna arrays with strong coupling as an actual example of high efficient combiner in high frequencies. Some configurations of the arrays such as a 3-element linear array and a 33 array are designed with a circuit and electromagnetic simulator. In order to predict the operating frequencies, large signal FET model parameters are determined from measured small signal S-parameters.

  • On Relationships between Decomposable Programs and Rule Commutative Programs

    Xiaoyong DU  Zhibin LIU  Naohiro ISHII  

     
    LETTER-Databases

      Vol:
    E80-D No:6
      Page(s):
    684-686

    This paper discusses the relationships of two important program classes of linearly recursive programs, that is, decomposable programs and rule commutative programs. We prove that the decomposable programs are always rule commutative. Furthermore, the rule commutative programs that satisfy certain conditions are decomposable. These results are meaningful for integrating the related specified optimization algorithms.

  • Human Sleep Electroencephalogram Analysis Based on The Instantaneous Maximum Entropy Method

    Sunao UCHIDA  Yumi TAKIZAWA  Nobuhide HIRAI  Makio ISHIGURO  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    965-970

    Analysis of electroencephalogram (EEG) is presented for sleep physiology. This analysis is performed by the Instantaneous Maximum Entropy Method (IMEM), which was given by the author. Appearance and continuation of featuristic waves are not steady in EEG. The characteristics of these waves responding to epoch of sleep are analyzed. The behaviours of waves were clarified by this analysis as follows; (a) time dependent frequency of continuous oscillations of alpha rhythm was observed precisely. Sleep spindles were detected clearly within NREM and these parameters of time, frequency, and peak energy were specified. (b) delta waves with very low frequencies and sleep spindles were observed simultaneously. And (c) the relationship of sleep spindles and delta waves was first detected with negative correlation along time-axis. The analysis by the IMEM was found effective comparing conventional analysis method of FFT, bandpass filter bank, etc.

  • A Prediction Method of Non-Stationary Time Series Data by Using a Modular Structured Neural Network

    Eiji WATANABE  Noboru NAKASAKO  Yasuo MITANI  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    971-976

    This paper proposes a prediction method for non-stationary time series data with time varying parameters. A modular structured type neural network is newly introduced for the purpose of grasping the changing property of time varying parameters. This modular structured neural network is constructed by the hierarchical combination of each neural network (NNT: Neural Network for Prediction of Time Series Data) and a neural network (NNW: Neural Network for Prediction of Weights). Next, we propose a reasonable method for determination of the length of the local stationary section by using the additive learning ability of neural networks. Finally, the validity and effectiveness of the proposed method are confirmed through simulation and actual experiments.

  • On Efficient Spare Arrangements and an Algorithm with Relocating Spares for Reconfiguring Processor Arrays

    Noritaka SHIGEI  Hiromi MIYAJIMA  Sadayuki MURASHIMA  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    988-995

    To enhance fabrication yield for processor arrays, many reconfiguration schemes for replacing faulty processing elements (PE's) with spare PE's have been proposed. An array grid model based on single-track switches is one of such models. For this model, some algorithms for reconfiguring processor arrays have been proposed. However, any algorithm which can reconfigure the array, whenever the array is reconfigurable, has not been proposed as yet. This paper describes reconfiguration methods of processor arrays with faulty PE's. The methods use indirect replacements for reconfiguring arrays. First, we introduce a concept of fatal fault pattern, which makes an array unreconfigurable. Then, for the reconfiguration method with fixed spare arrangement, efficient spare arrangements are given by evaluating the probability of an occurring fatal fault pattern. Furher, we present reconfiguration algorithm with relocating spare. In the algorithm, fatal fault patterns are eliminated by relocating spare. Computer simulations show that the method has good performance of reconfiguration.

  • Current-Mode CMOS-Based Decoder with Redundantly Represented O Addend Method for Multiple-Radix Signed-Digit Number

    Toru TABATA  Fumio UENO  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    1002-1008

    We discuss a new decoder for the multiple-valued signed-digit number, using a current-mode CMOS transistor-oriented circuit structure. In this paper, a new decoding method with the selective summation of a redundantly represented addend "O = [-1 r]" is proposed, where r is the radix and the addend is applied to each digit with a negative value and any consecutively higher digit takes which has a value of O. A newly designed literal linear circuit is realized, which has a current-switch function that makes independently the short path when each digit has a value of O. Through the parallel connections of these current swiches, the same addend signal at the lower digit is transmitted in a higher speed, The decoder circuit is tested by using the general circuit simulation software SPICE and the circuit characteristics of the selective summation of a redundantly represented O addend and the output results of the SD decoding operation were simulated. We also evaluated the decoder circuit in terms of the processing speed and the circuit size.

  • 2-D Pipelined Adaptive Filters Based on 2-D Delayed LMS Algorithm

    Katsushige MATSUBARA  Kiyoshi NISHIKAWA  Hitoshi KIYA  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    1009-1014

    A pipelined adaptive digital filter (ADF) architecture based on a two-dimensional least mean square algorithm is proposed. This architecture enables the ADF to be operated at a high clock rate and reduction of the required amount of hardware. To achieve this reduction we introduce a new building unit, called a block, and propose implementing the pipelined ADF using the block, Since the number of blocks in a cell is adjustable, we derive a condition for satisfying given specifications. We show the smallest number of blocks and the corresponding delay can be determined by using the proposed method.

  • A Low Power 622MHz CMOS Phase-Locked Loop with Source Coupled VCO and Dynamic PFD

    Hiroyasu YOSHIZAWA  Kenji TANIGUCHI  Hiroyuki SHIRAHAMA  Kenichi NAKASHI  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    1015-1020

    To realize the high speed and low power CMOS Phase Locked Loop, we have developed new components of PLL: VCO and PFD. In the VCO, high speed and low power is realized with source coupled inverter pairs in the single loop three gate ring oscillator. And in the PFD, low power and small chip area are realized with the dynamic inverter. And with the simple design adjustment, both reduction of dead zone and immunity of current fluctuation at "O" output are implemented in Charge Pump. A fully CMOS PLL with these components have been designed with 0.8µ CMOS. At 622MHz operation, the power dissipation of 18mW is achieved by SPICE simulation.

  • Analysis of Decorrelating Decision-Feedback Multi-User Detectors for CDMA Systems

    Seung Hoon SHIN  Kwang Jae LIM  Kyung Sup KWAK  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    1055-1061

    Several multiuser detectors have been recently proposed to combat multiple-access interference and near-far problem for CDMA systems. The performance of a multi-user receiver in combining the decorrelating decision-feedback scheme for a synchronous DS/CDMA system is considered. Using the Gaussian approximation on the multiple-access interference and amplitude estimation errors, we derive a closed form expression for the BER performance of the decorrelating decision-feedback detector in single-path Rayleigh fading channel and power controlled system. And, we show that our analysis agrees with the results of simulations. A modified decision-feedback detector is also proposed and analyzes. Numerical results show that the modified dicision-feedback detector proposed in this paper results in enhanced performance.

  • HCR (Hybrid Cycle Reset) Protocol for Distributed High-Speed Multimedia Applications

    Sun-Moo KANG  Byung-Chun JEON  Dae-Young KIM  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    1062-1068

    This paper discribes a shared medium access control protocol for residential home and small business customer ATM network application with distributed high-speed multimedia services. This protocol offers global fairness for the whole network with a CG (Centralized Grant) signal and, at the same time, offers local fairness between nodes with DG (Distributed Grant) signals. The DG signal is only meaningful to the next neighboring node. The local fairness is kept between two nodes in distributed way, but this distributed local fairness helps to keep the global fairness. Because the DG signal is related to the passed DG signal from the neighbor node. This protocol is rather simple but shows high performance than the already announced protocols.

  • Spare Allocation and Compensation-Path Finding for Reconfiguring WSI Processor Arrays Having Single-Track Switches

    Takao OZAWA  Takeshi YAMAGUCHI  

     
    LETTER

      Vol:
    E80-A No:6
      Page(s):
    1072-1075

    In contrast to previous algorithms for reconfiguring processor arrays under the assumption that spare rows and columns are placed on the perimeter of the array or on fixed positions, our new algorithm employs movable and partitionable spare rows and columns. The objective of moving and partitioning spare rows and/or columns is the elimination of faulty processors each of which is blocked in all directions to spare processors. The results of our computer simulation indicate that reconfigurability can significantly be improved.

  • A Method for Adaptive Control of Nonminimum Phase Continuous-Time Systems Based on Pole-Zero Placement

    Jianming LU  Muhammad SHAFIQ  Takashi YAHAGI  

     
    PAPER-Systems and Control

      Vol:
    E80-A No:6
      Page(s):
    1109-1115

    We present a new method for the adaptive control of nonminimum phase continuous-time systems based on the pole-zero placement using approximate inverse systems to avoid the unstable pole-zero cancellations. Using this method effect of the unstable zeros cab be compensated approximately. We show how unstable pole-zoro cancellations can be avoided, and that this method has the advantage of being able to determine an approximate inverse system independently of the plant zeros. The proposed scheme uses only the available input and output data and the stability using approximate inverse systems is analyzed. Finally, the results of computer simulation are presented to illustrate the effectiveness of the proposed method.

  • Improved Common-Multiplicand Multiplication and Fast Exponentiation by Exponent Decomposition

    Sung-Ming YEN  

     
    LETTER-Information Security

      Vol:
    E80-A No:6
      Page(s):
    1160-1163

    The technique of common-multiplicand multiplication, CMM, is modified and the similar approach is utilized to enhance the performance of a recently proposed fast exponentiation algorithm by exponent decomposition. On average, the improved exponentiation, its original version, and the traditional right to left binary exponentiation algorithm take 1.292m+11,1.375m+3, and 1.5m multiplications, respectively where m is the bit length of the exponent. Finally, it is shown how to improve the overall performance of an exponentiation by employing the improved exponentiation algorithm, the improved CMM algorithm , and any general purpose fast multiplication algorithm.

  • Making Changes in Formal Protcol Specifications

    Bhed Bahadur BISTA  Kaoru TAKAHASHI  Tetsuo KINOSHITA  Norio SHIRATORI  

     
    LETTER-Communication Software

      Vol:
    E80-B No:6
      Page(s):
    974-978

    Users of computer communication systems and their requirements are rapidly increasing and changing. It is desirable to have a development method which helps to make small changes in a design of a system to obtain another system which satisfies new requirement changes. We propose a flexible synthesis method which adopts designers' requirement changes in formal protocol specifications designed in LOTOS.

  • Reducing the Number of Synchronization Operations in Protocol Conformance Testing

    Wen-Huei CHEN  

     
    LETTER-Communication Software

      Vol:
    E80-B No:6
      Page(s):
    970-973

    Conformance testing is to see if the protocol implementation conforms to its specification. A lot of test sequences have been developed for testing centers. Yet directly applying these test sequences to the simple testing system in laboratories suffers from the frequently-occurred synchronization problems. This paper proposes a new technique to disconnect a test sequence into segments based on their functions, and reconnects them into a new test sequence that simulates these functions yet suffers less from the synchronization problems.

  • Competitive Telecommunications Management and System Development

    Masayoshi EJIRI  

     
    INVITED PAPER

      Vol:
    E80-B No:6
      Page(s):
    805-810

    Rapid advancing technology and customer demand for sophisticated services are driving the global telecommunications environment into fully competitive and multi service providers environment. To cope with this new environment successfully, open network and open telecommunication management are essential. Telecommunication management is becoming more and more important to realize flexible and dynamic telecommunication services. This paper first gives a view of the new environment in the telecommunication industry and discusses the direction to be taken by service providers. Then, a concept of multi-domain management is proposed to meet a dynamically changing environment. Finally, the paper describes the subjects for the development of telecommunication management system and suggests that a competition based on harmony between the users, service providers and vendors is needed to make customers satisfied with telecommunication services.

  • Analysis Method of Nonstationary Waveforms Based on a Modulation Model

    Yumi TAKIZAWA  Atsushi FUKASAWA  

     
    PAPER

      Vol:
    E80-A No:6
      Page(s):
    951-957

    An analysis method is proposed for nonstationary waveforms. Modelling of a nonstationary waveform is first given in this paper. A waveform is represented by multiple oscillations. The instantaneous phase angle of each oscillation is written by three terms, predictive component, residual component, and initial phase constant. By this modelling, waveform analysis results in estimations of frequency, calculation of residual pbase in instantaneous phase angle. The Instantaneous Maximum Entropy Methods (IMEN) is utilized for frequency estimation. The residual phase angle is obtained by the Vandermonde matrix and the condition of continuity of phase angle among n-neighbourhood. Another analysis method is also proposed by the normalization of waveform parameters. The evaluation of the proposed method is done using artificially composed waveform signals. Novel and useful knowledge was provided by this analysis.

  • Applying the Generic Relationship Model (GRM) for MO Program Concurrency Control

    Kohei ISEDA  Takafumi CHUJO  

     
    PAPER-Data

      Vol:
    E80-B No:6
      Page(s):
    894-899

    The Telecommunications Management Network (TMN) is a major focus of telecommunications operations work in the 1990s. New telecommunication equipment is required to conform to the TMN standards. In the TMN, a network element is managed as a set of Managed Objects (MOs). The MO program has to be executed in a muiltithreaded, parallel environment for a quick response; therefore, concurrency control is a key issue for developing an MO program. This paper proposes a formal definition to specify data for concurrency control to improve the correctness and reusability of the specification. The definition is based on a Generic Relationship Model (GRM). By using the formalized definition and developing an algorithm to translate the definition into executable code, concurrency control is performed without coding. After describing the algorithm used to perform concurrency control, this paper discusses a three-layer concurrency control architecture to accommodate this framework efficiently.

19961-19980hit(22683hit)