A systematic approach to the analysis and design of a bi-directional Cuk converter for the cell voltage balancing control of a series-connected lithium-ion battery string is presented in this paper. The proposed individual cell equalizers (ICE) are designed to operate at discontinuous-capacitor-voltage mode (DCVM) to achieve the zero-voltage switching (ZVS) for reducing the switching loss of the bi-directional DC/DC converters. Simulation and experimental results show that the proposed battery equalization scheme can not only enhance the bi-directional battery equalization performance, but also can reduce the switching loss during the equalization period. Two designed examples are demonstrated, the switch power losses are significantly reduced by 52.8% from the MOSFETs and the equalization efficiency can be improved by 68-86.9% using the proposed DCVM ZVS battery equalizer under the specified cell equalization process. The charged/discharged capacity of the lithium-ion battery string is increased by using the proposed ICEs equipped in the battery string.

The power system and the battery management of mobile phones used by NTT DoCoMo subscribers will be described. The energy requirements of the phones' AC-adaptors (chargers), their power-management systems, and trends in energy consumption will be focused on. The results of the new Li-ion batteries' safety tests, quick tests assessing battery capacity deterioration, and battery lifetime predictions will be also discussed.

We describe a simulation method and design for a stand-alone hybrid power supply system composed of a wind turbine generator and photovoltaic modules. The system has been developed to supply power for telecommunications equipment in areas with no commercial power sources. We also report a comparison of the simulation results with actual measured data. The results show that the hybrid system can function effectively as a power supply for telecommunications equipment.

We have developed manganese-based lithium secondary battery technology as a part of a 10-year national project in Japan for The Development of Dispersed-Type Battery Energy Storage Technology. The cell chemistry we developed consisted of a modified graphite anode material containing dispersed Ag particles, and a partially substituted LiMn2O4 cathode with Li in the Mn sites. These materials showed a significant improvement in a cell's cycle life performance. The 250 Wh class single cell with the cell chemistry mentioned above showed energy densities of 131 Wh/kg and 295 Wh/dm3. The 2 kWh class module battery including 8 cells connected in series and a battery management system delivered energy densities of 122 Wh/kg and 255 Wh/dm3 that exceeded the final target of 120 Wh/kg and 240 Wh/dm3 for the project. Most of the target items for the battery performance were accomplished and proved. Thus the basis for practical application was developed, however, some areas concerning the further durability under various circumstances and conditions still remain to be accomplished. Continuous development for mass production and cost reduction is also expected for this technology in order to contribute to industry and society.

We have developed a high-power organic radical battery for information technology equipment such as personal computers (PCs). The battery provides several minutes of backup power without an external uninterrupted power source. Since the built-in battery makes energy conversion from AC to DC, or DC to AC, unnecessary, it protects equipment from power failure with no loss of energy. The fabricated battery shows a high power density of 1 kW/L and is capable of driving a desktop PC for several minutes. The use of purely organic polyradicals, poly (2,2,6,6-tetramethylpiperidinyloxy mathacrylate), for the cathode active material opens up a new field of high power density, environmentally friendly batteries.

We have developed a quick battery checker the Li-ion battery packs used in mobile phones. It checks for capacity deterioration by using an impedance-measuring method. Our previous measurements of the capacity and impedance at 1 kHz for various battery packs proved conclusively that there is a strong correlation between degraded capacity and impedance. The battery checker's design took into account the results we obtained from measuring impedances. We showed that the battery checker is highly accurate and fast.

This paper describes an ultralow-power multi-threshold (MT) CMOS/SOI circuit technique that mainly uses fully-depleted MOSFETs. The MTCMOS/SOI circuit, which combines fully-depleted low- and medium-Vth CMOS/SOI logic gates and high-Vth power-switch transistors, makes it possible to lower the supply voltage to 0.5 V and reduce the power dissipation of LSIs to the 1-mW level. We overview some MTCMOS/SOI digital and analog components, such as a CPU, memory, analog/RF circuit and DC-DC converter for an ultralow-power mobile system. The validity of the ultralow-voltage MTCMOS/SOI circuits is confirmed by the demonstration of a self-powered 300-MHz-band short-range wireless system. A 1-V SAW oscillator and a switched-capacitor-type DC-DC converter in the transmitter makes possible self-powered transmission by the heat from a hand. In the receiver, a 0.5-V digital controller composed of a 8-bit CPU, 256-kbit SRAM, and ROM also make self-powered operation under illumination possible.

We investigated the accuracy of nickel-cadmium (Ni/Cd) battery degradation estimation by measuring the capacity of over 400 used cordless-telephone batteries using a discharge-current-pulse technique. The capacity is calculated from the change in battery voltage after the current pulse is applied, using an equation that we developed. Battery degradation is represented by a percentage of the capacity based on the nominal one. To estimate the accuracy of the degradation estimation, we compare capacity Qe estimated from the current pulse with the capacity Qa measured by discharging the batteries. The Qe estimated from the current pulse was within a range of 20% of error indicated by (Qe-Qa) for 47% of the tested batteries. The Qe of 51% of the batteries, however, was underestimated and exceeded lower limit (-20%) of the error. One reason for the discrepancy could be that the equation is inadequate for estimating the capacity from the current pulse. On the other hand, the capacity Qe of 1% of the batteries was overestimated and exceeded upper limit (+20%) of the error. An internal short is probably the main reason for this.

A vibration-to-electric energy converter as a power generator through a variable-resonating capacitor is theoretically and experimentally demonstrated as a potential on-chip battery. The converter is constructed from three components: a mechanical-variable capacitor, a charge-transporter circuit and a timing-capture control circuit. An optimum design methodology is theoretically described to maximize the efficiency of the vibration-to-electric energy conversion. The energy-conversion efficiency is analyzed based on the following three factors: the mechanical-energy to electric-energy conversion loss, the parasitic elements loss in the charge-transporter circuit and the timing error in the timing-capture circuit. Through the mechanical-energy conversion analysis, the optimum condition for the resonance is found. The parasitic elements in the charge-transporter circuit and the timing management of the capture circuit dominate the output energy efficiency. These analyses enable the optimum design of the energy-conversion system. The converter is fabricated experimentally. The practical measured power is 0.12 µW, and the conversion efficiency is 21%. This efficiency is calculated from a 43% mechanical-energy conversion loss and a 63% charge-transportation loss. The timing-capture circuit is manually controlled in this experiment, so that the timing error is not considered in the efficiency. From our result, a new system LSI application with an embedded power source can be explored for the ubiquitous computing world.

The design of the analog part of a mixed analog-digital IC for a commercial wireless burglar alarm system is presented as an example of a very low-power VLSI design for battery-operated systems. The main constraint is battery life, which must be at least five years (with standard camera-battery). An operational amplifier, a power supply monitor and an oscillator are the core of the design. The operational amplifier absorbs 1.5 µA while the entire analog part absorbs 4 µA. Measures on each single part show compliance with specification. Test on working environment show its full functionality. Even though the example is application specific, the design solutions and each single element can also be utilized in many other battery-operated low-frequency devices (e.g. environmental parameter monitoring).

Adaptive Battery Conservation Management (ABCM), an effective form of power conservation for mobile terminals in an always-connected environment, was proposed and evaluated in a previous published work. The ABCM method employs three states: active, dormant, and the Battery Saving Mode (BSM). The BSM is defined as a battery-saving state; in the BSM, the mobile terminal saves power by intermittently receiving paging notifications via a paging channel between the packet bursts of a session. Two control parameters, the sleep-timer and paging interval, are set up according to packet class and are the keys to the performance of a system with this method. In real-time communications, a long sleep-timer and short paging interval are selected to minimize buffering delay. In non-real-time communications, on the other hand, a short sleep-timer and long paging interval are chosen to reduce power consumption by the mobile terminal. Our previous evaluation showed that the method is effective as a means for power conservation in non-real-time communications. In real-time communications, on the other hand, the ABCM method provides shorter buffering delays and the same battery-conservation performance as the conventional method. To further improve the ABCM method's performance, we now propose an enhanced ABCM method that employs multiple BSM sub-modes, each of which has a different paging interval. As dormant periods become longer, the mobile terminal makes transition to successive sub-modes, each of which has a longer interval than the previous one. In this paper, we evaluate the battery conservation effect of the ABCM method through theoretical analysis and computer simulation. Numerical evaluation indicates that the ABCM method will be suitable for the broadband multimedia packet-radio systems of the future.

We have developed the new energy storage system utilizing a radical redox reaction of poly (2,2,6,6-tetramethylpiperidinoxy methacrylate), PTMA. The coin-type cell with PTMA cathode demonstrates the charge capacity of is 72 Ah/kg, which corresponds to 65% of the theoretical capacity, and the coulombic efficiency was 90% in first charge-discharge cycle. The results indicate that the stable polyradical cathodes are promising materials due to their high charge utilization and the possibilities for the wide diversity of molecular design.

A lithium-ion (Li-ion) battery protection IC with an average current of 0.99 µA (at a battery voltage of 3.6 V) and a standby current (after detecting over-discharge) less than 0.01 µA is presented. This low power performance is achieved via a power-on duty-cycle technique. The protection circuit samples the voltage of the battery periodically and powers down during the rest of time. This Li-ion battery protector provides over-charge, over-discharge, excess-current and short circuits protection. This protection IC was implemented in a 0.6-µm CMOS technology and the active area is 880 µm 780 µm.

This paper describes the design concept and characteristics of a power supply for optical network units in Fiber To The Home (FTTH) systems. Powering architectures of local powering, network powering and power hub powering are compared in terms of cost and maintainability. A local powering architecture is selected for an ONU power supply because it is the most cost-effective overall compared with the others. The local power supply is mainly composed of a rectifier, DC-DC converters, a ringer, and batteries. A battery deterioration test function is important for the local power supply because battery lifetime varies depending on ambient temperature, discharge history, and charging conditions, and it is shorter than other electrical components used in ONU. Supplying power using alternative batteries is also necessary because the capacity of batteries installed in the power supply is limited. These functions and electrical characteristics are checked using an experimental power supply with Ni-Cd batteries.

With the development in portable electronic equipment, the demand for secondary batteries of high energy density is increasing. Recently, nickel metal hydride secondary batteries (Ni/MH) are expanding the market, and lithium ion secondary batteries have been newly developed and commercialized. This paper describes in detail Ni/MH and lithium ion secondary batteries, and reports on their development state and characteristics.

Recent achievements in low-voltage and low-power circuit techniques are reported in this paper. DC current in low-voltage CMOS circuits stemming from the subthreshold current in MOS transistors, is effectively reduced by applying switched-power-line schemes. The AC current charging the capacitance in DRAM memory arrays is reduced by a partial activation of array blocks during the active mode and by a charge recycle during the refresh mode. A very-low-power reference-voltage generator is also reported to control the internal chip voltage precisely. These techniques will open the way to using giga-scale LSIs in battery-operated portable equipment.

Circuit techniques for realizing fast cycle time of DRAM are described. 1) A high-speed and high-efficiency word-line level Vpp supply can be obtained by a unique static CMOS double-boosted level generator (SCDB) which controls the Vpp charge supply gate. 2) A new write-control scheme eliminates the timing overhead of a read access time after write cycle in a fast page mode operation. 3) A floor plan that minimizes the load of signal paths by employing the lead-on-chip (LOC) assembly technique. These techniques are implemented in an address-multiplexed 16 Mbit CMOS DRAM using a 0.5-µm CMOS technology. A 31-ns RAS cycle time and a 19-ns fast page mode cycle time at Vcc3.3 V, and also even at Vcc1.8 V, a 53-ns RAS cycle time and a 32-ns fast page mode cycle time were achieved. This DRAM is applicable to battery-operated computing tools.

It has become an important subject to realize a high-speed D/A converter with low supply voltage. This paper discusses a 10 bit 50 MS/s CMOS D/A converter with 2.7 V power supply. Reduction of the supply voltage is achieved by developing "saturation-linear" biasing technique in current sources. In this scheme, a grounded transistor in cascode configuration is biased in linear region. High conversion rate is obtained by driving this grounded transistor directly. A charging transistor is also introduced into the current source for accelerating the settling time. The D/A converter is fabricated in a 1 µm CMOS process without using optional process steps. It successfully operates at 50 MS/s with 2.7 V power supply. The circuit techniques discussed here can be easily introduced into half-micron D/A converters.