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[Keyword] degradation(50hit)

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  • Application of Circuit-Level Hot-Carrier Reliability Simulation to Memory Design

    Peter M. LEE  Tsuyoshi SEO  Kiyoshi ISE  Atsushi HIRAISHI  Osamu NAGASHIMA  Shoji YOSHIDA  

     
    PAPER-Electronic Circuits

      Vol:
    E81-C No:4
      Page(s):
    595-601

    We have applied hot-carrier circuit-level simulation to memory peripheral circuits of a few thousand to over 12K transistors using a simple but accurate degradation model for reliability verification of actual memory products. By applying simulation to entire circuits, it was found that the location of maximum degradation depended greatly upon circuit configuration and device technology. A design curve has been developed to quickly relate device-level DC lifetime to circuit-level performance lifetime. Using these results in conjunction with a methodology that has been developed to predict hot-carrier degradation early in the design cycle before TEG fabrication, accurate total-circuit simulation is applied early in the design process, making reliability simulation a crucial design tool rather than a verification tool as technology advances into the deep sub-micron high clock rate regime.

  • An Experimental Study on Subjective Evaluation of TV Picture Degradation by Electromagnetic Noise--Opinion Tests on Still and Motion Pictures--

    Motoshi TANAKA  Hiroshi INOUE  Tasuku TAKAGI  

     
    PAPER

      Vol:
    E78-B No:2
      Page(s):
    168-172

    The effects of Gaussian electromagnetic noise and non-Gaussian one on TV picture degradation are studied by using a composite noise generator which can control noise parameters. Three kinds of still pictures and four kinds of motion pictures are tested, and the picture degradation is subjectively evaluated with five-grade impairment scale. The tendency of the picture degradation against the every picture is almost the same. But MOS (Mean Opinion Score) between still picture and motion picture degradation is different in some measure when the power of burst noise is small.

  • A Study on Power Assignment of Hierarchical Modulation Schemes for Digital Broadcasting

    Masakazu MORIMOTO  Hiroshi HARADA  Minoru OKADA  Shozo KOMAKI  

     
    PAPER

      Vol:
    E77-B No:12
      Page(s):
    1495-1500

    In the future satellite broadcasting system in 21GHz band, the rainfall attenuation is a most significant problem. To solve this problem, the hierarchical transmission systems have been studied. This paper analyzes the performance of the hierarchical modulation scheme from the view point of power assignment in the presence of the rainfall attenuation. This paper shows an optimum power assignment ratio to maximize the spectral efficiency and the signal-to-noise ratio of received image, and these optimum ratio is varied with the measure of system performance.

  • Adaptively Weighted Code Division Multiplexing for Hierarchical Digital Broadcasting

    Hiroyuki HAMAZUMI  Yasuhiro ITO  Hiroshi MIYAZAWA  

     
    PAPER

      Vol:
    E77-B No:12
      Page(s):
    1461-1467

    This paper describes an adaptively weighted code division multiplexing (AW-CDM) system, in other words, power controlled spread-spectrum multiplexing system and describes its application to hierarchical digital broadcasting of television signals. The AW-CDM, being combined with multi-resolutional video encoder, can provide such a hierarchical transmission that allows both high quality services for fixed receivers and reduced quality services for mobile/portable receivers. The carrier and the clock are robustly regenerated by using a spread-spectrum multiplexed pseudorandom noise (PN) sounder as a reference in the receiver. The PN reference is also used for Rake combining with signals via different paths, and for adaptive equalization (EQ). In a prototype AW-CDM modem, three layers of hierarchical video signals (highs: 5.91Mbps, middles: 1.50Mbps, and lows: 0.46 Mbps) are divided into a pair of 64 orthogonal spread-spectrum subchannels, each of which can be given a different priority and therefore a different threshold. In this case, three different thresholds are given. The modem's transmission rate is 9.7Mbps in the 6MHz band. Indoor transmission tests confirm that lows (weighted power layer I), middles (averaged power layer II), and highs (lightened power layer III) are retrievable under conditions in which the desired to undesired signal ratios (DURs) are respectively 0dB, 8.5dB, and 13.5dB. If the undesired signals are multipaths, these performances are dramatically improved by Rake combining and EQ. The AW-CDM system can be used for 20-30 Mbps advanced television (ATV) transmission in the 6-MHz bandwidth simply by changing the binary inputs into quaternary or octonary inputs.

  • Graceful Degradation for Multiprocessor Realization of Maximally Flat FIR Digital Filters

    Saed SAMADI  Akinori NISHIHARA  Nobuo FUJII  

     
    PAPER

      Vol:
    E77-C No:7
      Page(s):
    1083-1091

    In this paper we propose a method for increasing the reliability in multiprocessor realization of lowpass and highpass FIR digital filters possessing a maximally flat magnitude response. This method is based on the use of array realization of the filter which has been proposed earlier by the authors. It is shown that if a processing module of the array functions erroneously, it is possible to exclude the module and still obtain a lowpass FIR filter. However, as a price we should tolerate a slight degradation in the magnitude response of the filter that is equivalent to a wider transition band. We also analyze the behavior of the filter when our proposed schemes are implemented on more than one module. The justification of our approach is based on that a slight degradation of the spectral characteristics of a filter may be well tolerated in most filtering applications and thus a graceful degradation in the frequency domain can sufficiently reduce the vulnerability to errors.

  • LATID (Large-Angle-Tilt Implanted Drain) FETs with Buried n- Profile for Deep-Submicron ULSIs

    Junji HIRASE  Takashi HORI  Yoshinori ODAKE  

     
    PAPER-Device Technology

      Vol:
    E77-C No:3
      Page(s):
    350-354

    This paper proposes a buried-LATID structure featuring a peaked vertical profile around gate edge for the n- drain unlike the reported conventional LATID structure. As compared to the conventional LATID FETs, the deep-submicron buried-LATID FETs achieve improved circuit speed by 7% (50% compared to LDD FETs) due to suppressed gate-to-drain capacitance and improved lifetime by 10 times (300 times compared to LDD FETs). The buried-LATID FETs are very promising for deep-submicron MOSFETs to achieve improved performance and hot-carrier reliability at the same time.

  • Modeling and Simulation on Degradation of Submicron NMOSFET Current Drive due to Velocity-Saturation Effects

    Katsumi TSUNENO  Hisako SATO  Hiroo MASUDA  

     
    PAPER-Device Simulation

      Vol:
    E77-C No:2
      Page(s):
    161-165

    This paper describes modeling and simulation of submicron NMOSFET current drive focusing on carrier velocity-saturation effects. A new simple analytical model is proposed which predicts a significant degradation of drain current in sub- and quarter-micron NMOSFET's. Numerical two-dimensional simulations clarify that the degradation is namely caused by high lateral electric field along the channel, which leads to deep velocity-saturation of channel electrons even at the source end. Experimental data of NMOSFET's, with gate oxide thickness (Tox) of 9-20 nm and effective channel lengths (Leff) of 0.35-3.0 µm, show good agreement with the proposed model. It is found that the maximum drain current at the supply voltage of Vdd=3.3 V is predicted to be proportional to Leff0.54 in submicron NMOSFET's, and this is verified with experiments.

  • An Effective Defect-Repair Scheme for a High Speed SRAM

    Sadayuki OOKUMA  Katsuyuki SATO  Akira IDE  Hideyuki AOKI  Takashi AKIOKA  Hideaki UCHIDA  

     
    PAPER-SRAM

      Vol:
    E76-C No:11
      Page(s):
    1620-1625

    To make a fast Bi-CMOS SRAM yield high without speed degradation, three defect-repair methods, the address comparison method, the fuse decoder method and the distributed fuse method, were considered in detail and their advantages and disadvantages were made clear. The distributed fuse method is demonstrated to be further improved by a built-in fuse word driver and a built-in fuse column selector, and fuse analog switches. This enhanced distributed fuse scheme was examined in a fast Bi-CMOS SRAM. A maximun access time of 14 ns and a chip size of 8.8 mm17.4 mm are expected for a 4 Mb Bi-CMOS SRAM in the future.

  • Reliability of Low-Noise HEMTs under Gamma-Ray Irradiation

    Yasunobu SAITO  Fumio SASAKI  Hisao KAWASAKI  Hiroshi ISHIMURA  Hirokuni TOKUDA  Motoharu OHTOMO  

     
    PAPER

      Vol:
    E76-C No:9
      Page(s):
    1379-1383

    Gamma(γ)-ray irradiation effects have been investigated on three types of low-noise HEMTs, AlGaAs/GaAs conventional HEMT (conv. HEMT), AlGaAs/InGaAs pseudomorphic HEMT (P-HEMT) and InAlAs/InGaAs/InP HEMT (InP-based HEMT). The dose of irradiated γ-rays ranges from 1105 to 1108 rad. DC and RF characteristics of each type of HEMT are measured before and after irradiation and the parameter changes are investigated. For conv. HEMT and P-HEMT, no degradation of DC parameter is observed up to 108 rad, while noise figure (NF) at 12 GHz remains constant up to 107 rad and degrades by 0.1 dB at 108 rad. The InP-based HEMT shows IDSS and gm increase by about 10% at a dose of 108 rad and its NF at 18 GHz lowers gradually with the radiation dose. It has been found that the radiation hardness is greater than 107 rad for all types of HEMTs and over a hundred years of life can be expected against γ-ray irradiation in the space environment.

  • Optoelectronic Integrated Circuits Grown on Si Substrates

    Takashi EGAWA  Takashi JIMBO  Masayoshi UMENO  

     
    INVITED PAPER-Integration of Opto-Electronics and LSI Technologies

      Vol:
    E76-C No:1
      Page(s):
    106-111

    We have demonstrated the successful fabrication of the monolithic integration of a GaAs metalsemiconductor field-effect transistor (MESFET), an AlGaAs/InGaAs laser and a p-n photodetector grown on a SiO2 backcoated p-Si substrate using selective regrowth by metalorganic chemical vapor deposition (MOCVD). The use of SiO2 backcoated Si substrate is effective in suppressing unintentional Si autodoping and obtaining a good pinch-off GaAs MESFET. The MESFET with 2.5400 µm2 gate exhibited a transconductance of 90 mS/mm and a threshold voltage of 2.2 V. The reliability of the laser on the Si substrate can be improved by the strain-relieved AlGaAs/InGaAs laser with the InGaAs intermediate layer. The longest lifetime of the laser is 8 h at 27. During the GaAs layer growth, the p-n photodetector is formed near the surface of the p-Si substrate by diffusing the As atoms.

41-50hit(50hit)