An on-chip Charged Device Model (CDM) ESD protection method for RF ICs is proposed in a 0.13 µm RF process and evaluated by using very fast Transmission Line Pulse (vf-TLP) system. Key design parameters such as triggering voltage (Vt1) and the oxide breakdown voltage from the vf-TLP measurement are used to design input ESD protection circuits for a RF test chip. The characterization and the behavior of a Low Voltage Triggered Silicon Controlled Rectifier (SCR) which used for ESD protection clamp under vf-TLP measurements are also reported. The results measured by vf-TLP system showed that the triggering voltage decreased and the second breakdown current increased in comparison with the results measured by a standard 100 ns TLP system. From the HBM/ CDM testing, the RF test chip successfully met the requested RF ESD withstand level, HBM 1 kV, MM 100 V and CDM 500 V.

The novel SCR-based (silicon controlled rectifier) device for ESD power clamp is presented in this paper. The proposed device has a high holding voltage and a high triggering current characteristic. These characteristics enable latch-up immune normal operation as well as superior full chip ESD protection. The device has a small area in requirement robustness in comparison to ggNMOS (gate grounded NMOS). The proposed ESD protection device is designed in 0.25 µm and 0.5 µm CMOS Technology. In the experimental result, the proposed ESD clamp has a double trigger characteristic, a high holding voltage of 4 V and a high trigger current of above 350 mA. The robustness has measured to HBM 8 kV (HBM: Human Body Model) and MM 400 V (MM: Machine Model). The proposed device has a high level It2 of 52 mA/ µm approximately.

The very fast transients of micro-gap discharges driven by low voltage electrostatic discharging (ESDs) are investigated in the time domain. We previously developed a 12 GHz wideband measurement setup consisting of a distributed constant line system, however the observed transients due to micro-gap discharges had very fast rise times of 34 ps or less, which reached the limitation on our system. In this paper, we proposed a method for estimating wideband transients beyond the measurement limit by using the transmission loss of a high performance coaxial transmission line. The proposed method is validated by estimating an impulsive voltage waveform with rise/fall time of 16 ps from the waveform measured through a semi-rigid coaxial cable with a length of 10 m.

The holding voltage of high-voltage devices under the snapback breakdown condition has been known to be much smaller than the power supply voltage. Such characteristics cause high-voltage ICs to be susceptible to the transient latch-up failure in the practical system applications, especially when these devices are used as the ESD power clamp circuit. A new latchup-free design of the ESD power clamp circuit with stacked-bipolar devices is proposed and successfully verified in a 0.35 µm BCD (Bipolar-CMOS-DMOS) process to achieve the desired ESD level. The total holding voltage of the stacked-bipolar devices in the snapback breakdown condition can be larger than the power supply voltage.

An impedance-isolation technique is proposed for on-chip ESD protection design for radio-frequency (RF) integrated circuits (ICs), which has been successfully verified in a 0.25-µm CMOS process with thick top-layer metal. With the resonance of LC-tank at the operating frequency of the RF circuit, the impedance (especially, the parasitic capacitance) of the ESD protection devices can be isolated from the RF input node of low-noise amplifier (LNA). Therefore, the LNA can be co-designed with the proposed impedance-isolation technique to simultaneously achieve excellent RF performance and high ESD robustness. The power gain (S21-parameter) and noise figure of the ESD protection circuits with the proposed impedance-isolation technique have been experimentally measured and compared to those with the conventional double-diodes ESD protection scheme. The proposed impedance-isolation technique had been demonstrated to be suitable for on-chip ESD protection design for RF ICs.

Break arcs are generated in a DC 42 V-10 A resistive circuit. The contact material is Ag or Ag/ZnO. The number of break operations is two hundreds for each contact material. The motion of break arcs is observed with a high-speed camera. Relationship between the dependence of arc duration on the number of operations and the motion of arc spots is investigated. The following results are shown. For Ag contacts the arc duration is almost constant independent to the number of break operations. For Ag/ZnO contacts, on the other hand, the arc duration changes irregularly to short (59 ms) or long (69 ms) arc-duration after 30th break operation. The moving range of arc spots on contact surfaces is broad for the case of short arc-duration and is narrow for the case of long arc-duration. The cause of the results for Ag/ZnO contacts is considered that the difference of the boiling points of Ag and ZnO leads to the porous structure on the contact surface.

With the smaller layout area and parasitic capacitance under the same electrostatic discharge (ESD) robustness, silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in radio-frequency (RF) IC. In this paper, SCR's with the waffle layout structures are studied to minimize the parasitic capacitance and the variation of the parasitic capacitance within ultra-wide band (UWB) frequencies. With the reduced parasitic capacitance and capacitance variation, the degradation on UWB RF circuit performance can be minimized. Besides, the fast turn-on design on the low-capacitance SCR without increasing the I/O loading capacitance is investigated and applied to an UWB RF power amplifier (PA). The PA co-designed with SCR in the waffle layout structure has been fabricated. Before ESD stress, the RF performances of the ESD-protected PA are as well as that of the unprotected PA. After ESD stress, the unprotected PA is seriously degraded, whereas the ESD-protected PA still keeps the performances well.

Motion of break arcs driven by external magnetic field is observed using a high-speed camera. The magnetic field is applied with a permanent magnet. Experimental circuit is DC42 V-10 A resistive circuit. Material of electrical contacts is silver. Following results are shown. The break arcs are driven in the direction according to Lorentz force. The arc duration decreases with decrease of the distance between the electrical contacts and the magnet. When the external magnetic-flux density at the position of the break arc is lower than a certain value, the effect of the magnetic field to drive the break arc becomes ineffective to shorten the arc duration. The result is explained with a relationship between the motion of break arc and the distribution of the external magnetic field.

Arc discharge generated by breaking electrical contact is considered as a main source of an undesired electromagnetic (EM) noise. To clarify mechanism of generation of the EM noise, feature extraction of bridge and short-time arc waveforms generated by slowly breaking Ag contact was discussed experimentally. The short-duration time arc before the ignition of the continuous metallic arc discharge was observed. The highest probability density voltage is defined as short-arc sustainable voltage (SASV). The relationship between SASV and duration of short-time arc was quantified experimentally. It is revealed that as the arc voltage of the short-time arc is higher, its duration becomes longer.

To clarify the mechanism of the generation of electromagnetic (EM) noise, current and radiation noise up to the GHz band generated by slowly breaking silver-compound contacts were investigated experimentally. The current and radiation noise at the GHz band were observed. It was demonstrated that the frequency spectrums of the current and radiation noise correspond to the frequency responses of the circuit admittance and radiation efficiency of the experimental setup, respectively. It was revealed that even if current noise at the GHz band is very small, it can cause a large EM radiation noise because of the high radiation efficiency. From the time-frequency domain characteristics of current noise, it was clarified that the peaks of current noise at 10 MHz band arise immediately after the initiation of the arc discharge and the transition from metallic phase to gaseous phase. On the other hand, the peak current noise above 100 MHz arises immediately after the initiation of the arc discharge.

Differential power analysis (DPA) is an effective technique that extracts secret keys from cryptographic systems through statistical analysis of the power traces obtained during encryption and decryption operations. This letter proposes symmetric discharge logic (SDL), a circuit-level countermeasure against DPA, which exhibits uniform power traces for every clock period by maintaining a set of discharge paths independent of input values. This feature minimizes differences in power traces and improves resistance to DPA attacks. HSPICE simulations for the test circuits using 0.18 µm TSMC CMOS process parameters indicate that SDL reduces power differences by an order of magnitude, compared to the existing circuit-level technique.

In this paper, the separation of heat generation and heat transfer related to temperature rise of silver palladium contact was investigated experimentally in order to predict the temperature rise of contact by the use conditions such as voltage range between 25 to 40 V, current range between 3.2 to 5.0 A and silver palladium alloy (AgPd) materials. Firstly, relationship between temperature rise of contact and supply power was discussed. The effects of heat generation and heat transfer on temperature rise were separated and quantified by least squares method. Secondly, effects of durations and integral powers of bridge and arc on temperature rise were also discussed by changing supply power. Results show that the integral power of the bridge increases when supply power increases. As the supply power increases, integral power of arc also increases. The temperature rise is dominated by integral power of bridge. Remarkable difference of bridge duration can not be seen in the five materials (AgPd30, AgPd40, AgPd50, AgPd70 and Pd). The supply power is increased, arc duration gets longer. As weight percent of Pd content increases, the effect of supply power on arc duration becomes larger. Consequently, the integral power of arc increases. This study is a basic consideration to realize methods predicting temperature rise of contact.

Breaking arcs occurring between silver electrical contacts are observed in DC42 V resistive circuit using a high-speed camera. The motion and current densities of the cathode and anode spot regions are investigated for different interrupt currents (I=7 A, 10 A and 14 A). Results indicate that the arc length at which the motion of arc spots becomes stable depends on the interrupt current, and the current densities of the cathode spot region are almost constant immediately before arc extinction for each interrupt current.

Arc occurrence rates were measured for Ag contacts in DC resistive and inductive load circuits. In inductive load conditions, arc occurrence rates in general came close to 100% at around 0.4 A, the conventional minimum arc current level of Ag. In resistive load conditions, the similar results were obtained with 30 V, while arc occurrence rates close to 50% were still obtained at around 0.4 A with 14 V and 10 V. Careful attention should be paid to the term "minimum arc current" to avoid misinterpretation thereof.

We proposed a method for suppressing arc ignition in mechanical contact devices using a transient current switch and a capacitor. We applied the method to conventional reed switches. For the electric circuit analysis, we clarified the momentary voltage-current characteristics at breaking operation of reed switches by FEM analysis. We could also estimate the capacitance of the contact electrodes at the metal bridge rupture by FEM analysis, and would derive the non-arcing condition using SPICE simulation. The suitable capacitor value in the transient current circuit for arc ignition suppression would be depend on the load impedance, the power supply, the time depending contact resistance R(t)s, the contact capacitance, and the minimum arc voltage and current.

AgCdO12wt% contacts mounted on electrical relays were tested in a dc 14 V-21 A or 42 V-8.4 A resistive circuit as make-only contacts. In this experiment, we took photograph records and measured arc duration and number of bounces. A transferred pip was grown on the cathode surface, and its height H grew H/Ga>0.5, where where H is height of pip, Ga is the contact separation, sticking occurred easily. Neither the rapidity of growth or the shape of the transferred pip influenced circuit conditions, but there were differences observed for the each sample. Since the arc discharge of switching operations at make-only contacts occurs during a rebound, the arc duration, as well as the number of bounces fluctuates.

We proposed a new electric contact device that suppresses the arc phenomena. The functions of electric contacts are divided into energizing and switching for arc suppression. Switching contacts consist of multielectrodes and each electrode current is suppressed by the series resistance. For realization of multicontacting, cantilever beam array electrodes were formed on a silicon substrate using micro-electromechanical systems (MEMS) technology. The finite element method was used to optimize the structure. The fabrication process of the cantilever was examined. Au-Au contact current of 0.97 A was broken without arc ignition.

We propose a new electric contact device for arc discharge suppression. The functions of conventional electric contacts are categorized into energizing switch contacts and transient current switch contacts. A capacitor is connected in series to a transient current switch. Suppression of power consumption and arc discharge at breaking contacts are proposed, experimentally measured, and theoretically analyzed. The transient V-I characteristics at breaking contacts are controlled by the transient current switch and the capacitor. The transient responses at contacts were numerically derived by SPICE, and the energizing switch contacts voltage could be controlled to less than the minimum arc voltage. Using 2 conventional relays, no arc ignition at breaking contacts was confirmed for 50 V/25 A.

Arc occurrence rates are measured for Ag and Pd contacts operated in a DC resistive load circuit. Based on the obtained results, it is confirmed that arc certainly occurs at current levels lower than the conventional minimum arc current value for each of the tested contact materials. Arc occurrence rate in general comes close to 100% at the conventional minimum arc current level. Accordingly, careful attention should be paid to use of the term "minimum arc current" in order to avoid misinterpretation thereof.

Arc duration of breaking arcs is investigated in order to obtain an experimental equation for the dependence of the arc duration on supply voltage in DC resistive circuit in air at atmospheric pressure. Materials of the contact pairs are Au, Ag, Cu, Ni, Pt and Pd. The interrupted current is ranging from 6 A to 10 A and the supply voltage is 30 V, 42 V and 54 V. Sato's experimental equation for the arc length is modified to obtain more appropriate experimental equation for our experimental results. The arc termination current It and minimum arc voltage Vm that are obtained with the experimental results are used as parameters of the experimental equation for each contact material. And characteristic coefficients C for each contact material in the experimental equation are obtained. As results, the experimental equation for each contact material well agrees with the experimental results. The experimental equation for several contact materials is presented.