Traffic is a key aspect of everyday life. Its study, as it happens with other complex phenomena, has found in simulation a basic tool. However, the use of simulations faces important limitations. Building them requires considering different aspects of traffic (e.g. urbanism, car features, and individual drivers) with their specific theories, that must be integrated to provide a coherent model. There is also a variety of simulation platforms with different requirements. Many of these problems demand multi-disciplinary teams, where the different backgrounds can hinder the communication and validation of simulations. The Model-Driven Engineering (MDE) of simulations has been proposed in other fields to address these issues. Such approaches develop graphical Modelling Languages (MLs) that researchers use to model their problems, and then semi-automatically generate simulations from those models. Working in this way promotes communication, platform independence, incremental development, and reutilisation. This paper presents the first steps for a MDE framework for traffic simulations. It introduces a tailored extensible ML for domain experts. The ML is focused on human actions, so it adopts an Agent-Based Modelling perspective. Regarding traffic aspects, it includes concepts commonly found in related literature following the Driver-Vehicle-Environment model. The language is also suitable to accommodate additional theories using its extension mechanisms. The approach is supported by an infrastructure developed using Eclipse MDE projects: the ML is specified with Ecore, and a model editor and a code generator tools are provided. A case study illustrates how to develop a simulation based on a driver's behaviour theory for a specific target platform using these elements.

The controllability of complex networks has attracted increasing attention within various scientific fields. Many power grids are complex networks with some common topological characteristics such as small-world and scale-free features. This Letter investigate the controllability of some real power grids in comparison with classical complex network models with the same number of nodes. Several conclusions are drawn after detailed analyses using several real power grids together with Erdös-Rényi (ER) random networks, Wattz-Strogatz (WS) small-world networks, Barabási-Albert (BA) scale-free networks and configuration model (CM) networks. The main conclusion is that most driver nodes of power grids are hub-free nodes with low nodal degree values of 1 or 2. The controllability of power grids is determined by degree distribution and heterogeneity, and power grids are harder to control than WS networks and CM networks while easier than BA networks. Some power grids are relatively difficult to control because they require a far higher ratio of driver nodes than ER networks, while other power grids are easier to control for they require a driver node ratio less than or equal to ER random networks.

This study explored the question of how to minimize older drivers' accidents and to identify at-risk drivers by analyzing their driving performance. Previous traffic research reported that there were two factors involved in risky driving, namely driving risk perception and risky driving attitude. We investigated these two factors as indicators of an at-risk driver by using large-scale test data from license renewal tests that are obligatory for Japanese drivers who are 70 years of age or older. The tests include a driving simulator test, an on-road test, and a cognitive screening test. By using these assessments and predictions made with renewal driving tests, we were able to indicate the possibility of identifying at-risk drivers.

In this paper, a new single soft switched forward converter with a self driven synchronous rectification (SDSR) is introduced. In the proposed converter, a soft switching condition (ZCS turn on and ZVS turn off) is provided for the switch, by an auxiliary circuit without any extra switch. In additional, this auxiliary circuit does not impose high voltage or current stresses on the converter. Since the proposed converter uses SDSR to reduce conductive loss of output rectifier, the rectifier switches are switched under soft switching condition. So, the conductive and switching losses on the converter reduce considerably. Also, implementing control circuit of this converter is very simple, due to the self-driven method employed in driving synchronous rectification and the converter is controlled by pulse width modulation (PWM). The experimental results of the proposed converter are presented to confirm the theoretical analysis.

We investigated client honeypots for detecting and circumstantially analyzing drive-by download attacks. A client honeypot requires both improved inspection performance and in-depth analysis for inspecting and discovering malicious websites. However, OS overhead in recent client honeypot operation cannot be ignored when improving honeypot multiplication performance. We propose a client honeypot system that is a combination of multi-OS and multi-process honeypot approaches, and we implemented this system to evaluate its performance. The process sandbox mechanism, a security measure for our multi-process approach, provides a virtually isolated environment for each web browser. It prevents system alteration from a compromised browser process by I/O redirection of file/registry access. To solve the inconsistency problem of file/registry view by I/O redirection, our process sandbox mechanism enables the web browser and corresponding plug-ins to share a virtual system view. Therefore, it enables multiple processes to be run simultaneously without interference behavior of processes on a single OS. In a field trial, we confirmed that the use of our multi-process approach was three or more times faster than that of a single process, and our multi-OS approach linearly improved system performance according to the number of honeypot instances. In addition, our long-term investigation indicated that 72.3% of exploitations target browser-helper processes. If a honeypot restricts all process creation events, it cannot identify an exploitation targeting a browser-helper process. In contrast, our process sandbox mechanism permits the creation of browser-helper processes, so it can identify these types of exploitations without resulting in false negatives. Thus, our proposed system with these multiplication approaches improves performance efficiency and enables in-depth analysis on high interaction systems.

This paper discusses the perspectives of using a wake-up receiver (WUR) in wireless body area network (WBAN) applications with event-driven data transfers. First we compare energy efficiency between the WUR-based and the duty-cycled medium access control protocol -based IEEE 802.15.6 compliant WBAN. Then, we review the architectures of state-of-the-art WURs and discuss their suitability for WBANs. The presented results clearly show that the radio frequency envelope detection based architecture features the lowest power consumption at a cost of sensitivity. The other architectures are capable of providing better sensitivity, but consume more power. Finally, we propose the design modification that enables using a WUR to receive the control commands beside the wake-up signals. The presented results reveal that use of this feature does not require complex modifications of the current architectures, but enables to improve energy efficiency and latency for small data blocks transfers.

This paper proposes a new accurate evaluation method for examining the resistance of cryptographic implementations against access-driven cache attacks (CAs). We show that a mathematical correlation method between the sets of measured access time and the ideal data, which depend on the guessed key, can be utilized to evaluate quantitatively the correct key in access-driven CAs. We show the effectiveness of the proposed method using the access time measured in noisy environments. We also estimate the number of key candidates based on mathematical proof while considering memory allocation. Furthermore, based on the proposed method, we analyze quantitatively how the correlation values change with the number of plaintexts for a successful attack.

Energy conservation is one of the hot topics within the domain of traffic problems. It is well known that shortening the distance between vehicles reduces the aerodynamic drag of the lagging (or following) vehicle and leads to energy savings, which benefits the drivers. Recently, systems have been developed in which trucks or vehicles travel in a platoon with reduced headway from the preceding vehicle by using automated driving or driver assistance systems. The objective of the present study is to investigate how human factors, such as driving style, a driver's condition, or a driver's personal characteristics, influence the decision of a driver to close the gap with a preceding vehicle and obtain the benefit of aerodynamic drag reduction. We developed a realistic experimental paradigm for investigating the relationship between distance and several factors including the driver's personal characteristics and the size of preceding vehicle. Our experimental setup made use of real vehicles on a test track, as opposed to a vehicle simulator. We examined behavior of subjects that drove the following vehicle as well as subjects that sat in the passenger seat in the following vehicle. The experimental results demonstrate that all subjects attempted to reduce the distance to the preceding vehicle in order to gain the benefit. Based on the experimental and questionnaire results, we conclude that there are relationships between the category of subjects and subject's following distances.

An integrated 2×28Gb/s dual-channel duobinary driver IC is presented. Each channel has integrated coding blocks, transforming a non-return-to-zero input signal into a 3-level electrical duobinary signal to achieve an optical duobinary modulation. To the best of our knowledge this is the fastest modulator driver including on-chip duobinary encoding and precoding. Moreover, it only consumes 652mW per channel at a differential output swing of 6Vpp.

An RGB-LED driver with a pulse-skipping-modulation boost converter is proposed to fix the reference voltage for lowering down the circuit complexity. A high-voltage LDO and a bandgap reference circuit are built into the chip. The proposed converter outputs a different voltage in response to a different color of LEDs. The output voltages for driving six red, six green, and six blue LEDs in series are 13.5V, 20V, and 21.5V, respectively. The proposed LDO and bandgap reference circuit work with supply voltages from 8V to 12V. The settling time for changing colors is lower than 300µs, better than the unfixed-reference-voltage methods. The proposed circuit was fabricated by using 0.25-µm BCD 60V technology, and the chip area was 1.9 × 1.7mm2.

In this paper, we propose an optimum access method for a phase change memory (PCM) with NAND strings. A PCM with a block erase interface is proposed. The method, which has a SET block erase operation and fast RESET programming, is proposed since the SET operation causes a slow access time for conventional PCM;. From the results of measurement, the SET-ERASE operation is successfully completed while the RESET-ERASE operation is incomplete owing to serial connection. As a result, the block erase interface with the SET-ERASE and RESET program method realizes a 7.7 times faster write speed compared than a conventional RAM interface owing to the long SET time. We also give pass-transistor design guidelines for PCM with NAND strings. In addition, the write-capability and write-disturb problems are investigated. The ERASE operation for the proposed device structure can be realized with the same current as that for the SET operation of a single cell. For the pass transistor, about 4.4 times larger on-current is needed to carry out the RESET operation and to avoid the write-disturb problem than the minimum RESET current of a single cell. In this paper, the SET programming method is also verified for a conventional RAM interface. The experimental results show that the write-capability and write-disturb problems are negligible.

Crosstalk-induced noise has become a key problem in interconnect optimization when technology improves, spacing diminishes, and coupling capacitance/inductance increases. Buffer insertion/sizing is one of the most effective and popular techniques to reduce interconnect delay and decouple coupling effects. It is traditionally applied to post-layout optimization. However, it is obviously infeasible to insert/size hundreds of thousands buffers during the post-layout stage when most routing regions are occupied. Therefore, it is desirable to incorporate buffer planning into floorplanning to ensure timing closure and design convergence. In this paper, we first derive formulae of buffer insertion for timing and noise optimization, and then apply the formulae to compute the feasible regions for inserting buffers to meet both timing and noise constraints. Experimental results show that our approach achieves an average success rate of 80.9% (78.2%) of nets meeting timing constraints alone (both timing and noise constraints) and consumes an average extra area of only 0.49% (0.66%) over the given floorplan, compared with the average success rate of 75.6% of nets meeting timing constraints alone and an extra area of 1.33% by the BBP method proposed previously.

This paper proposes an improved color barycenter model (CBM) and its separation for automatic road sign (RS) detection. The previous version of CBM can find out the colors of RS, but the accuracy is not high enough for separating the magenta and blue regions and the influence of number with the same color are not considered. In this paper, the improved CBM expands the barycenter distribution to cylindrical coordinate system (CCS) and takes the number of colors at each position into account for clustering. Under this distribution, the color information can be represented more clearly for analyzing. Then aim to the characteristic of barycenter distribution in CBM (CBM-BD), a constrained clustering method is presented to cluster the CBM-BD in CCS. Although the proposed clustering method looks like conventional K-means in some part, it can solve some limitations of K-means in our research. The experimental results show that the proposed method is able to detect RS with high robustness.

An Ldi/dt effect model based on float ground in a plamsa display panel (PDP) driver system is established in this paper. The model is to analyze the noise which appears in power supply and float ground pins of driver integrated circuits. Considering printed circuit board wiring and switching parasitic parameters, firstly Ldi/dt effect due to integrated circuits transition, is explained on the entire float-ground circuit operation. Then an analytic model is deduced and validated, and good agreement is obtained with experimental results. Based on the model, sensitivity analyses of key parameters are done. Finally, design optimisations to prevent the Ldi/dt effect based on float ground are proposed and verified in a PDP system.

This paper describes a novel technique to replace some of the driven elements in an array antenna with parasitic elements. First, the antenna characteristics are studied by simulation for a basic unit array with one driven and two parasitic elements. The entire antenna is backed with a flat reflector to conform to practical applications. The parasitic elements are excited by the neighboring driven elements through the electromagnetic coupling effect. It is shown that at the optimal coupling condition, the radiation patterns are almost identical with those of an array antenna whose elements are all driven without coupling. The simulation result is confirmed by performing an experiment at 5.8GHz (λ =51.7mm). Finally, a 12-element array is formed by combining four unit arrays. The simulation results show that the maximum antenna gain is 19.4dBi, indicating that there is no penalty with respect to the antenna gain of a fully driven 12-element array. Therefore, the array antenna can be considerably simplified by replacing 67% of its elements with parasitic elements.

This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-µm CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8µs and the average power is 0.74mW for a 5V supply voltage.

The Log-structured File System (LFS) transforms random writes to a huge sequential one to provide superior write performance on storage devices. However, LFS inherently suffers from overhead incurred by cleaning segments. Specifically, when file system utilization is high and the system is busy, write performance of LFS degenerates significantly due to high cleaning cost. Also, in the newer flash memory based SSD storage devices, cleaning leads to reduced SSD lifetime as it incurs more writes. In this paper, we propose an enhancement to the original LFS to alleviate the performance degeneration due to cleaning when the system is busy. The new scheme, which we call Slack Space Recycling (SSR), allows LFS to delay on-demand cleaning during busy hours such that cleaning may be done when the load is much lighter. Specifically, it writes modified data directly to invalid areas (slack space) of used segments instead of cleaning on-demand, pushing back cleaning for later. SSR also has the added benefit of increasing the lifetime of the now popular SSD storage devices. We implement the new SSR-LFS file system in Linux and perform a large set of experiments. The results of these experiments show that the SSR scheme significantly improves performance of LFS for a wide range of storage utilization settings and that the lifetime of SSDs is extended considerably.

Two voltage controlled current source (VCCS) models of double-channel p-type lateral extended drain MOS (DPLEDMOS) are firstly proposed to analyze the energy recovery circuit (ERC) efficiency of PDP data driver IC. In terms of the mathematical function between ID and VDS, the VCCS models are created. The presented models can be embedded in system software Saber to simulate the ERC waveform of data driver IC. A test board and a PDP system are used to verify the accuracy of the VCCS models. The experimental measurements agree with the simulation results very well and the maximum model error is 3.89%. Simulation results also show that the ERC efficiency of PDP data driver IC is influenced by three factors: the value of charge time TERC, the drain current ID, and the capacitance of CL. In an actual PDP system, TERC is restricted and CL is changeless. The ERC efficiency of PDP data driver IC can be improved significantly by using DPLEDMOS which has higher ID capacity. The proposed VCCS models of DPLEDMOS can be used to predict the ERC efficiency accurately.

This paper presents a novel color descriptor based on the proposed Color Barycenter Hexagon (CBH) model for automatic Road-Sign (RS) detection. In the visual Driver Assistance System (DAS), RS detection is one of the most important factors. The system provides drivers with important information on driving safety. Different color combinations of RS indicate different functionalities; hence a robust color detector should be designed to address color changes in natural surroundings. The CBH model is constructed with barycenter distribution in the created color triangle, which represents RS colors in a more compact way. For detecting RS, the CBH model is used to segment color information at the initial step. Furthermore, a judgment process is applied to verify each RS candidate through the size, aspect ratio, and color ratio. Experimental results show that the proposed method is able to detect RS with robust, accurate performance and is invariant to light and scale in more complex surroundings.

We describe 25-Gb/s error-free transmission over multi-mode fiber (MMF) by using a transmitter based on a 1.3-µm lens-integrated surface-emitting laser (LISEL) and a CMOS laser-diode driver (LDD). It demonstrates 25-Gb/s error-free transmission over 30-m MMF under the overfilled-launch condition and over 150-m MMF with a power penalty less than 1.0 dB under the underfilled-launch condition.