This paper presents the device technology for monolithic integration of InP-based resonant tunneling diodes (RTDs) and high electron mobility transistors (HEMTs). The potential of this technology for applications in quantum functional devices and circuits is demonstrated in two integration schemes in which RTDs and FETs are integrated either in Parallel or in series. Based on the parallel integration scheme, we demonstrate an integrated device which exhibits negative differential resistance and modulated peak current. This integrated device forms the foundation of a new category of functional circuits featuring clocked supply voltage. Based on the series integration scheme, resonant-tunneling high electron mobility transistors (RTHEMTs) with novel current-voltage characteristics and useful circuit applications are demonstrated. The high-frequency characteristics of RTHEMTs are also reported.

Deterministic nonlinear prediction is applied to both artificial and real time series data in order to investigate orbital-instabilities, short-term predictabilities and long-term unpredictabilities, which are important characteristics of deterministic chaos. As an example of artificial data, bimodal maps of chaotic neuron models are approximated by radial basis function networks, and the approximation abilities are evaluated by applying deterministic nonlinear prediction, estimating Lyapunov exponents and reconstructing bifurcation diagrams of chaotic neuron models. The functional approximation is also applied to squid giant axon response as an example of real data. Two metnods, the standard and smoothing interpolation, are adopted to construct radial basis function networks; while the former is the conventional method that reproduces data points strictly, the latter considers both faithfulness and smoothness of interpolation which is suitable under existence of noise. In order to take a balance between faithfulness and smoothness of interpolation, cross validation is applied to obtain an optimal one. As a result, it is confirmed that by the smoothing interpolation prediction performances are very high and estimated Lyapunov exponents are very similar to actual ones, even though in the case of periodic responses. Moreover, it is confirmed that reconstructed bifurcation diagrams are very similar to the original ones.

This paper deals with the scattering of a plane wave from a two-dimensional random thin film. For a Gaussian random disorder, a first order solution is derived explicitly by a probabilistic method. It is then found that ripples appear in angular distributions of the incoherent scattering. Furthermore, the incoherent scattering is enhanced in the directions of backscattering and specular reflection. Physical processes that yield such an enhanced scattering are discussed. Numerical examples of the coherent and incoherent scattering are illustrated in figures.

A new multi-functional card with a display, sounder and input keys, and related communication equipment, including a microwave base station and a contactless surface reader/writer, have been developed to perform the functions of positioning, paging, returning a message and identity certification. We confirmed that a prototype subsystem was capable of providing a simple and automatic call forwarding service. The multi-functional card as an ID card and a personal data terminal, and its subsystem can provide new personal services for a multimedia office.

A miniature transceiver, including highly integrated MMIC front-end, for 1.9 GHz band personal handy phone system(PHS) has been developed. The terminal, adopting direct conversion transmitter and receiver technology, consists of four high-density RF circuit modules and a digital signal processing LSI with 2.7 V power supply. The four functional modules are a power amplifier, a transmitter,a receiver, and a frequency synthesizer. Each functional module includes one IC chip and passive LCR components connected with solder bumps on module substrate. The experimental miniature PHS handset has been fabricated to verify the design concepts of the miniature transceiver. The total volume of the developed PHS terminal is 60cc, including the 12cc front-end which comprises the four RF functional circuit modules. The air interface connection with the PHS base station simulator has been confirmed.

In order to reduce the ever increasing cost for ULSI manufacturing due to the complexity of integrated circuits, dramatic simplification in the logic LSI architecture as well as the very flexible circuit configuration have been achieved using a highfunctionality device neuron-MOSFET (γMOS).In γMOS logic circuits, however, computations based on the multiple-valued logic is the key for enhancing the functionality. Therefore, much higher accuracy of processing is required. After brief description of the operational principle of γMOS logic, the relationship between the number of multiple logic levels and the functionality enhancement is discussed for further enhancing the functionality of γMOS logic circuits by increasing the number of multiple logic levels, and the accuracy requirements for the manufacturing processes are studied. The order of a few percent accuracy is required for all principal device structural parameters when it is aimed to handle 50-level multiple-valued variable in the γMOS logic circuit.

One approach to develop software efficiently is to reuse existing software by modifying a part of it. However, modifying software will often introduce unexpected side effects into other parts of it. As a result, it costs much time and care to modify the software. So, in order to modify software efficiently, we have proposed a functional model to represent information about side effects caused by modification and a model based supporting system for modifying software. So far, however, an expert software developer must describe the entire functional model of the target software through the analysis of practical modifying processes. This will be an unnecessary burden on him. Moreover, the larger target software becomes, the harder the model construction becomes. Therefore, an automatic constructing method of the functional model is needed in order to solve this problem. So, this paper considers a method of acquiring useful interaction information by learning from training examples of modification. However, in our application domain, it seems that it is impossible to make complete domain theory and to prepare a large number or training examples in advance. Therefore, our learning method involves an integration of explanation-based learning (EBL) from positive examples of modification generated by the user and Similarity-based learning (SBL) from positive or negative examples generated by the user and the learning system. As a result, our method can acquire valid knowledge about the interaction from not so many examples under incomplete theory. Then, this paper presents a constructing method, in which our proposed learning method is incorporated, of a functional model. Finally, this paper demonstrates construction of the functional model in the domain of an event-driven queueing simulation program according to our learning method.

A stepwise refinement method of communications service specifications is proposed to generate communications software that can conform to any network architecture. This method uses a two-layered language; one layer is a service specification description language (STR), and the other layer is a supplementary specification description language for implementing STR description on a communications system (STR/D). STR specifies terminal behaviors that can be recognized from a perspective outside of the communications systems. With STR, a communications service is defined by a set of rules that can be described without detailed knowledge of communications systems or communications network architectures. Each STR rule describes a global state transition of terminals. Supplementary specifications, such as terminal control and network control, are needed to implement communications services specified by STR rules. These supplementary specifications are described by STR/D rules. Communications services, such as UPT (Universal Personal Telecommunication), are standardized so that they can be provided on a given functional model consisting of functional entities. Specifications for each functional entity in a network are obtained from the two kinds of initially described specifications mentioned above. The obtained specifications are described by STR(L) and STR/D(L) rules, which specify local specifications of a functional entity. These specifications for functional entities are then transformed into software specifications, and finally communications software is generated from these software specifications. This stepwise refinement method makes it possible to generate communications software that can conform to any functional model from service specifications.

Lexical-functional grammars (lfg's) were introduced to define the syntax of natural languages. In lfg's, a finite set of attribute-value pairs called an f-structure is associated with each internal node in a derivation tree. For efficient parsing, some subclasses of lfg's were proposed. However, these subclasses have been shown to generate at least one -complete language. In this paper, we introduce a subclass of lfg's called pd-lfg's. In pd-lfg's, an f-structure forms a pushdown stack. For a node v in a derivation tree and at most one specified child vi of v, the f-structure of vi is obtained by performing a specified pushdown stack operation on the f-structure of v. We prove the equivalence of the generative capacity of modified head grammars (mhg's) and that of pd-lfg's. Since the languages generated by mhg's are known to be recognizable in O(n6) time, the languages generated by pd-lfg's can be recognized in O(n6) time.

New circuit techniques were proposed to realize a high-density and high-performance content addressable memory (CAM). A dynamic register which functions as a status flag, and some logic circuits are organically combined and flexibly perform complex search operations, despite the compact layout area. Any kind of logic operations for the search results, that are AND, OR, INVERT, and the combinations of them, can be implemented in every word simultaneously. These circuits are implemented in an experimental 288 kbit dynamic CAM using 0.8 µm CMOS process technology. We consider these techniques to be indispensable for high-density and high-performance dynamic CAM.

We present outside-in conditional narrowing for orthogonal conditional term rewriting systems, and show the completeness of leftmost-outside-in conditional narrowing with respect to normalizable solutions. We consider orthogonal conditional term rewriting systems whose conditions consist of strict equality only. Completeness results are obtained for systems both with and without extra variables. The result bears practical significance since orthogonal conditional term rewriting systems can be viewed as a computation model for functional-logic programming languages and leftmost-outside-in conditional narrowing is the computing mechanism for the model.

The concept of functional memory was proposed over nearly four decades ago. However, the actually usable products have not appeared until the 1980s instead of the long history of development. Functional memory is classified into three categories; there are a general functional memory, a processing element array with small size memory and a special purpose memory. Today a majority of functional memory is an associative memory or a content addressable memory (CAM) and a special purpose memory based on CAM. Due to advances in fablication capability,the capacity of CAM LSI has increased over 100 K bits. A general purpose CAM was developed based on SRAM cell and DRAM cell, respectively. The typical CAM LSI of both types, 20 K bits SRAM based CAM and 288 K bits DRAM based CAM, are introduced. DRAM based CAM is attractive for the large capacity. A parallel processor architecture based on CAM cell is proposed which is called a Functional Memory Type Parallel Processor (FMPP). The basic feature is a dual character of a higher performance CAM and a tiny processor array. It can perform a highly parallel operation to the stored data.

One of the most interesting and most analyzed aspects of the CPU design is the instruction set design. How many and which operations to be provided by hardware is one of the most fundamental issues relaing to the instruction set design. This paper describes a novel method that formulates the instruction set design of ASIP (an Application Specific Integrated Processor) using a combinatorial appoach. Starting with the whole set of all possible candidata instructions that represesnt a given application domain, this approach selects a subset that maximizes the performance under the constraints of chip area, power consumption, and functional module sharing relation among operations. This leads to the efficient implementation of the selected instructions. A branch-and-bound algorithm is used to solve this combinatorial optimization problem. This approach selects the most important instructions for a given application as well as optimizing the hardware resources that implement the selected instructions. This approach also enables designers to predict the perfomance of their design before implementing them, which is a quite important feature for producing a quality design in reasonable time.

A new arithmetic multiple-valued algebra with functional completeness is introduced. The algebra is called Neuro-Algebra for it has very similar formula and architecture to neural networks. Two canonical forms of multiple-valued functions of this Neuro-Algebra are presented. Since the arithmetic operations of the Neuro-Aglebra are basically a weighted-sum and a piecewise linear operations, their implementations are very simple and straightforward. Furthermore, the multiple-valued networks based on the Neuro-Algebra can be trained by the traditional back-propagation learning algorithm directly.

A quantum interconnection scheme by controlling the Coulomb interaction between ballistic electrons is proposed in which 2DEG (2 dimensional electron gas) plays the role of an interconnection medium. This concept brings up new possibilities for the interconnection approach in various fields such as parallel processing, telecommunications switching, and quantum functional devices. Cross-over interconnection, address collision, and address selection in a quantum information network system were analyzed as the first step. The obtained results have shown that the interconnection probability can be controlled by the velocity and timing of the ballistic electron emission from the emitter electrode. The proposed interconnection scheme is expected to open up a new field of quantum effect integrated circuits in the 21st century.

Reducing communication complexity is a viable approach to multilevel logic synthesis. A communication complexity based approach was proposed previously. In the previous works, only disjoint input decomposition was considered. However, for certain types of circuits, the circuit size can be reduced by using overlapped decomposition. In this paper, we consider overlapped decompositions. Some design issues for overlapped decompositions such as detecting globals" and deriving subfunctions are addressed. Moreover, the Decomposition Don't Cares (DDC) is considered for improving the decomposed results. By using these techniques together, the area and delay of circuits can be further minimized.

In this letter, a practical functional test method is proposed for production tests of microprocessor based sequence controllers. In our method, a controller under test is determined as a faulty one if the outputs defined in the process flowchart can not be provided from the circuit.

We have developed a new functional MOS transistor called Neuron MOSFET (abbreviated as neuMOS or νMOS) which simulates the function of biological neurons. The new transistor is capable of executing a weighted sum calculation of multiple input signals and threshold operation based on the result of weighted summation, all in the voltage mode at a single transistor level. By utilizing its neuron-like very powerful functional capability, various circuits essential for multiple-valued logic operation have been designed using quite simple circuit configurations. The circuit designs for data conversion between the multivalued and binary logic systems and for generating universal literal functions are described and their experimental verifications are presented. One of the most important features of νMOS multivalued lagic circuit is that the circuit operates basically in the voltage mode, thus greatly reducing the power dissipation as compared to the conventional current mode circuitry. This is indeed most essential in implementing multivalued logic systems in ultra large scale integration. Another important feature of νMOS design is in its flexibility of implementing logic functions. The functional form of a universal literal function, for instance, can be arbitrarily altered by external signals without any modifications in its hardware configuration. A circuit representing multiple-valued multithreshold functions is also proposed.

The characteristics of an optical functional integrated circuit and its applications are discussed. This circuit is based upon a Mach-Zehnder interferometer type waveguide device employing thermo-optic effect. This circuit is compact, cost-effective and practical. One proposed application is an optical loopback circuit to test both OCU loop 1 and DSU loop C. This optical loopback circuit with an attenuator and space switches is formed on a common silicon substrate, and using this circuit both loopback and line tests are independently available at the same access point. The other is an optical selector. This optical selector with WDM-MUX/DMUX and space switches is formed on a common silicon substrate, and using this selector, wavelength selection from medium density WDM (MDWDM) signal can be performed. Each MDWDM signal carries both AM and FM-FDM video signals modulated by Subcarrier Multiplexing (SCM) techniques. This selector can be wired in point-to-multipoint configurations to home video appliances.

After the intrinsic pulsed light illumination, a transient negative photoconductivity (TRANP) was observed in silicon doped with gold. The ambient temperature dependence of the TRANP-current was measured and compared with the simulated results obtained by solving rate equations. The temperature dependence of the peak value of the TRANP-current was in agreement with the simulated result. The activation energy of gold acceptor level obtained from the time constant in the recovery process was also consistent with the simulation. It was cleared from this result that the recovery process is dominated by the electron re-emission from gold acceptor level to the conduction band. It was concluded that the occurrence of the TRANP is well explained by using our model proposed before.