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[Keyword] oxide(116hit)

61-80hit(116hit)

  • High-Rate Deposition of Titanium Dioxide Films with Photocatalytic Activities by Gas Flow Sputtering

    Kiyoshi ISHII  Kazunari KUROKAWA  Sachio YOSHIHARA  

     
    PAPER

      Vol:
    E87-C No:2
      Page(s):
    232-237

    Photocatalytic TiO2 films were prepared by reactive gas flow sputtering (GFS), which enables sputter-deposition at a high pressure of about 100 Pa. A pure Ti tube was used as the target, and the O2 gas was supplied in front of the substrate, resulting in a very stable discharge and a high deposition rate of 80 nm/min. The crystal structure and morphology of TiO2 films were found to strongly depend on the flow rate of O2 gas during sputtering. Polycrystalline films composed of rutile and anatase crystallites were deposited at a low O2 flow rate of less than 2 sccm when Ar flow rate was set at 300 sccm, and amorphous films were deposited at higher O2 flow rates. Polycrystalline films composed of very small crystallites showed high levels of photocatalytic activity, while amorphous films showed no activity.

  • Suppression of Charges in Al2O3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation

    Kenzo MANABE  Kazuhiko ENDO  Satoshi KAMIYAMA  Toshiyuki IWAMOTO  Takashi OGURA  Nobuyuki IKARASHI  Toyoji YAMAMOTO  Toru TATSUMI  

     
    PAPER

      Vol:
    E87-C No:1
      Page(s):
    30-36

    We studied nitrogen incorporation in Al2O3 gate dielectrics by nitrogen plasma and examined the dependence of the electrical properties on the nitrogen incorporation. We found that the nitrogen concentration and profile in Al2O3 films thinner than 3 nm can be controlled by the substrate temperature and the plasma conditions. The electrical characterization showed that the plasma nitridation suppresses charges in Al2O3 films and prevents dopant penetration through the gate dielectric without increasing the leakage current or the interfacial trap density. We also demonstrated the improved performance of a metal-oxide-semiconductor field effect transistor by using a plasma nitrided Al2O3 gate dielectric. These results indicate that plasma nitridation is a promising method for improving the electrical properties of Al2O3 gate dielectrics.

  • Millimeter-Wave Processing of LaCrO3 and LaNiO3 Perovskites Using 28 GHz Frequency

    Hirotsugu TAKIZAWA  Masato IWASAKI  

     
    PAPER-Millimeter-Wave Heating

      Vol:
    E86-C No:12
      Page(s):
    2469-2473

    Both Cr2O3 and NiO absorb 28 GHz milli-meter-wave energy well and this strong coupling with millimeter-waves can be used to promote a chemical reaction with La2O3 to form perovskite-type LaCrO3 or LaNiO3 ceramics. In La2O3-Cr2O3 system, the reaction proceeded rapidly and single phase LaCrO3 could be synthesized within 15 min even at lower temperature (400) as compared to conventional synthesis (T > 800). In the case of LaNiO3, the reaction proceeded rapidly in the early stage of heating (t < 15 min), but not completed even after prolonged millimeter-wave irradiation. The results suggest an importance of millimeter-wave penetration depth, especially for processing of conductive materials.

  • High-Luminance EL Devices Using Y2GeO5 Phosphor Thin Films Prepared by Magnetron Sputtering

    Tadatsugu MINAMI  Youhei KOBAYASHI  Toshihiro MIYATA  Masashi YAMAZAKI  

     
    PAPER-EL Displays

      Vol:
    E85-C No:11
      Page(s):
    1905-1910

    Thin-film electroluminescent (TFEL) devices have been newly developed using Y2GeO5 oxide phosphor thin films prepared by r.f. magnetron sputtering. Multicolor emissions were observed in TFEL devices fabricated using various impurity-activated Y2GeO5 phosphor thin films. A high-luminance TFEL device was fabricated using a Y2GeO5:Mn thin film prepared with a Mn content of 2 at.% and postannealed at 1020: luminances of 414 and 3020 cd/m2 and luminous efficiencies of 6.7 and 0.93 lm/W for yellow emission when driven at 60 Hz and 1 kHz, respectively. Newly developed oxide Y2GeO5:Mn phosphors are very promising for use as the thin-film emitting layer of TFEL devices.

  • Effects of N2O Plasma Treatment for Low Temperature Polycrystalline Silicon TFTs

    Yoshiki EBIKO  Yasuyoshi MISHIMA  

     
    PAPER-Active Matrix Displays

      Vol:
    E85-C No:11
      Page(s):
    1838-1843

    We present the effects of N2O plasma treatment for hot carrier reliability and gate oxide stability in excimer-laser annealed poly-Si TFTs. N2O plasma treatment between SiO2 and poly-Si suppresses both the reduction in mobility caused by hot carrier stress and the Vth shift caused by gate bias stress. The results of XPS spectra and the energy distribution of the trap state density of stressed TFTs show that the introduction of Si-N bonds plays an important role in poly-Si TFT reliability.

  • Effect of Atmosphere Change on Contact Voltage Drop at Sliding Contact

    Takahiro UENO  Koichiro SAWA  

     
    PAPER-Electromechanical Devices and Components

      Vol:
    E85-C No:7
      Page(s):
    1478-1485

    The surface film of a slip ring is important for the sliding contact phenomenon. The surface film is affected by atmospheric temperature, humidity and air pressure. The main objective of our study is to examine the effect of oxygen gas on the sliding contact phenomenon. In the present experiment, we examined the contact voltage drop for continuous sliding when the atmosphere is changed from low pressure to atmospheric pressure by introducing oxygen (O2 20%+N2 80%) or nitrogen gas. As a result, the contact voltage drop increases rapidly with increasing gas pressure, and its fluctuation also becomes large. These phenomena are observed in both cases of oxygen (O2 20%+N2 80%) and nitrogen introduction. The results clearly show that the sudden increase of contact voltage drop is affected by factors other than the oxide film. Actually, the oxide film is not formed in the nitrogen atmosphere. Furthermore, the frictional coefficient of carbon and copper ring is changed at ambient atmosphere. It is inferred from these data that the contact voltage drop may be affected by the frictional coefficient. When the gas pressure decreases again, the contact voltage drop does not suffer from the effect of ambient gas. Therefore, only the resistance of the oxide film appears to affect contact voltage drop. In this paper, the effect of sliding contact phenomenon on the contact voltage drop by gas adsorption and film generation was examined.

  • Uniform Raised-Salicide Technology for High-Performance CMOS Devices

    Hitoshi WAKABAYASHI  Takeshi ANDOH  Tohru MOGAMI  Toru TATSUMI  Takemitsu KUNIO  

     
    PAPER

      Vol:
    E85-C No:5
      Page(s):
    1104-1110

    A uniform raised-salicide technology has been investigated using both uniform selective-epitaxial-growth (SEG) silicon and salicide films, to reduce a junction leakage current of shallow source/drain (S/D) regions for high-performance CMOS devices. The uniform SEG-Si film without pits is formed by using a wet process, which is a carbon-free oxide removal only using a dilute hydrofluoric acid (DHF) dipping, prior to the Si-SEG process. After a titanium-salicide formation using a conventional two-step salicide process, this uniform SEG-Si film achieves good S/D junction characteristics. The uniform titanium-salicide film without bowing into a silicon is formed by a smaller Ti/SEG-Si thickness ratio, which results in a low sheet resistance of 5 Ω/sq. without a narrow-line effect. Furthermore, the drive current is maximized by this raised-salicide film using a Ti/SEG-Si thickness ratio of 1.0.

  • A Site Specification Method of Gate Oxide Breakdown Spots by a New Test Structure of MOS Capacitors

    Satoshi IKEDA  Hidetsugu UCHIDA  Norio HIRASHITA  

     
    PAPER

      Vol:
    E85-C No:5
      Page(s):
    1134-1137

    A new test structure to specify accurately the position of gate oxide breakdown is proposed, which simply consists of a conventional polycrystalline Si gate MOS capacitor and Al dots array diagonally lined-up on the capacitor. Optical beam induced current microscope was used to discriminate the breakdown spot. Layout of the discriminated spot among the Al dot array accurately determined the breakdown position. A 5-nm-thick gate oxide breakdown spot determined by this method has been successfully investigated by cross-sectional transmission electron microscopy (XTEM). A series of site-specified XTEM studies reveal local melting of anode Si during the intrinsic dielectric breakdown. This test structure is practically useful for site-specified XTEM studies on process-induced degradation phenomena of thin gate oxides.

  • CMOS Charge Pumps Using Cross-Coupled Charge Transfer Switches with Improved Voltage Pumping Gain and Low Gate-Oxide Stress for Low-Voltage Memory Circuits

    Kyeong-Sik MIN  Jin-Hong AHN  

     
    LETTER-Electronic Circuits

      Vol:
    E85-C No:1
      Page(s):
    225-229

    To overcome the problems of the modified Dickson pump like NCP-2, another pump (CCTS-1) where simple voltage doublers are cascaded in series and each of them has cross-coupled configuration is studied in this letter for possible use in low-voltage EEPROMs and DRAMs. Though this concept of cascading doublers has been previously proposed, it is firstly addressed in this letter that CCTS-1 has lower gate-oxide stress, improved voltage pumping gain, and better power efficiency than NCP-2 so that CCTS-1 can be more suitable for multi-stage pump in particular at low VCC. In addition, CCTS-2 is proposed to overcome the degraded body-effect of CCTS-1 without using boosted clocks when the stage number is large.

  • Transverse Mode Control and Reduction of Thermal Resistance in 850 nm Oxide Confined VCSELs

    Natsumi UEDA  Masato TACHIBANA  Norihiro IWAI  Tatsuyuki SHINAGAWA  Maiko ARIGA  Yasumasa SASAKI  Noriyuki YOKOUCHI  Yasukazu SHIINA  Akihiko KASUKAWA  

     
    PAPER

      Vol:
    E85-C No:1
      Page(s):
    64-70

    The methods for the transverse mode control and temperature characteristics improvement in 850 nm oxide confined vertical cavity surface emitting lasers (VCSELs) were investigated. For transverse mode control, dielectric aperture was demonstrated to suppress higher order modes. Substitution of AlAs for Al0.9Ga0.1As in partial bottom DBR was demonstrated to reduce thermal resistance of the devices and to enable operation in high temperature of 85.

  • MNOS Nonvolatile Semiconductor Memory Technology: Present and Future

    Yoshiaki KAMIGAKI  Shin'ichi MINAMI  

     
    INVITED PAPER-MNOS Memory

      Vol:
    E84-C No:6
      Page(s):
    713-723

    We have manufactured large-scaled highly reliable MNOS EEPROMs over the last twenty years. In particular, at the present time, the smart-card microcontroller incorporating an embedded 32-kB MNOS EEPROM is rapidly expanding the markets for mobile applications. It might be said that we have established the conventional MNOS nonvolatile semiconductor memory technology. This paper describes the device design concepts of the MNOS memory, which include the optimization and control of the tunnel oxide film thickness (1.8 nm), and the scaling guideline that considers the charge distribution in the trapping nitride film. We have developed a high-performance MONOS structure and have not found any failure due to the MONOS devices in high-density EEPROM products during 10-year data retention tests after 105 erase/write cycles. The future development of this highly reliable MNOS-type memory will be focussed on the high-density cell structure and high-speed programming method. Recently, some promising ideas for utilizing an MNOS-type memory device, such as 1-Tr/bit cell for byte-erasable full-featured EEPROMs and 2-bit/Tr cell for flash EEPROMs have been proposed. We are convinced that MNOS technology will advance into the area of nonvolatile semiconductor memories because of its high reliability and high yield of products.

  • Ultra Low Power Operation of Partially-Depleted SOI/CMOS Integrated Circuits

    Koichiro MASHIKO  Kimio UEDA  Tsutomu YOSHIMURA  Takanori HIROTA  Yoshiki WADA  Jun TAKASOH  Kazuo KUBO  

     
    INVITED PAPER

      Vol:
    E83-C No:11
      Page(s):
    1697-1704

    Based on the partially-depleted, thin-film SOI/CMOS technology, the influence of reduced junction capacitance on the performance of the elementary gates and large scale gate array chip is reviewed. To further reduce the power consumption, SOI-specific device configurations, in which the body-bias is individually controlled, are effective in lowering the supply voltage and hence the power consumption while keeping the circuit speed. Two attempts are introduced: (1) DTMOS (Dynamic-Threshold MOS)/SOI to achieve ultra low-voltage and yet high-speed operation, and (2) ABB (Active-Body-Bias) MOS to enhance the current drive under the low supply voltage.

  • Influence of Electrical Load Conditions on Sticking Characteristics in Silver-Oxide Contacts

    Kenya MORI  Takeshi AOKI  Kiyokazu KOJIMA  Kunihiro SHIMA  

     
    PAPER

      Vol:
    E83-C No:9
      Page(s):
    1414-1421

    Sticking is one of dominant characteristics of reliability in relays for medium current loads from several amperes to several dozen amperes, which are used for relays for automobiles, industrial control units or power supplies of household electrical appliances. Correlations between the release failures due to sticking and contact characteristics such as arc discharges, material parameters and design factors in relays have never been always made clear. This puts difficulty in the way of reasonable development of contact materials and rational design of relays. So, dependence of electrical load conditions on sticking characteristics are investigated, using the Ag-CdO contacts which have had high practical use to relays for medium current loads. Furthermore, relationship among the sticking characteristics, arc discharge characteristics and contact surface properties after operations are studied. Mechanism of sticking is considered on the basis of those data. The results are as follows: (1) Sticking phenomenon occurs intermittently from initial operations and lasts to the end. (2) The µ + 2 σ value (the sum of the mean value and the integral multiple of the standard deviation of sticking force) increases in proportion to the circuit current. On the other hand, it has the maximum value at a circuit voltage, slightly less than the minimum arc voltage. (3) Factors causing the sticking are considered to be divided into direct factors and its root factors. It is considered that a dominant direct factor is welding, and that its root factor is bridge or welding by Joule's heat. On the other hand, the sticking force becomes rather lower as the circuit voltage increases, in the circuit voltage range where regular arc discharge occurs.

  • Comparison between Device Simulators for Gate Current Calculation in Ultra-Thin Gate Oxide n-MOSFETs

    Eric CASSAN  Sylvie GALDIN  Philippe DOLLFUS  Patrice HESTO  

     
    PAPER-Gate Tunneling Simulation

      Vol:
    E83-C No:8
      Page(s):
    1194-1202

    The gate oxide of sub-0.1 µm MOSFETs channel length is expected to be reduced beyond 3 nm in spite of an increasing direct tunneling gate current. As tunnel injection modeling into SiO2 is expected to depend on the electron transport model adopted for the device description, a critical comparison is made in this paper between gate currents obtained from simulators based on Drift-Diffusion, Energy-Balance, and Monte Carlo models. The studied device is a 0.07 µm channel length n-MOSFET with 1.5 nm thick gate oxide. It is shown that positive drain voltage is responsible for two opposite effects on DT leakage: a carrier heating and a potential barrier hardening along the channel. It is proved by a careful study of Monte Carlo microscopic quantities that, contrary to what holds for thicker gate oxide transistors, the balance is favorable to the potential barrier effect. Injection into SiO2 is then dominated by near-thermal carriers injected at the channel beginning. For this reason, the gate current decreases when increasing the drain bias, with the maximum leakage obtained for (Vgs=Vdd, Vds=0), and a correct agreement is obtained between the Drift-Diffusion, Energy-Balance, and Monte Carlo approaches of gate current calculation, in spite of very different physical descriptions of transport at the microscopic level.

  • Homogeneous Transport in Silicon Dioxide Using the Spherical-Harmonics Expansion of the BTE

    Lucia SCOZZOLI  Susanna REGGIANI  Massimo RUDAN  

     
    PAPER-Gate Tunneling Simulation

      Vol:
    E83-C No:8
      Page(s):
    1183-1188

    A first-order investigation of the transport and energy-loss processes in silicon dioxide is worked out in the frame of the Spherical-Harmonics solution of the Boltzmann Transport Equation. The SiO2 conduction band is treated as a single-valley spherical and parabolic band. The relevant scattering mechanisms are modeled consistently: both the polar and nonpolar electron-phonon scattering mechanisms are considered. The scattering rates for each contribution are analyzed in comparison with Monte Carlo data. A number of macroscopic transport properties of electrons in SiO2 are worked out in the steady-state regime for a homogeneous bulk structure. The investigation shows a good agreement in comparison with experiments in the low-field regime and for different temperatures.

  • Modeling and Simulation of Tunneling Current in MOS Devices Including Quantum Mechanical Effects

    Andrea GHETTI  Jeff BUDE  Paul SILVERMAN  Amal HAMAD  Hem VAIDYA  

     
    PAPER-Gate Tunneling Simulation

      Vol:
    E83-C No:8
      Page(s):
    1175-1182

    In this paper we report on the modeling and simulation of tunneling current in MOS devices including quantum mechanical effects. The simulation model features an original scheme for the self-consistent solution of Poisson and Schrodinger equations and it is used for the extraction of the oxide thickness, by fitting CV curves, and the calculation of the tunneling current. Simulations and experiments are compared for different device types and oxide thicknesses (1.5-6.5 nm) showing good agreement and pointing out the importance of quantum mechanical modeling and the presence of many tunneling mechanisms in ultra-thin oxide MOS devices.

  • The Nature of Metallic Contamination on Various Silicon Substrates

    Geun-Min CHOI  Hiroshi MORITA  Jong-Soo KIM  Tadahiro OHMI  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E82-C No:10
      Page(s):
    1839-1845

    The growth behavior of copper particle on crystalline and amorphous silicon surfaces has been investigated. The study reveals that the growth behavior of copper particle depends on the substrate condition. When samples are intentionally contaminated in ultrapure water, both crystalline and amorphous silicon surfaces show no difference in their contamination levels. However, copper particles were not observed on an amorphous silicon surface except dipping in dilute CuCl2 solution. The copper concentration on an amorphous silicon surface after dipping in a 0.5% HF solution is similar to the level after contaminating in ultrapure water. The copper contamination level on a crystalline silicon surface, except from CuCl2 solution, decreased two orders of magnitude as compared with ultrapure water. The copper impurity level on crystalline silicon surface was reduced by two orders by cleaning in a sulfuric acid-hydrogen peroxide mixture. The sulfuric acid-hydrogen peroxide mixture cleaning was not effective on an amorphous silicon surface. When native oxide pre-existed on an amorphous silicon surface before contamination, however, the sulfuric acid-hydrogen peroxide mixture cleaning was effective for removing copper impurity. Our results suggest that copper contamination on an amorphous silicon surface have the characteristics of bonding directly with silicon and/or existing in the native oxide, in contrast with the situation on crystalline silicon surface. After contamination with 1000 ppm copper in CuF2 solution, the etch rate of an amorphous silicon film in a 0.5% HF solution was approximately one order of magnitude faster than that of crystalline silicon. This is attributed to the difference in crystalline structure between crystalline silicon and amorphous silicon.

  • Characterization of Extrinsic Oxide Breakdown on Thin Dielectric Oxide

    Katsuya SHIGA  Junko KOMORI  Masafumi KATSUMATA  Akinobu TERAMOTO  Yoji MASHIKO  

     
    PAPER

      Vol:
    E82-C No:4
      Page(s):
    589-592

    A new method using new test structure, which is connected 15.4 million MOS transistor, for evaluating extrinsic oxide breakdown is proposed. The active gate area which is needed to predict reliability will be shown. And by using this new method, activation energy not only for the intrinsic breakdown but also for the extrinsic breakdown are obtained.

  • Increase in Contact Resistance of Hard Gold Plating during Thermal Aging -- Nickel-Hardened Gold and Cobalt-Hardened Gold --

    Hisao KUMAKURA  Makoto SEKIGUCHI  

     
    PAPER

      Vol:
    E82-C No:1
      Page(s):
    13-18

    Contact resistance of nickel hardened gold electroplate (NiHG) deposited on nickel-underplated phosphor bronze disk coupons (substrate) after thermal aging was measured with a hard gold-plated beryllium copper alloy pin probe by means of a four-point probe technique, compared to that of cobalt-hardened gold electroplate (CoHG). Surface of NiHG plated coupons after aging was analyzed by X-ray photoelectron spectroscopy (XPS) to investigate the influence of the oxide film formation during thermal aging on contact resistance of NiHG electroplate, compared to that of CoHG. Initial contact resistance of the NiHG coupons was less than 10 mΩ at a contact forces more than 0.05 N, increased to 10 mΩ at a contact force of 0.05 N after 100 hours aging at 200. In contrast, contact resistance of the CoHG coupons progressively increased with increase in aging time, reached 1000 mΩ even at a contact force of 0.05 N after 52 hours aging. XPS analysis for the NiHG coupons demonstrated that nickel oxide film was formed on the NiHG surface in conformity with parabolic growth kinetics, as cobalt oxide film formed on CoHG surface. However, a thickness of the latter film was approximately 4-fold larger than that of former after 100 hours aging at 200. The small increase in contact resistance of NiHG coupons after aging suggested to be due to inhibitory of nickel oxide film growth on the surface. The cause of relatively low and steady contact resistance of NiHG during thermal aging was discussed.

  • Life of Dispenser Cathodes and Oxide Cathodes in Laminar-Flow Type and Crossover Type Electron Guns

    Toshiharu HIGUCHI  Katsuhisa HOMMA  Takahiro KAWAHARADA  

     
    PAPER

      Vol:
    E81-C No:11
      Page(s):
    1703-1710

    Differences in the behavior of dispenser cathodes and oxide cathodes in laminar-flow type and crossover type electron guns were investigated by experiments and simulations under high-current-density conditions. When an oxide cathode is operated under such conditions, the heating effect due to Joule heat in the oxide layer exceeds the cooling effect, depending on the product of the work function and the cathode current, resulting in a rise in the cathode temperature. This rise in cathode temperature aggravates deterioration of emission characteristics during the life of an oxide cathode. In the case of the dispenser cathode, however, the cathode temperature decreases under high-current-density conditions. When an oxide cathode in a crossover type electron gun is operated, equipotential surfaces are formed in the curved surface in the oxide layer. The formation of an equipotential surface leads to relaxation of the loading. It is considered that this is the reason for the longer life of an oxide cathode in a crossover type electron gun than that of an oxide cathode in a laminar-flow type electron gun.

61-80hit(116hit)