This paper proposes the Total High Performance Time as a performance-related reliability measure in degradable/recoverable real-time systems. This measure reflects the effect of system behavior in pending states that are temporary states between the normal state and degraded states where the system operates in a degraded mode as a consequence of component failures. Such systems have to perform not only normal procedures but also error/recovery procedures in pending states, so the performance there is lower than that in the degraded states. In real-time systems, if performance is less than a lower limit, the response time for on-line transactions cannot meet the deadline. The consequences of failing to meet the deadline could be system failure. Therefore, the system reliability is affected significantly by whether the performance there is higher than the lower limit or not. A state where the level of performance is higher than the lower limit is called a High Performance State. We define the Total High Performance Time as the total time that the system spends operating in High Performance States. Moreover, this paper explains how to utilize the Total High Performance Time in system design. We model a method of controlling a system in pending states by using Extended Stochastic Petri Nets and obtain the characteristics necessary for evaluating the Total High Performance Time by analyzing the model. This approach is applied to a storage system that controls mirrored disks, and shown to be helpful for designing a method of controlling a system in pending states, which has been considered difficult because of the trade-off between performance and reliability.

A new approach to the problem of optimal software testing time is described. Most models implicitly assume the testing is terminated at the end of a prescribed period of time without user's approval. It means the release time and the in-service reliability are determined unilaterally by the developer. If software developer uses and maintains it, the assumption is appropriate. But, it may be inappropriate, if a software requiring more stringent reliability is developed by second party on a contract basis. In this case, the time of release is usually determined with the user's approval. To overcome the weaknesses of the assumption, a two stage testing with failure-free release policy is proposed. A software, after being tested by the developer for some time (in-house testing), is transferred to acceptance testing performed jointly with the user. During the acceptance testing, it is released when τ units of time specified by user is observed to be failure-free for the first time. The policy may be attractive to a user because he can determine the time of release, and extend the testing time by increasing τ. A software cost model for the policy is developed. For the software developer, an optimal in-house testing time minimizing software cost, and various quantities of interests, such as expected periods of acceptance testing, are derived based on the Jelinski-Moranda software reliability model. Finally, numerical examples are shown to illustrate the results.

This is a full text of my presentation titled "Evaluation of Maintenability Improvement by Systems Reliability Growth" at the First Beijing International Conference on Reliability Maintenability and Safety (BICRMS'92). This thesis describes evaluation methods of reliability growth for field working systems by surveying maintenability improvement. And it also touch upon customer satisfaction. As unavailability is suitable for measuring reliability, I use in this thesis a decrease in unavailability per month as a means to evaluate reliability and its growth. "Maintenability" is broadly defined as a system's capability to maintain, repair and recover its functions with the aid of failsoft and RAISIS. The term "Customer satisfaction" is difficult to define, but on the practical market basis it can be fairly easily and objectively measured by examining the cancel rate by customers. This thesis includes topics such as: (1) When a system is in disorder it can restore its original functions although, strictly speaking, such system changes are classified as another systems statistically. (2) Despite this, we need to evaluate a specific system's reliability continously, and study reliability growth, industrial life, and customer satisfaction. Unavailability can be reduced by improving systems through upgrading component.

In this paper, we propose a plausible software reliability growth model by applying a mathematical technique of stochastic differential equations. First, we extend a basic differential equation describing the average behavior of software fault-detection processes during the testing phase to a stochastic differential equation of ItÔ type, and derive a probability distribution of its solution processes. Second, we obtain several software reliability measures from the probability distribution. Finally, applying a method of maximum-likelihood we estimate unknown parameters in our model by using available data in the actual software testing procedures, and numerically show the stochastic behavior of the number of faults remaining in the software system. Further, the model is compared among the existing software reliability growth models in terms of goodness-of-fit.

It has been 15 years since we started producing the electric double-layer capacitors (also known as Super Capacitor) in 1978. Over the years we have introduced improvements that increased reliability and increased life. For example, after subjecting capacitors manufactured in 1984 and 1990 to load life tests (70, 5.5 V) for 2,000 hours, we discovered that the rate of change in capacitance (ΔC/C) of capacitors manufactured in 1990 was less than one-half that of capacitors manufactured in 1984. This shows that we have successfully increased the life of our electric double-layer capacitors. We conducted investigations regarding factors that contribute to volume of the electrolyte solution and better sealing properties. In the load life test, we observed that when the ratio of the weights of the electrolyte solution and the powdered activated carbon (hereinafter referred to as LB) was increased, the time it took before ΔC/C reached -30% was lengthened. This means that increasing LB also increases life. Furthermore, we also observed that when the gas permeability rate of the collector's rubber material was decreased in the load life test (70, 5.5 V), the time it took befor (ΔC/C) reached -30% was longer. Therefore life is dependent on the gas permeability rate (sealing property) of the collector rubber.

A new effect of barrier metal laid under 1st aluminum layer on electromigration has been found in interconnect vias. This effect can be explained by Si nodules at vias. Stress induced open failure occurred at viaholes and depends on the size of the vias. Stress-migration at vias can be prevented by TiN barrier metal between 1st and 2nd metals. Reliability of electro- and stress-migration at interconnect vias can be explosively improved by using TiN barrier metal.

Via electromigration (EM) performance of aluminum based metallization (AL) systems has been investigated for vias chains of 1500-4000 vias of 1.0 micron diameter. The results show that via EM lifetime can not be enhanced by a simple increase of M2 step coverage in AL/AL vias because the EM induced voids are formed at AL/AL via interface where electrons flow from Ml to M2 even in the case of very poor M2 step coverage. The voids are induced by the boundary layer in AL/AL vias, where a temperature gradient causes discontinuity of aluminum atoms flux. The failure location is not moved though via EM lifetime can be improved by controlling stress in passivation, sputter etch removal thickness and grain size of the first metal. Next, the effect of the boundary layer are eliminated by depositing titanium under the second aluminum or depositing WSi on the first aluminum. In the both cases, via EM lifetime are improved and the failure locations are changed. Especially WSi layer suppresses the voids formation rather than titanium. Models for the failure mechanism in each metallization system are further discussed.

Experimental evidence of a two-step enhancement in electromigration lifetime is presented through pulsed testing that extends over a wide frequency range from 7 mHz to 50 MHz. It is also found, through an accompanying failure analysis, that the failure mechanism is not affected by current pulsing. Test samples were the lowew metal lines and the through-holes in double-level interconnects. The same results were obtained for both samples. The testing temperature of the test conductor was determined considering the Joule heating to eliminate errors in lifetime estimation due to temperature errors. A two-step enhancement in lifetime is extracted by normalizing the pulsed electromigration lifetime by the continuous one. The first step occurs in the frequency range from 0.1 to 10 kHz where the lifetime increases with (duty ratio)-2 and the second step occurs above 100 kHz with (duty ratio)-3. The transition frequency in the first-step enhancement shifts to the higher frequency region with a decrease in stress temperature or an increase in current density, whereas the transition frequency in the second step is not affected by these stress conditions. The lifetime enhancement is analyzed in relation to the relaxation process during the current pulsing. According to the two-step behavior, two distinct relaxation times are assumed as opposed to the single relaxation time in other proposed models. The results of the analysis agree with the experimental results for the dependence on the frequency and duty ratio of pulses. The two experimentally derived relaxation times are about 5 s and 1 µs.

In a probabilistic graph (network), source-to-all-terminal (SAT) reliability may be defined as the probability that there exists at least one path consisting only of successful arcs from source vertex s to every other vertex. In this paper, we define an optimal SAT reliability formula to be the one with minimal number of literals or operators. At first, this paper describes an arc-reductions (open- or short-circuiting) method for obtaining a factored formula of directed graph. Next, we discuss a simple strategy to get an optimal formula being a product of the reliability formulas of vertex-section graphs, each of which contains a distinct strongly connected component of the given graph. This method reduces the computing cost and data processing effort required tu generate the optimal factored formula, which contains no identical product terms.

Non-homogeneous Poisson Processes (NHPP's) can be applied for analyzing reliability growth models for hardware and/or software. Evaluating the Mean Time Between Failures (MTBF's) for such processes, we can evaluate the present status (the degree of improvement). However, it is difficult to evaluate the MTBF's for such processes analytically except the simplest cases. The so-called instantaneous MTBF's which can be easily evaluated are applied in practice instead of the exact MTBF's. In this paper, we discuss both MTBF's analytically, and derive the conditions for the existence of both exact and instantaneous MTBF's. We further illustrate both MTBF's for the Weibull process and S-shaped reliability growth model numerically.

This paper presents two approaches for computing the reliability of complex networks subject to two kinds of failure, open failure and shorted failure. The reliabilities of some series-parallel networks are considered by many analysts. However a practical system is more complex. The methods given in this paper can be applied not only to a series-parallel network but also to a non-series-parallel network which is composed of non-identical and independent components subject to two kinds of failure. This paper also deals with a network subject to flow quantity constraint such as the one which is required to control j or more separate paths. For such a system it is difficult to obtain system reliability because the number of states to be considered in this system is extremely large compared to a conventional 2-state device system. In this paper we obtain the reliabilities for such systems by a combinatorial approach and by a simulation approach.

When used for automotive applications, microcomputers have to meet two requirements more demanding than those for general use. One of these requirements is to respond to external events within a time scale of microseconds; the other is the high quality and high reliability necessary for the severe environmental operating conditions and the ambitious market requirements inherent to automotive applications. These needs especially the latter one have been responded to by further elaboration of each basic technology involved in semiconductor manufacturing. At the same time, various logic parts have been built into the microcomputer. This paper deals with several design approaches to the high quality and high reliability objective. First, testability improvement by the logical separation method focusing on the logic simulation model for generating test vectors, which enables us to reduce the time required for test vector development in half. Next, noise suppression methods to gain electromagnetic compatibility (EMC). Then, simplified memory transistor's analysis to evaluate the V/I-characteristics directly via external pins without opening the model seal, removing the passivation and placing a probe needle on the chip. Finally, increased reliability of on-chip EPROM using a special circuit raising the threshold value by approximately 1(V) compared to EPROM's without such a circuit.

Gamma(γ)-ray irradiation effects have been investigated on three types of low-noise HEMTs, AlGaAs/GaAs conventional HEMT (conv. HEMT), AlGaAs/InGaAs pseudomorphic HEMT (P-HEMT) and InAlAs/InGaAs/InP HEMT (InP-based HEMT). The dose of irradiated γ-rays ranges from 1105 to 1108 rad. DC and RF characteristics of each type of HEMT are measured before and after irradiation and the parameter changes are investigated. For conv. HEMT and P-HEMT, no degradation of DC parameter is observed up to 108 rad, while noise figure (NF) at 12 GHz remains constant up to 107 rad and degrades by 0.1 dB at 108 rad. The InP-based HEMT shows IDSS and gm increase by about 10% at a dose of 108 rad and its NF at 18 GHz lowers gradually with the radiation dose. It has been found that the radiation hardness is greater than 107 rad for all types of HEMTs and over a hundred years of life can be expected against γ-ray irradiation in the space environment.

A new type jacket cutter for optical fibers is designed, and it is confirmed experimentally that its performance is superior to those of the conventional cutters. Using this new cutter which is mainly consisted of a rotatable fiber holder and a pair of blades separated by a distance of 0.3-0.4mm, only the tight jacket is cut and removed while the primary coating and the fiber are kept intact. As the result, the probability of damage to the fiber surface during jacket removal is reduced to about 0% compared to 10% found in the case of a conventional cutter. This result is useful to increase the reliability of optical fibers during assembling efforts.

Two kinds of nitrided ultrathin (510 nm) SiO2 films were formed on the silicon (100) face using rapid thermal NH3-nitridation (RTN) and rapid thermal N2O-oxynitridation (RTON) technologies. The MOS capacitors with RTN SiO2 film showed that by Fowler-Nordheim (F-N) electron injection, both electron trap density and low-field leakage increase by the NH3-nitridation. In addition, the charge-to-breakdown (QBD) value decreases owing to NH3-nitridation. By contrast, RTON SiO2 films exhibited extremely low electron trap density, almost no increase of the leakage current, and large QBD value above 200C/cm2. The oxide film composition was evaluated by secondary ion mass spectroscopy (SIMS). The chemical bonding states were also examined by Fourier transform-infrared reflection attenuated total reflectance (FT-IR ATR) and X-ray photoelectron spectroscopy (XPS) measurements. These results indicate that although a large number of nitrogen (N) atoms are incorporated by the RTN and RTON, only the RTN process generates the hydrogen-related species such as NH and SiH bounds in the film, whereas the RTON film indicates only SiN bonds in bulk SiO2. From the dielectric and physical properties of the oxide films, it is considered that the oxide wearout by high-field stress is the result of the electron trapping process, in which anomalous leakage due to trap-assisted tunneling near the injected interface rapidly increases, leading to irreversible oxide failure.

A new technique for evaluating gate oxide reliability using photon emission method has been developed. This method enables the measurements of the initial breakdown characteristics, reliability testing and failure analysis consistently. From the experimental results, followings are clarified for the first time using this technique. Failure modes in the initial characteristics have close correlation to TDDB characteristics and both characteristics correspond to the location of breakdown spot. The results suggest measures to improve the reliability of gate oxide and the existance of new failure mechanism.

Hot carrier reliability due to residual damage in the gate oxide created by synchrotron X-ray irradiation is investigated for subquarter-micrometer NMOSFETs under a wide irradiation-dose range (103,000 mJ/cm2). Although irradiation-induced interface-traps and positive charges are completely eliminated after 400 post-metalization-annealing, neutral electron traps partially remain. The effects of the residual trapa on hot-carrier degradation can be negligible when gate oxides thinner than about 5 nm are used, and it is found that there is no effect of irradiation damage on interface-trap generation due to injected hot-carriers. It is concluded that the influence of synchrotron radiation X-ray lithography on hot-carrier-induced degradation in subquarter-micrometer NMOSFETs can be negligible.

A CMOS design to achieve high drivability is examined for lower power supply voltage in 0.5 µm ULSI. The design consists of two points. (1) A very narrow (50 nm) sidewall is used to achieve high drivability and also to obtain hot-carrier-reliability. (2) A retrograded channel profile with NMOS and PMOS is designed to achieve high drivability and also to reduce short channel effect. It is shown that the propagation delay times (tpd) of a unloaded Inverter and a loaded 2-way NAND gate are improved 30% with the newly designed CMOS, compared with the conventionally designed CMOS. It is also proved that the tpd keeps the scaling trend of the previous-5 V-era even in 3.3 V-era by adapting the newly designed CMOS. Moreover, 7.1 ns multiplication time of 1616-bit multiplier is obtained under 0.5 µm design rule.

We propose a new type of Graph Rewriting Systems (GRS) that provide a theoretical foundation for using the reduction method which plays an important role on analyze network reliability. By introducing this GRS, several facts were obtained as follows: (1) We clarified the reduction methods of network reliability analysis in the theoretical framework of GRS. (2) In the framework of GRS, we clarified the significance of the completeness in the reduction methods. (3) A procedure of recognizing complete systems from only given rewriting rules was shown. Specially the procedure (3) is given by introducing a boundary graph (B-Graph). Finally an application of GRS to network reliability analysis is shown.

Actual debugging actions during the testing phase in the software development and the operation phase are not always performed perfectly. In other words, all detected software faults are not corrected and removed certainly. Generally, this is called imperfect debugging. In this paper, we discuss a software reliability growth model considering imperfect debugging that faults are not always corrected/removed when they are detected. Defining a random variable representing the cumulative number of faults corrected up to a specified testing time, this model is described by a semi-Markov process. We derive various quantitative measures for software reliability assessment and show their numercal examples.