Wen De ZHONG Yoshihiro SHIMAZU Masato TSUKADA Kenichi YUKIMATSU
The modular and growable photonic ATM switch architecture described in this paper uses both time-division and wavelength-division multiplexing technologies, so the switch capacity can be expanded in both the time and frequency domains. It uses a new implementation of output buffering scheme that overcomes the bottleneck in receiving and storing concurrent ultra fast optical cells. The capacity in one stage of a switch with this architecture can be increased from 32 gigabits per second to several terabits per second in a modular fashion. The proposed switch structure with output channel grouping can greatly reduce the amount of hardware and still guarantee the cell sequence.
N. R. ALURU Kincho H. LAW Peter M. PINSKY Arthur RAEFSKY Ronald J. G. GOOSSENS Robert W. DUTTON
Numerical simulation of the hydrodynamic semiconductor device equations requires powerful numerical schemes. A Space-time Galerkin/Least-Squares finite element formulation, that has been successfully applied to problems of fluid dynamic, is proposed for the solution of the hydrodynamic device equations. Similarity between the equations of fluid dynamic and semiconductor devices is discussed. The robustness and accuracy of the numerical scheme are demonstrated with the example of a single electron carrier submicron silicon MESFET device.
Koso MURAKAMI Satoshi KUROYANAGI
The demand for large-capacity photonic switching systems will increase as regular broadband ISDN (B-ISDN) spreads and full-motion video terminals replace telephones. Large-scale and economical optical fiber transmission lines have been built based on time-division (TD) multiplexing. To reduce costs, it is important to increase the channel multiplexity of both transmission and switching systems by using TD and wavelength-division (WD) or frequency-division (FD) technologies. We surveyed photonic switching systems' architecture and switching network structures. Switching can be divided into circuit or synchronous transfer mode (STM) switching, and asynchronous transfer mode (ATM) switching. A variety of photonic STM and ATM switching systems based on the two switching technologies have recently been proposed and demonstrated.
When we use the finite-difference time-domain (FD-TD) method to study time-domain electromagnetic fields in the unbounded surroundings, we frequently use a radiation boundary condition (RBC) by means of one-way wave equations. The reflection coefficient by the RBC is independent of frequency, but the reflection coefficient of the finite difference approximation for the RBC depends on a frequency also; this study examines how the reflection characteristics are affected by the frequency, and the study presents the coefficients used in the RBC which gives expected reflection characteristics for a frequency, and presents the application to simulation of the matched termination of a rectangular waveguide.
This paper describes the current situations and future directions of intelligent CAI researches/development in Japan. Then necessity of intelligence in CAIs/Educational systems are thought over corresponding to the model of teaching and the cognitive model of human learning like the situated learning, knowledge construction and so on. Originally, the main aims of ITSs/ICAIs are to tealize the high level environment of individual teaching/learning. So it is the most important to incorporate the intellectual function of teaching into the system. Whatever kinds of teaching purposes ITSs have, they have the quite complex structure which consists of the domain knowledge base (Expert system), student model, the tutoring knowledge base, the powerful human interface, and sophisticated inference engine with plural functions by artificial intelligence technology. In this paper, the technological and educational points of view are discussed, surveyed and summarized based on intelligent teaching functions of ITSs/ICAIs. Moreover, the meaning of new paradigm from ITSs to ILE are mentioned under the new technology of networking and multi-media.
Hirofumi KOSHIMAE Hiroaki TANAKA Shunji OSAKI
Non-homogeneous Poisson Processes (NHPP's) can be applied for analyzing reliability growth models for hardware and/or software. Evaluating the Mean Time Between Failures (MTBF's) for such processes, we can evaluate the present status (the degree of improvement). However, it is difficult to evaluate the MTBF's for such processes analytically except the simplest cases. The so-called instantaneous MTBF's which can be easily evaluated are applied in practice instead of the exact MTBF's. In this paper, we discuss both MTBF's analytically, and derive the conditions for the existence of both exact and instantaneous MTBF's. We further illustrate both MTBF's for the Weibull process and S-shaped reliability growth model numerically.
This paper describes the development of an environmental ICAI system for English conversation learning, which is equipped with a simulation-based learning environment and an advisor function. Recently there have been various educational applications or tools for adult second language education, where the learning target is the acquisition of formal knowledge of a language. When considering the implementation of a practical CAI system, methods for developing communicative competence in learners are required. Although there are a number of ICAI systems for conversation learning, often the methodologies which they apply are not completely suitable for the acquisition of the required fundamental knowledge. Our system, based on the architecture of environmental CAI, enhances communication skill acquisition. The system has a learning environment with the following features: (1) A simulation of language activities, implemented in the role-playing game style, which helps to promote a learner's motivation. (2) Educational behavior of the system is varied through the modification of the learning environment and changes in the simulation progress and control commands. (3) An induction strategy, which can cause learners to fail to achieve a learning target, is executed by an advisor mechanism. The system is a prototype architecture for application in environmental ICAI systems for simulation based learning. We believe that the architecture of this system is an efficient framework for linguistic education.
Yoshihisa HARATA Norikazu OHTA Kiyoharu HAYAKAWA Takashi SHIGEMATSU Yasushi KITA
Fuzzy control is suitable for automotive control, because fuzzy control achieves controllability as good as control by humankind. However, since automotive control requires milli-second response and learning control, and the fuzzy system in automobiles requires fewer components (built-in type), a custom fuzzy inference LSI is needed for automotive control. We then indicated requirements of a fuzzy inference LSI suitable for automotive control and fabricated a fuzzy inference LSI using 1.5 µm CMOS process technique. This fabricated fuzzy LSI is designed to utilize in various automotive control experiments such as engine control, cruise control, brake control and steering control. The number of input variables is six, the number of output variables is two, the maximum number of production rules is 256, and the inference time is 63 microseconds (under the condition of six inputs, two outputs and 256 rules). The features of the fuzzy LSI are high speed inference, a built-in type, learning control ability and a memory structure separating into a rule memory and a membership function memory. A fuzzy control system is implemented only by the addition of two devices: the fuzzy LSI and an EPROM. The fuzzy LSI was applied to a rough road durability test aiming at the automatic driving equivalent to the human driver operation. In the test, fuzzy control and linear control were compared in terms of the compensation steering degrees. Linear steering control had a high rate of compensation steering of less than thirty degrees. On the other hand, the accumulated steering compensation of less than twenty degrees in the fuzzy control was about one third that in the linear control. The fuzzy steering control had the same steering compensations as that of human steering. The fuzzy LSI fabricated for various experiments is too large (10.7 mm10.9 mm) to adopt as automotive parts. Therefore, we studied a smaller-sized fuzzy LSI by limiting functions, by changing the parallel processing into sequential processing and by thinning out the memory data of input membership functions. The number of input variables is four, the number of output variables is two, the maximum number of production rules is 160 and the expected inference time is 140 micro-seconds (in the worst case). The obtained chip is small enough (4.8 mm4.8 mm) for automotive applications. Since the chip contains all the memories that are needed to execute fuzzy inference, the chip can be built in a microprocessor as a fuzzy inference co-processor without any other circuits.
In this paper, we propose a polynomial time algorithm for computing the expected maximum number of vertex-disjoint s-t paths in a probabilistic basically series-parallel directed graph and a probabilistic series-parallel undirected graph with distinguished source s and sink t(st), where each edge has a mutually independent failure probability and each vertex is assumed to be failure-free.
Li CHEN Toru UNO Saburo ADACHI Raymond J. LUEBBERS
This paper discusses the fully three-dimensional finite difference time domain (FDTD) method to analyze a monopole antenna mounted on a rectangular conducting box covered with a layer of dielectric. The effects of the conductivity and the permittivity of the dielectric layer are investigated. It is shown that all calculation results agree very well with the measured data.
Takamoto WATANABE Yasuaki MAKINO Yoshinori OHTSUKA Shigeyuki AKITA Tadashi HATTORI
The development of highly accurate and durable control system is becoming a must for todays high performance automobiles. For example, it is necessary to up-grade todays materials and methods creating more sensitive sensors, higher speed processors and more accurate actuators, while also being more durable. Thus, the development of a CMOS time-to-digital converter LSI with half-nanosecond resolution, which controls only pulse signals was achieved by employing 1.5 µm CMOS technology. The new signal detecting circuit, 1.1 mm2 in size, converts time to numerical values over a wide measurement range (13 bits). The compact digital circuit employs a newly developed "ring gate delay system". Within the LSI the fully digital circuit is highly durable. This allows it to be utilized even under severe conditions (for example an operating ambient temperature of 130). In order to measure time accurately, a method of correcting the variation of measurement time data employing a real-time conversion fully digital circuit is described. This method allows for fully automatic correction with a microcomputer, so no manual adjustment is required. In addition to sensor circuit applications, the LSI has great potential for Application Specific Integrated Circuit, (ASIC) such as a function cell with is a completely new method of measuring time.
In this paper the two different paradigms for the design of responsive, i.e., distributed fault-tolerant real-time systems, the event-triggered (ET) approach and the time-triggered (TT) approach, are analyzed and compared. The comparison focuses on the temporal properties and considers the issues of predictability, testability, resource utilization, extensibility, and assumption coverage.
Nobutaro SHIBATA Yoshinori GOTOH Shigeru DATE
New memory-macrocell architecture has been developed to obtain high-performance macrocells with a short design Turn-Around-Time (TAT) in ASIC design. The authors propose row- and column-sliceable macrocell architecture in which only nine kinds of rectangular-functional cells, called leaf-cells, are abutted to form macrocells of any sizes. The row-sliceable structure of peripheral circuits is possible due to a newly-developed channel-embedded address decoder combined with via-hole programming. Macrocell performance, especially access time, is kept at a high level by the distributed driver configuration. Zero address-setup time during write operation is actualized by delaying internal write timing with a new delay circuit. A short design TAT of 30 minutes is accomplished due to the simplicity of both macrocell generation and the checking procedure. The macrocells are designed with gate-array and full-custom style, and fabricated with 0.5 µm CMOS technology.
Masahiro TSUNOYAMA Masataka KAWANAKA Sachio NAITO
This paper proposes a reconfigurable parallel processor based on a two-dimensional linear celular automaton model. The processor based on the model can be reconfigured quickly by utilizing the characteristics of the automaton used for its model. Moreover, the processor has short data path length between processing elements compared with the length of the processor based on one-dimensional linear cellular automaton model which has been already discussed. The processing elements of the processor based on the two-dimensional linear cellular automaton model are regarded as cells and the operational states of the processor are treated as the states of the automaton. When faults are detected, the processor can be reconfigured by changing its state under the state transition function of the processor determined by the weighting function of the automaton model. The processor can be reconfigured within a clock period required for making a state transition. This processor is extremely effective for real-time data processing systems required high reliability.
Typical processes controlled by hard real-time computer systems undergo several, mutually exclusive modes of operation. By deterministically switching among a number of static schedules, a pre run-time scheduled system is able to adapt to changing environmental situations. This paper presents concepts for specification of mode changes, construction of static schedules for modes and transitions, and timely run-time execution of mode changes. We propose concepts for mode changes in the context pre run-time scheduled hard real-time systems. While MARS is used to illustrate the concepts' application, they are applicable to a variety of systems. Our methods adhere closely to the ones established for single modes. By decomposing the system into a set of disjoint modes, the design process and its comprehension are facilitated, testing efforts are reduced significantly, and solutions are enabled which do not exist if all system activities of all modes are combined into a single schedule.
Yoshiyuki HARA Tsuneo NITTA Hiroyoshi SAITO Ken'ichiro KOBAYASHI
Text-to-speech synthesis (TTS) is currently one of the most important media conversion techniques. In this paper, we describe a Japanese TTS card developed for constructing a personal-computer-based multimedia platform, and a TTS software package developed for a workstation-based multimedia platform. Some applications of this hardware and software are also discussed. The TTS consists of a linguistic processing stage for converting text into phonetic and prosodic information, and a speech processing stage for producing speech from the phonetic and prosodic symbols. The linguistic processing stage uses morphological analysis, rewriting rules for accent movement and pause insertion, and other techniques to impart correct accentuation and a natural-sounding intonation to the synthesized speech. The speech processing stage employs the cepstrum method with consonant-vowel (CV) syllables as the synthesis unit to achieve clear and smooth synthesized speech. All of the processing for converting Japanese text (consisting of mixed Japanese Kanji and Kana characters) to synthesized speech is done internally on the TTS card. This allows the card to be used widely in various applications, including electronic mail and telephone service systems without placing any processing burden on the personal computer. The TTS software was used for an E-mail reading tool on a workstation.
Queueing problems are investigated for very wide classes of input traffic and service time models to obtain good loss probability and waiting time probability approximation. The proposed approximation is based on the fundamental recursion formula and the Chernoff bound technique, both of which requires no particular assumption for the stochastic nature of input traffic and service time, such as renewal or markovian properties. The only essential assumption is stationarity. We see that the accuracy of the obtained approximation is confirmed by comparison with computer simulation. There are a number of advantages of the proposed method of approximation when we apply it to network capacity design or path accommodation design problems. First, the proposed method has the advantage of applying to multi-media traffic. In the ATM network, a variety of bursty or non-bursty cell traffic exist and are superposed, so some unified analysis methodology is required without depending each traffic's characteristics. Since our method assumes only the stationarity of input and service process, it is applicable to arbitrary types of cell streams. Further, this approach can be used for the unexpected future traffic models. The second advantage in application is that the proposed probability approximation requires only small amount of computational complexity. Because of the use of the Chernoff bound technique, the convolution of every traffic's probability density fnuction is replaced by the product of probability generating functions. Hence, the proposed method provides a fast algorithm for, say, the call admission control problem. Third, it has the advantage of accuracy. In this paper, we applied the approxmation to the cases of homogeneous CBR traffic, non-homogeneous CBR traffic, M/D/1, AR(1)/D/1, M/M/1 and D/M/1. In all cases, the approximating values have enough accuracy for the exact values or computer simulation results from low traffic load to high load. Moreover, in all cases of the numerical comparison, our approximations are upper bounds of the real values. This is very important for the sake of conservative network design.
The emerging discipline of responsive systems demands fault-tolerant and real-time performance in uniprocessor, parallel, and distributed computing environments. The new proposal for responsiveness measure is presented, followed by an introduction of a model for responsive computing. The model, called CONCORDS (CONsensus/COmputation for Responsive Distributed Systems), is based on the integration of various forms of consensus and computation (progress or recovery). The consensus tasks include clock synchronization, diagnosis, checkpointing scheduling and resource allocation.
High performances of CMOS/SOI inverter by simulations of analytical model, reducing the poly-Si gate thickness (tm), and experiments are verified and proposed. It is shown that the tm and gate oxide thickness(tox) are correlated to gate fringing capacitance, which largely influences on the Propagation Delay Time(TPD). Contributions of gate fringing capacitance to CMOS/SIMOX inverter time delay in deep submicrometer gate devices are propounded. Measurements of the fifty-one stage ring oscillator's TPDs are completed for comparison with analytical model. Simulation results by the analytical model, including Time-Dependent Gate Capacitance (TDGC) model, agree well with the experimental results at the same conditions. Simulation results are also predicted that SOI technology is promising for speed enhancement by reducing the poly-Si gate thickness, while the tox remains constant. It is concluded that the TPDs by reducing the tm to zero are improved up to about two times faster than typically fabricated ring oscillator at 350 nm of the tm in deep-submicrometer gate CMOS/SIMOX inverters at room temperature.
Yasuharu JIN Yuichiro GOTO Yoshiro NISHIMOTO Hiroyuki NAITO Akio IWAKE
As in other fields, the automatization of railway maintenance work is a firm requirement. The authors have developed a system detecting obstacles around a railway for practical railway inspection. The system is based on an original laser-sectioning method and characterized by high accuracy with wide view and in-motion operation. It was confirmed that a static calibration was performed at an accuracy of within 5 mm. Furthermore, a theoretical estimation predicted that dynamic errors can be eliminated within a resolution of 4 mm by means of rail movement detection. In field tests on the Chuo Line, facilities were successfully inspected at speeds up to 40km/h.