The proposed scheduling scheme minimizes the energy consumption of a real-time task on the multi-core processor with the dynamic voltage and frequency scaling capability. The scheme allocates a pertinent number of cores to the task execution, inactivates unused cores, and assigns the lowest frequency meeting the deadline. For a periodic real-time task with consecutive real-time instances, the scheme prepares the minimum-energy solutions for all input cases at off-line time, and applies one of the prepared solutions to each real-time instance at runtime.

In this paper, we propose a two-step TDC with phase-interpolator and time amplifier to satisfy high resolution at 2.4 GHz input frequency by implementing delay time less than that of an inverter delay. The accuracy of phase-interpolator is improved for process variation using the resistor automatic-tuning circuit. The gain of time amplifier is improved using the delay time difference between two delay cells. It is implemented in a 0.13 µm CMOS process with a die area of 0.68 mm2. And the power consumption is 14.4 mW at a 1.2 V supply voltage. The resolution and input frequency of the TDC are 0.357 ps and 2.4 GHz, respectively.

IEEE 802.11 Wireless LANs (WLANs) support multiple transmission rates. When some stations transmit at low transmission rates, the performance of the high transmission rate stations degrades heavily, and this phenomenon is known as the performance anomaly. As a solution to the performance anomaly, airtime fairness was proposed. However, the distributed coordination function (DCF) of IEEE 802.11 cannot provide airtime fairness to all competing stations because the protocol is designed to ensure fair attempt probability. In this paper, we propose a new medium access control, successful transmission time fair MAC (STF-MAC), which is fair in terms of successful transmission time and also provides the maximum aggregate throughput of a basic service set (BSS) in distributed manner. STF-MAC can be easily applied to solve the uplink/downlink fairness problem in infrastructure mode. Through simulations, we demonstrate that STF-MAC not only remedies the performance anomaly but also maximizes the aggregate throughput under the fairness constraint.

This paper proposes a novel scheme to reduce the complexity of existing transmit diversity solutions to time domain synchronous OFDM (TDS-OFDM). The space shifted constant amplitude zero autocorrelation (CAZAC) sequence based preamble is proposed for channel estimation. Two flexible frame structures are proposed for adaptive system design as well as cyclicity reconstruction of the received inverse discrete Fourier transform (IDFT) block. With regard to channel estimation and cyclicity reconstruction, the complexity of the proposed scheme is only around 7.20% of that of the conventional solutions. Simulation results demonstrate that better bit error rate (BER) performance can be achieved over doubly selective channels.

A 200 kS/s 10-bit successive approximation (SA) analog-to-digital converter (ADC) with a rail-to-rail input signal is proposed for acquiring biosignals such as EEG and MEG signals. A split-capacitor-based digital-to-analog converter (SC-DAC) is used to reduce the power consumption and chip area. The SC-DAC's linearity is improved by using dummy capacitors and a small bootstrapped analog switch with a constant on-resistance, without increasing its area. A time-domain comparator with a replica circuit for clock feed-through noise compensation is designed by using a highly differential digital architecture involving a small area. Its area is about 50% less than that of a conventional time-domain comparator. The proposed SA ADC is implemented by using a 0.18-µm 1-poly 6-metal CMOS process with a 1 V supply. The measured DNL and INL are +0.44/-0.4 LSB and +0.71/-0.62 LSB, respectively. The SNDR is 55.43 dB for a 99.01 kHz analog input signal at a sampling rate of 200 kS/s. The power consumption and core area are 5 µW and 0.126 mm2, respectively. The FoM is 47 fJ/conversion-step.

Recently, a number of location-based services such as navigation and mobile advertising have been proposed. Such services require real-time user positions. Since a global positioning system (GPS), which is one of the most well-known techniques for real-time positioning, is unsuitable for indoor uses due to unavailability of GPS signals, many indoor positioning systems (IPSs) using WLAN, radio frequency identification tags, and so forth have been proposed. However, most of them suffer from high installation costs. In this paper, we propose a novel IPS for real-time positioning that utilizes a digital audio watermarking technique. The proposed IPS first embeds watermarks into an audio signal to generate watermarked signals, each of which is then emitted from a corresponding speaker installed in a target environment. A user of the proposed IPS receives the watermarked signals with a mobile device equipped with a microphone, and the watermarks are detected in the received signal. For positioning, we model various effects upon watermarks due to propagation in the air, i.e., delays, attenuation, and diffraction. The model enables the proposed IPS to accurately locate the user based on the watermarks detected in the received signal. The proposed IPS can be easily deployed with a low installation cost because the IPS can work with off-the-shelf speakers that have been already installed in most of the indoor environments such as department stores, amusement arcades, and airports. We experimentally evaluate the accuracy of positioning and show that the proposed IPS locates the user in a 6 m by 7.5 m room with root mean squared error of 2.25 m on average. The results also demonstrate the potential capability of real-time positioning with the proposed IPS.

Recently, the need for multimedia devices, such as mobile phones, digital TV, PMP, digital camcorders, digital cameras has increased. These devices provide various services for multimedia file manipulation, allowing multimedia contents playback, multimedia file editing, etc. Additionally, digital TV provides a recorded multimedia file copy to a portable USB disk. However, Linux Ext3 file system, as employed by these devices, has a lot of drawbacks, as it required a considerable amount of time and disk I/Os to store large-size edited multimedia files, and it is hard to access for typical PC users. Therefore, in this paper a design and implementation of an amortized Ext3 with FWAE (Fast Writing-After-Editing) for WinXP-based multimedia applications is described. The FWAE is a fast and efficient multimedia file editing/storing technique for the Ext3 that exploits inode block pointer re-setting and shared data blocks by simply modifying metadata information. Individual experiments in this research show that the amortized Ext3 with FWAE for WinXP not only dramatically improves written performance of the Ext3 by 16 times on average with various types of edited multimedia files but also notably reduces the amount of consumed disk space through data block sharing. Also, it provides ease and comfort to use for typical PC users unfamiliar with Linux OS.

This paper presents a low-power FPGA based on mixed synchronous/asynchronous design. The proposed FPGA consists of several sections which consist of logic blocks, and each section can be used as either a synchronous circuit or an asynchronous circuit according to its workload. An asynchronous circuit is power-efficient for a low-workload section since it does not require the clock tree which always consumes the power. On the other hand, a synchronous circuit is power-efficient for a high-workload section because of its simple hardware. The major consideration is designing an area-efficient synchronous/asynchronous hybrid logic block. This is because the hardware amount of the asynchronous circuit is about double that of the synchronous circuit, and the typical implementation wastes half of the hardware in synchronous mode. To solve this problem, we propose a hybrid logic block that can be used as either a single asynchronous logic block or two synchronous logic blocks. The proposed FPGA is fabricated using a 65-nm CMOS process. When the workload of a section is below 22%, asynchronous mode is more power-efficient than synchronous mode. Otherwise synchronous mode is more power-efficient.

Kernel biased discriminant analysis (KBDA), as a subspace learning algorithm, has been an attractive approach for the relevance feedback in content-based image retrieval. Its performance, however, still suffers from the “small sample learning” problem and “kernel learning” problem. Aiming to solve these problems, in this paper, we present a new semi-supervised scheme of KBDA (S-KBDA), in which the projection learning and the “kernel learning” are interweaved into a constrained optimization framework. Specifically, S-KBDA learns a subspace that preserves both the biased discriminant structure among the labeled samples, and the geometric structure among all training samples. In kernel optimization, we directly optimize the kernel matrix, rather than a kernel function, which makes the kernel learning more flexible and appropriate for the retrieval task. To solve the constrained optimization problem, a fast algorithm based on gradient ascent is developed. The image retrieval experiments are given to show the effectiveness of the S-KBDA scheme in comparison with the original KBDA, and the other two state-of-the-art algorithms.

In this paper, an on-line nonnegative matrix factorization (NMF) algorithm for acoustic signal processing systems is developed based on the recursive least squares (RLS) method. In order to develop the on-line NMF algorithm, we reformulate the NMF problem into multiple least squares (LS) normal equations, and solve the reformulated problems using RLS methods. In addition, we eliminate the irrelevant calculations based on the NMF model. The proposed algorithm has been evaluated with a well-known dataset used for NMF performance evaluation and with real acoustic signals; the results show that the proposed algorithm performs better than the conventional algorithm in on-line applications.

This paper proposes an adaptive sequential cooperative energy detection scheme for primary user detection in cognitive radio to minimize the detection time while guaranteeing the desired detection accuracy. Simulation results are provided to show the effectiveness of the proposed scheme.

This paper proposes a method for setting the threshold for ultra-wide-band (UWB) threshold-based ranging in indoor scenarios. The optimum threshold is derived based on the full analysis of the ranging error, which is equivalent to the probability of correct detection of first arriving signal in time-based ranging techniques. It is shown that the probability of correct detection is a function of first arriving signal, which has variations with two independent distributions. On the one hand, the first arriving signal varies in different positions with the same range due to multipath interference and on the other, it is a function of distance due to free space path-loss. These two distributions are considered in the derivation of the ranging error, based on which the optimum threshold is obtained. A practical method to derive this threshold is introduced based on the standard channel model. Extensive Monte Carlo simulations, ray-tracing simulations and ranging measurements confirm the analysis and the superior performance of the proposed threshold scheme.

This letter investigates the cluster lifetime of single-hop wireless sensor networks with cooperative Multi-Input Single-Output (MISO) scheme. The energy consumptions of both intra-cluster and out-cluster communications are considered. Moreover, uniform and linear data aggregations are discussed. It is found the optimal transmission scheme varies with the distance from the cluster to the base station. More interestingly and novelly, the effect of cluster size on the cluster lifetime has been clarified.

This paper discusses how to cope with dynamic power supply noise in FF timing estimation. We first review the dependence of setup and hold times on supply voltage, and point out that setup time is more sensitive to supply voltage than hold time, and hold time at nominal voltage is reasonably pessimistic. We thus propose a procedure to estimate setup time and clock-to-Q delay taking into account given voltage drop waveforms using an equivalent DC voltage approach. Experimental results show that the proposed procedure estimates setup time and clock-to-Q delay fluctuations well with 5% and 3% errors on average.

In the decentralized-TDMA (D-TDMA) protocol, the terminals select a free slot based on the frame information (FI) which is a representation of the status of each slot in the network. The FI, however, constitutes a large portion of the packet, which seriously compromises the per-packet transport capacity of the D-TDMA protocol. We therefore propose an opportunistic header management scheme for increasing the number of payload bytes without adversely affecting the performance of the D-TDMA. Our proposal is based on every terminal being able to choose between two techniques for transmitting their data packets. The first, based on the FI redundancies, lets the terminals transmit only the relevant information. The second compresses the FI with a lossless data compressor, i.e. the Huffman algorithm. Computer simulations were conducted for an urban environment in which vehicles are moving. The simulation results show that the proposed technique significantly increases the throughput without degrading the quality of the D-TDMA protocol.

Generally, the failure rate of a sealed relay is regarded as a constant value, no matter where and how it is used. However, the failure processes of sealed relays won't be the same under different conditions, even for one relay, its failure rate also will be changed during operations. This paper studies the failure process of a kind of sealed relay by analyzing the variations of its time parameters. Among contact resistance and all those time parameters, it is found that closing gap time can indicate the failure process of tested relay very well. For the purpose of verifying this conclusion derived from time parameters, the contacts are observed by microscope after the tested relay failed. Both theoretical calculation result of contacts gap and photos taken by microscope show that the hypothetic failure mode derived from time parameters is reasonable. Based on the failure analysis, the paper also proposes a dynamic reliability estimation method with closing gap time.

Location of a source is of considerable interest in wireless sensor networks, and it can be estimated from passive measurements of the arrival times. A novel algorithm for source location by utilizing the time of arrival (TOA) measurements of a signal received at spatially separated sensors is proposed. The algorithm is based on total least-squares (TLS) method, which is a generalized least-squares method to solve an overdetermined set of equations whose coefficients are noisy, and gives an explicit solution. Comparisons of performance with standard least-squares method are made, and Monte Carlo simulations are performed. Simulation results indicate that the proposed TLS algorithm gives better results than LS algorithm.

Recently proposed full-rate quasi-orthogonal space-time block codes (QSTBCs) with power scaling is able to achieve full-diversity through linearly combining two adequately power scaled orthogonal space-time block codes (OSTBCs). While in our initial work we numerically derived the optimal value of the power scaling factor to achieve full-diversity, our goal in this letter is to analytically derive the optimal power scaling, especially for square lattice constellations (e.g., 4-QAM, 16-QAM, etc.) by maximizing the coding gain.

A spectrum sensing scheme for cognitive radio that includes coarse and fine sensing stages based on cyclostationarity is proposed in this paper. The cyclostationary feature detection (CFD) based on a single cyclic frequency (SCF) is used in the coarse sensing stage and that based on multiple cyclic frequencies (MCF) is employed in the fine sensing stage. Whether the fine sensing stage is performed or not is decided by comparing the statistic constructed in the coarse sensing stage with two thresholds. Theoretical analyses and simulation results show that the proposed sensing scheme has superior sensing performance and needs shorter sensing time.

Packet pacing is a well-known technique for reducing the short-time-scale burstiness of traffic, and software-based packet pacing has been categorized into two approaches: the timer interrupt-based approach and the gap packet-based approach. The former was originally hard to implement for Gigabit class networks because it requires the operating system to handle too frequent periodic timer interrupts, thus incurring a large overhead. On the other hand, a gap packet-based packet pacing mechanism achieves precise pacing without depending on the timer resolution. However, in order to guarantee the accuracy of rate control, the system must be able to transmit packets at the wire rate. In this paper, we propose a high-resolution timer-based packet pacing mechanism that determines the transmission timing of packets by using a sub-microsecond resolution timer. The high-resolution timer is a light-weight mechanism compared to the traditional low-resolution periodic timer. With recent progress in hardware protocol offload technologies and multicore-aware network protocol stacks, we believe high-resolution timer-based packet pacing has become practical. Our experimental results show that the proposed mechanism can work on a wider range of systems without degrading the accuracy of rate control. However, a higher CPU load is observed when the number of traffic classes increases, compared to a gap packet-based pacing mechanism.